SG11201703935TA - Method for producing a single-sided electronic module including interconnection zones - Google Patents
Method for producing a single-sided electronic module including interconnection zonesInfo
- Publication number
- SG11201703935TA SG11201703935TA SG11201703935TA SG11201703935TA SG11201703935TA SG 11201703935T A SG11201703935T A SG 11201703935TA SG 11201703935T A SG11201703935T A SG 11201703935TA SG 11201703935T A SG11201703935T A SG 11201703935TA SG 11201703935T A SG11201703935T A SG 11201703935TA
- Authority
- SG
- Singapore
- Prior art keywords
- producing
- electronic module
- module including
- including interconnection
- sided electronic
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
- G06K19/0775—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
- G06K19/07754—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna the connection being galvanic
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07745—Mounting details of integrated circuit chips
- G06K19/07747—Mounting details of integrated circuit chips at least one of the integrated circuit chips being mounted as a module
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
- G06K19/07766—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card comprising at least a second communication arrangement in addition to a first non-contact communication arrangement
- G06K19/07769—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card comprising at least a second communication arrangement in addition to a first non-contact communication arrangement the further communication means being a galvanic interface, e.g. hybrid or mixed smart cards having a contact and a non-contact interface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
- H01L2224/48228—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item the bond pad being disposed in a recess of the surface of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85909—Post-treatment of the connector or wire bonding area
- H01L2224/8592—Applying permanent coating, e.g. protective coating
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Credit Cards Or The Like (AREA)
- Combinations Of Printed Boards (AREA)
- Wire Bonding (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP15305271.7A EP3059698B1 (de) | 2015-02-20 | 2015-02-20 | Herstellungsverfahren eines einseitigen elektronischen Moduls, das Verbindungszonen umfasst |
| PCT/EP2016/052744 WO2016131682A1 (fr) | 2015-02-20 | 2016-02-09 | Procede de fabrication d'un module electronique simple face comprenant des zones d'interconnexion |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| SG11201703935TA true SG11201703935TA (en) | 2017-06-29 |
Family
ID=52648959
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| SG11201703935TA SG11201703935TA (en) | 2015-02-20 | 2016-02-09 | Method for producing a single-sided electronic module including interconnection zones |
Country Status (13)
| Country | Link |
|---|---|
| US (1) | US10282652B2 (de) |
| EP (2) | EP3059698B1 (de) |
| JP (2) | JP6453472B2 (de) |
| KR (1) | KR102014621B1 (de) |
| CN (1) | CN107111779B (de) |
| AU (1) | AU2016221971B2 (de) |
| CA (1) | CA2968070C (de) |
| ES (1) | ES2867102T3 (de) |
| MX (1) | MX2017006130A (de) |
| PL (1) | PL3059698T3 (de) |
| SG (1) | SG11201703935TA (de) |
| WO (1) | WO2016131682A1 (de) |
| ZA (1) | ZA201703296B (de) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR3047101B1 (fr) | 2016-01-26 | 2022-04-01 | Linxens Holding | Procede de fabrication d’un module de carte a puce et d’une carte a puce |
| FR3113324B1 (fr) * | 2020-08-04 | 2024-05-24 | Smart Packaging Solutions | Module electronique pour carte contenant au moins une antenne et son procede de fabrication |
| KR20220032181A (ko) | 2020-09-07 | 2022-03-15 | 엘지이노텍 주식회사 | 회로 기판 및 이를 포함하는 지문인식용 스마트 카드 |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2716281B1 (fr) | 1994-02-14 | 1996-05-03 | Gemplus Card Int | Procédé de fabrication d'une carte sans contact. |
| JPH08107123A (ja) | 1994-10-04 | 1996-04-23 | Hitachi Ltd | 半導体集積回路装置の製造方法、その製造装置および半導体集積回路装置 |
| FR2784210B1 (fr) * | 1998-10-02 | 2001-09-14 | Gemplus Card Int | Carte a puce sans contact comportant des moyens d'inhibition |
| JP2011170525A (ja) | 2010-02-17 | 2011-09-01 | Toshiba Corp | カード基材及びこのカード基材を有するｉｃカード |
| EP2420960A1 (de) | 2010-08-17 | 2012-02-22 | Gemalto SA | Verfahren zur Herstellung einer elektronischen Vorrichtung, die ein nicht demontierbares Modul umfasst, und so erhaltene Vorrichtung |
| JP2012043341A (ja) | 2010-08-23 | 2012-03-01 | Toppan Printing Co Ltd | Ｉｃモジュールおよびそれを用いたｉｃカード |
| CA2826196A1 (en) * | 2011-01-31 | 2012-08-09 | American Bank Note Company | Dual-interface smart card |
| EP2575086A1 (de) * | 2011-09-27 | 2013-04-03 | Gemalto SA | Verfahren zur Verbindung eines Mikroschaltkreises mit leitenden Zonen, die mit einem Träger verknüpft sind |
| FR2998395B1 (fr) | 2012-11-21 | 2016-01-01 | Smart Packaging Solutions Sps | Module electronique simple face pour carte a puce a double interface de communication |
| EP2736001A1 (de) * | 2012-11-27 | 2014-05-28 | Gemalto SA | Elektronisches Modul mit dreidimensionaler Kommunikationsschnittstelle |
-
2015
- 2015-02-20 EP EP15305271.7A patent/EP3059698B1/de active Active
- 2015-02-20 ES ES15305271T patent/ES2867102T3/es active Active
- 2015-02-20 EP EP21158480.0A patent/EP3869409A1/de not_active Withdrawn
- 2015-02-20 PL PL15305271T patent/PL3059698T3/pl unknown
-
2016
- 2016-02-09 CA CA2968070A patent/CA2968070C/fr active Active
- 2016-02-09 WO PCT/EP2016/052744 patent/WO2016131682A1/fr active Application Filing
- 2016-02-09 AU AU2016221971A patent/AU2016221971B2/en active Active
- 2016-02-09 CN CN201680004744.8A patent/CN107111779B/zh active Active
- 2016-02-09 JP JP2017535646A patent/JP6453472B2/ja active Active
- 2016-02-09 KR KR1020177015859A patent/KR102014621B1/ko active IP Right Grant
- 2016-02-09 US US15/531,159 patent/US10282652B2/en active Active
- 2016-02-09 MX MX2017006130A patent/MX2017006130A/es unknown
- 2016-02-09 SG SG11201703935TA patent/SG11201703935TA/en unknown
-
2017
- 2017-05-12 ZA ZA2017/03296A patent/ZA201703296B/en unknown
-
2018
- 2018-12-12 JP JP2018232327A patent/JP6756805B2/ja active Active
Also Published As
| Publication number | Publication date |
|---|---|
| WO2016131682A1 (fr) | 2016-08-25 |
| AU2016221971A1 (en) | 2017-07-20 |
| ZA201703296B (en) | 2019-06-26 |
| KR102014621B1 (ko) | 2019-08-26 |
| CN107111779A (zh) | 2017-08-29 |
| PL3059698T3 (pl) | 2021-10-25 |
| EP3059698B1 (de) | 2021-03-31 |
| KR20170081693A (ko) | 2017-07-12 |
| JP6756805B2 (ja) | 2020-09-16 |
| AU2016221971B2 (en) | 2019-01-31 |
| CA2968070C (fr) | 2021-05-11 |
| BR112017015014A2 (pt) | 2018-01-23 |
| ES2867102T3 (es) | 2021-10-20 |
| JP6453472B2 (ja) | 2019-01-16 |
| MX2017006130A (es) | 2018-02-09 |
| EP3869409A1 (de) | 2021-08-25 |
| EP3059698A1 (de) | 2016-08-24 |
| JP2018505553A (ja) | 2018-02-22 |
| JP2019071435A (ja) | 2019-05-09 |
| CN107111779B (zh) | 2020-09-15 |
| CA2968070A1 (fr) | 2016-08-25 |
| US20170372186A1 (en) | 2017-12-28 |
| US10282652B2 (en) | 2019-05-07 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| PL3143557T3 (pl) | Sposób wytwarzania obwodu dla modułu karty inteligentnej i obwód dla modułu karty inteligentnej | |
| EP3322265A4 (de) | Herstellungsverfahren für leiterplatte | |
| GB201417687D0 (en) | A module for additive manufacturing apparatus | |
| PL3037247T3 (pl) | Sposób wytwarzania elementu sandwiczowego | |
| EP3294510C0 (de) | Verfahren zur herstellung von vertiefungen aufweisenden paneelen | |
| EP3259965A4 (de) | Verfahren zur herstellung einer druckleiterplatte | |
| SG11201708903SA (en) | Production method for copper-clad laminate plate | |
| SI3045605T1 (sl) | Modul za izdelavo betonskih delov | |
| HUE038343T2 (hu) | Eljárás forrasztott kapcsolat kialakítására | |
| SG10202011924YA (en) | Method for manufacturing multilayer wiring board | |
| HK1250118A1 (zh) | 屏蔽印製佈線板的製造方法 | |
| LT3272480T (lt) | Medienos plaušų plokštės gamybos būdas | |
| PL2955295T3 (pl) | Sposób wytwarzania panela | |
| ZA201703296B (en) | Method for producing a single-sided electronic module including interconnection zones | |
| PL3037248T3 (pl) | Sposób wytwarzania przekładkowego elementu konstrukcyjnego | |
| PL2981156T3 (pl) | Panel fotowoltaiczny i sposób wytwarzania takiego panelu | |
| ZA201708640B (en) | Method for producing a sandwich structure | |
| SG10202011919XA (en) | Method for manufacturing multilayer wiring board | |
| PL3177232T3 (pl) | Sposób wytwarzania folii wielowarstwowej | |
| HUE042921T2 (hu) | Eljárás farostlemez gyártására | |
| PL3081623T3 (pl) | Sposób wytwarzania składników na bazie oleju | |
| GB2543101B (en) | Lamination technique for producing electronic devices | |
| PT3181349T (pt) | Processo para produzir um laminado | |
| EP3307035A4 (de) | Verfahren zur herstellung einer leiterplatte | |
| GB2543483B (en) | Lamination technique for producing electronic devices |