SG11201610771SA - Method of manufacturing a substrate - Google Patents

Method of manufacturing a substrate

Info

Publication number
SG11201610771SA
SG11201610771SA SG11201610771SA SG11201610771SA SG11201610771SA SG 11201610771S A SG11201610771S A SG 11201610771SA SG 11201610771S A SG11201610771S A SG 11201610771SA SG 11201610771S A SG11201610771S A SG 11201610771SA SG 11201610771S A SG11201610771S A SG 11201610771SA
Authority
SG
Singapore
Prior art keywords
substrate
manufacturing
Prior art date
Application number
SG11201610771SA
Other languages
English (en)
Inventor
Kwang Hong Lee
Chuan Seng Tan
Eugene A Fitzgerald
Eng Kian Kenneth Lee
Original Assignee
Massachusetts Inst Technology
Univ Nanyang Tech
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Massachusetts Inst Technology, Univ Nanyang Tech filed Critical Massachusetts Inst Technology
Publication of SG11201610771SA publication Critical patent/SG11201610771SA/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/8258—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using a combination of technologies covered by H01L21/8206, H01L21/8213, H01L21/822, H01L21/8252, H01L21/8254 or H01L21/8256
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • H01L21/30612—Etching of AIIIBV compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0635—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors and diodes, or resistors, or capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003—Nitride compounds

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Recrystallisation Techniques (AREA)
  • Semiconductor Lasers (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Element Separation (AREA)
SG11201610771SA 2014-07-08 2015-07-06 Method of manufacturing a substrate SG11201610771SA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201462021810P 2014-07-08 2014-07-08
PCT/SG2015/050198 WO2016007088A1 (en) 2014-07-08 2015-07-06 Method of manufacturing a substrate

Publications (1)

Publication Number Publication Date
SG11201610771SA true SG11201610771SA (en) 2017-01-27

Family

ID=55064575

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11201610771SA SG11201610771SA (en) 2014-07-08 2015-07-06 Method of manufacturing a substrate

Country Status (5)

Country Link
US (1) US10049947B2 (zh)
JP (1) JP6751385B2 (zh)
CN (1) CN107004639B (zh)
SG (1) SG11201610771SA (zh)
WO (1) WO2016007088A1 (zh)

Families Citing this family (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI566328B (zh) * 2013-07-29 2017-01-11 高效電源轉換公司 具有用於產生附加構件之多晶矽層的氮化鎵電晶體
JP6887992B2 (ja) 2015-09-04 2021-06-16 ナンヤン テクノロジカル ユニヴァーシティー 基板を被膜する方法
SG10201913407TA (en) * 2015-11-20 2020-03-30 Globalwafers Co Ltd Manufacturing method of smoothing a semiconductor surface
SG11201806030SA (en) 2016-01-20 2018-08-30 Massachusetts Inst Technology Fabrication of a device on a carrier substrate
KR101787435B1 (ko) * 2016-02-29 2017-10-19 피에스아이 주식회사 나노 로드 제조방법
US10773952B2 (en) 2016-05-20 2020-09-15 Qorvo Us, Inc. Wafer-level package with enhanced performance
US10784149B2 (en) 2016-05-20 2020-09-22 Qorvo Us, Inc. Air-cavity module with enhanced device isolation
DE102016109459B4 (de) * 2016-05-23 2019-06-13 X-Fab Semiconductor Foundries Ag Optimierter Transfer Print (Überführungsdruck) zwischen Trägersubstraten als Verfahren, Trägersubstrat und mikro-technisches Bauelement
SG11201901194SA (en) 2016-08-12 2019-03-28 Qorvo Us Inc Wafer-level package with enhanced performance
US10109502B2 (en) 2016-09-12 2018-10-23 Qorvo Us, Inc. Semiconductor package with reduced parasitic coupling effects and process for making the same
US10749518B2 (en) 2016-11-18 2020-08-18 Qorvo Us, Inc. Stacked field-effect transistor switch
US10068831B2 (en) 2016-12-09 2018-09-04 Qorvo Us, Inc. Thermally enhanced semiconductor package and process for making the same
EP3568873B1 (en) * 2017-01-13 2023-11-08 Massachusetts Institute of Technology A method of forming a multilayer structure for a pixelated display and a multilayer structure for a pixelated display
US10755992B2 (en) 2017-07-06 2020-08-25 Qorvo Us, Inc. Wafer-level packaging for enhanced performance
US10784233B2 (en) 2017-09-05 2020-09-22 Qorvo Us, Inc. Microelectronics package with self-aligned stacked-die assembly
CN109698154B (zh) * 2017-10-20 2020-12-15 中芯国际集成电路制造(上海)有限公司 芯片封装方法及芯片封装结构
CN108054200A (zh) * 2017-12-21 2018-05-18 深圳市麦思浦半导体有限公司 一种功率器件的衬底的制造方法和控制器
CN108321081B (zh) * 2018-02-01 2023-05-30 赵中阳 一种复合衬底及复合衬底的制作方法
US11152363B2 (en) 2018-03-28 2021-10-19 Qorvo Us, Inc. Bulk CMOS devices with enhanced performance and methods of forming the same utilizing bulk CMOS process
US10804246B2 (en) 2018-06-11 2020-10-13 Qorvo Us, Inc. Microelectronics package with vertically stacked dies
US11069590B2 (en) 2018-10-10 2021-07-20 Qorvo Us, Inc. Wafer-level fan-out package with enhanced performance
US10964554B2 (en) 2018-10-10 2021-03-30 Qorvo Us, Inc. Wafer-level fan-out package with enhanced performance
CN109449172A (zh) * 2018-10-16 2019-03-08 德淮半导体有限公司 晶圆键合方法
CN109346495A (zh) * 2018-11-21 2019-02-15 德淮半导体有限公司 晶圆键合方法
US11646242B2 (en) 2018-11-29 2023-05-09 Qorvo Us, Inc. Thermally enhanced semiconductor package with at least one heat extractor and process for making the same
US11851325B2 (en) * 2018-11-30 2023-12-26 Taiwan Semiconductor Manufacturing Co., Ltd. Methods for wafer bonding
US11387157B2 (en) 2019-01-23 2022-07-12 Qorvo Us, Inc. RF devices with enhanced performance and methods of forming the same
US20200235040A1 (en) 2019-01-23 2020-07-23 Qorvo Us, Inc. Rf devices with enhanced performance and methods of forming the same
US20200235066A1 (en) 2019-01-23 2020-07-23 Qorvo Us, Inc. Rf devices with enhanced performance and methods of forming the same
KR20210129656A (ko) 2019-01-23 2021-10-28 코르보 유에스, 인크. Rf 반도체 디바이스 및 이를 형성하는 방법
US20200234978A1 (en) * 2019-01-23 2020-07-23 Qorvo Us, Inc. Rf devices with enhanced performance and methods of forming the same
CN109830484B (zh) * 2019-01-28 2020-10-16 浙江大学 一种soi结构及其制作工艺
WO2021061052A1 (en) 2019-09-27 2021-04-01 New Silicon Corporation Pte Ltd Method for fabricating a semiconductor device and the semiconductor device thereof
US11646289B2 (en) 2019-12-02 2023-05-09 Qorvo Us, Inc. RF devices with enhanced performance and methods of forming the same
US11923238B2 (en) 2019-12-12 2024-03-05 Qorvo Us, Inc. Method of forming RF devices with enhanced performance including attaching a wafer to a support carrier by a bonding technique without any polymer adhesive
CN111370321A (zh) * 2020-02-07 2020-07-03 中国科学院微电子研究所 衬底键合方法、三维集成基板及电路、电子设备和芯片
WO2022023630A1 (fr) * 2020-07-28 2022-02-03 Soitec Procede de report d'une couche mince sur un substrat support muni d'une couche de piegeage de charges
US20220209498A1 (en) * 2020-12-30 2022-06-30 Transwave Photonics, Llc. Quantum cascade laser devices with improved heat extraction

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE469863B (sv) * 1991-10-15 1993-09-27 Asea Brown Boveri Halvledarkomponent, halvledarskiva för framställning av halvledarkomponent samt förfarande för framställning av sådan halvledarskiva
JP4027740B2 (ja) * 2001-07-16 2007-12-26 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP2005322745A (ja) 2004-05-07 2005-11-17 Sony Corp 半導体素子、半導体素子の製造方法、固体撮像素子、並びに固体撮像素子の製造方法
FR2888663B1 (fr) 2005-07-13 2008-04-18 Soitec Silicon On Insulator Procede de diminution de la rugosite d'une couche epaisse d'isolant
US20070042566A1 (en) * 2005-08-03 2007-02-22 Memc Electronic Materials, Inc. Strained silicon on insulator (ssoi) structure with improved crystallinity in the strained silicon layer
US7485968B2 (en) * 2005-08-11 2009-02-03 Ziptronix, Inc. 3D IC method and device
JP5366517B2 (ja) * 2007-12-03 2013-12-11 株式会社半導体エネルギー研究所 半導体装置の作製方法
US8193071B2 (en) * 2008-03-11 2012-06-05 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
JP2010287817A (ja) * 2009-06-15 2010-12-24 Shin-Etsu Chemical Co Ltd Ｇｅ膜付きＳＯＩ基板の製造方法及びＧｅ膜付きＳＯＩ基板
US20110299166A1 (en) * 2010-06-07 2011-12-08 Aegis Lightwave, Inc. Thermally Tunable Optical Filter with Single Crystalline Spacer Fabricated by Fusion Bonding
CN101901753B (zh) * 2010-06-25 2012-05-23 上海新傲科技股份有限公司 一种带有绝缘埋层的厚膜材料的制备方法
US8536021B2 (en) * 2010-12-24 2013-09-17 Io Semiconductor, Inc. Trap rich layer formation techniques for semiconductor devices
JP6019599B2 (ja) * 2011-03-31 2016-11-02 ソニー株式会社 半導体装置、および、その製造方法
TWI509713B (zh) * 2011-03-31 2015-11-21 Soitec Silicon On Insulator 形成結合的半導體結構之方法及用該方法所形成之半導體結構
JP5417399B2 (ja) * 2011-09-15 2014-02-12 信越化学工業株式会社 複合ウェーハの製造方法
US8865507B2 (en) * 2011-09-16 2014-10-21 Sionyx, Inc. Integrated visible and infrared imager devices and associated methods
US9685513B2 (en) * 2012-10-24 2017-06-20 The United States Of America, As Represented By The Secretary Of The Navy Semiconductor structure or device integrated with diamond

Also Published As

Publication number Publication date
US10049947B2 (en) 2018-08-14
JP6751385B2 (ja) 2020-09-02
CN107004639B (zh) 2021-02-05
CN107004639A (zh) 2017-08-01
WO2016007088A1 (en) 2016-01-14
US20170200648A1 (en) 2017-07-13
JP2017525149A (ja) 2017-08-31

Similar Documents

Publication Publication Date Title
SG11201610771SA (en) Method of manufacturing a substrate
PL3206816T3 (pl) Sposób wytwarzania elementu składowego i element składowy
ZA201804163B (en) Method of tagging a substrate
HUE051760T2 (hu) Eljárás félvezetõ modul elõállítására
HUE062315T2 (hu) Csõ gyártási eljárása
GB2541146B (en) Method of manufacturing a germanium-on-insulator substrate
GB201416223D0 (en) Manufacturing method
PL2927017T3 (pl) Sposób pokrywania substratu
GB201406135D0 (en) Method of etching
GB201701519D0 (en) Substrate manufacture
SG11201802818VA (en) Method of manufacturing a germanium-on-insulator substrate
SG11201700614VA (en) Method of manufacturing coated tool
GB201421768D0 (en) Method of manufacturing a seal
TWI562220B (en) Manufacturing method of semiconductor structure
PL3221068T3 (pl) Sposób wytwarzania kształtki obrotowo-symetrycznej
GB201402126D0 (en) Method of processing a substrate
GB201416350D0 (en) A method of fitting
SG11201803235SA (en) Method of manufacturing a hybrid substrate
SG10201913219RA (en) Method for manufacturing a substrate
SG11201702400TA (en) Method for manufacturing magnetic-disk substrate
SG11201701760UA (en) Method for manufacturing magnetic-disk substrate
IL239014A (en) A method for making tefillin and the tefillin is manufactured
GB2527740B (en) Manufacturing method
GB201419681D0 (en) Manufacturing method
SG11201607714WA (en) Method for coating cavities of a semiconductor substrate