SG11201608947SA - Embedded memory in interconnect stack on silicon die - Google Patents

Embedded memory in interconnect stack on silicon die

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Publication number
SG11201608947SA
SG11201608947SA SG11201608947SA SG11201608947SA SG11201608947SA SG 11201608947S A SG11201608947S A SG 11201608947SA SG 11201608947S A SG11201608947S A SG 11201608947SA SG 11201608947S A SG11201608947S A SG 11201608947SA SG 11201608947S A SG11201608947S A SG 11201608947SA
Authority
SG
Singapore
Prior art keywords
embedded memory
silicon die
interconnect stack
interconnect
stack
Prior art date
Application number
SG11201608947SA
Other languages
English (en)
Inventor
Donald W Nelson
Clair M Webb
Patrick Morrow
Kimin Jun
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of SG11201608947SA publication Critical patent/SG11201608947SA/en

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    • H01L2924/1579Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
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EP3155653A4 (en) 2018-02-21
EP3155653A1 (en) 2017-04-19
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JP2017525128A (ja) 2017-08-31
TWI576921B (zh) 2017-04-01

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