SG11201408122RA - Bonding apparatus and method of manufacturing semiconductor device - Google Patents

Bonding apparatus and method of manufacturing semiconductor device

Info

Publication number
SG11201408122RA
SG11201408122RA SG11201408122RA SG11201408122RA SG11201408122RA SG 11201408122R A SG11201408122R A SG 11201408122RA SG 11201408122R A SG11201408122R A SG 11201408122RA SG 11201408122R A SG11201408122R A SG 11201408122RA SG 11201408122R A SG11201408122R A SG 11201408122RA
Authority
SG
Singapore
Prior art keywords
lllll
layer
bonding
tokyo
electrode
Prior art date
Application number
SG11201408122RA
Inventor
Daisuke Tani
Koichi Takahashi
Original Assignee
Shinkawa Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinkawa Kk filed Critical Shinkawa Kk
Publication of SG11201408122RA publication Critical patent/SG11201408122RA/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B37/00—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
    • B32B37/0046—Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by constructional aspects of the apparatus
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B41/00—Arrangements for controlling or monitoring lamination processes; Safety arrangements
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    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
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    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
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    • B32B2309/00—Parameters for the laminating or treatment process; Apparatus details
    • B32B2309/70—Automated, e.g. using a computer or microcomputer
    • B32B2309/72—For measuring or regulating, e.g. systems with feedback loops
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    • B32B2313/00—Elements other than metals
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    • B32B2457/00—Electrical equipment
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)

Abstract

(i2) mwu ft iz s-5 iv x m £ titz s issaj n d9) mm IHMMi _ r4T» allium 2013# 12 fll9 0(19.12.2013) w , PO tpCT (10) WO 2013/187292 A1 (51) H01L 21/60 (2006.01) (21) PCT/JP2013/065575 (22) 2013^6^ 5 0(05.06.2013) (25) (26) @U8&M©Wi§: (30) fiBfcftf '— 1 £: 2012-131510 2012 ^6^ 11 0(11.06.2012) JP 4#M 2013-061589 2013 ^ 3 ^ 25 0(25.03.2013) JP (71) ttiHA: ^S#l±irJII (SHINKAWA LTD.) [JP/JP]; T2088585 Uj TfT W- 2 T g 5 1 #±feG) 1 Tokyo (JP). (72) £ A$i(TAM, Daisuke); T 2088585 ai3£ittttUUrfi#£¥ 2TI51 #ifea> 1 folR ^a«fjl|_rt Tokyo (JP). fit /p — (TAKAHASHI, Koichi); T 2088585 HjfvtRjKUfa Uj 2 T I 5 1 iifeffl 1 Tokyo (JP). ^ (74) i-tmx-. (YKI PATENT ATTORNEYS); T 1800004 5 [mn%] (54) Title: BONDING DEVICE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE S (54) fgE0)€ffc : 7tOxV (57) Abstract: A flip-chip bonding device (500) for layer-bonding second- a layer semiconductor chip (30), on which a second through electrode is provided, to a first-layer semiconductor chip (20), on which first a through electrode is provided, at a position corresponding to the first through elec­ trode, and equipped with a control unit (50), and double-view a camera (16) for capturing images of the semiconductor chips (20, 30), wherein the control unit (50) is provided with relative-position detection a program (53) for de­ tecting the relative positions of the semiconductor chips (20, 30) in the layer- bonded layers, on the basis of an image of the first through electrode on the surface of the first-layer semiconductor chip (20) captured by the double- view camera (16) prior to the layer-bonding, and an image of the second through electrode on the surface of the second-layer semiconductor chip (30) captured by the double-view camera (16) after the layer-bonding. Con­ sequently, through electrodes can be accurately connected by using a simple method. (57) Wlfo: — TvZ? (2 0) (3 0) £ 81 Jf 7|? V V 4 > ( 5 OO) (2 0) , (3 0) (DW&Z =j (16) t, mmu (50) t, (5 0) It. = (16) lc«fcoTSHftLf=£-a>Jia>3M»f*f ; (2 0) HJi>•? L (16) (3 0) Xf (20) , (3 0) (5 3) I — cfe U ^ - \" ^ mm g -& o o £ iKSrrfr^^Br — T @ 3 4# 1 2.^ Tokyo (JP). (8i) (^ro&i^PBy, IS ft nj f b): AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, KE, KG, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW. (84) (asrofci^isy > ±T(Dmm(Dfcm% V&tf nlfb): ARIPO (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, SZ, TZ, UG, ZM, ZW), 3- — V T (AM, AZ, BY, KG, KZ, RU, TJ, TM), 3 — • V / ^ (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR), OAPI (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG). WO 2013/187292 A11 lllll llllllll II llllll III lllll lllll III III III lllll lllll llll llll lllll lllll lllll lllllll llll llll
SG11201408122RA 2012-06-11 2013-06-05 Bonding apparatus and method of manufacturing semiconductor device SG11201408122RA (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2012131510 2012-06-11
JP2013061589A JP5876000B2 (en) 2012-06-11 2013-03-25 Bonding apparatus and bonding method
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KR20140117543A (en) 2014-10-07
CN104335337A (en) 2015-02-04

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