SG102051A1 - Method of production of lead frame, lead frame, and semiconductor device - Google Patents

Method of production of lead frame, lead frame, and semiconductor device

Info

Publication number
SG102051A1
SG102051A1 SG200203072A SG200203072A SG102051A1 SG 102051 A1 SG102051 A1 SG 102051A1 SG 200203072 A SG200203072 A SG 200203072A SG 200203072 A SG200203072 A SG 200203072A SG 102051 A1 SG102051 A1 SG 102051A1
Authority
SG
Singapore
Prior art keywords
lead frame
production
semiconductor device
lead
frame
Prior art date
Application number
SG200203072A
Other languages
English (en)
Inventor
Toya Hideki
Nishizawa Michihiro
Original Assignee
Shinko Electric Ind Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Ind Co filed Critical Shinko Electric Ind Co
Publication of SG102051A1 publication Critical patent/SG102051A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48095Kinked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
SG200203072A 2001-05-25 2002-05-22 Method of production of lead frame, lead frame, and semiconductor device SG102051A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001156789A JP2002353395A (ja) 2001-05-25 2001-05-25 リードフレームの製造方法、リードフレーム、及び半導体装置

Publications (1)

Publication Number Publication Date
SG102051A1 true SG102051A1 (en) 2004-02-27

Family

ID=19000745

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200203072A SG102051A1 (en) 2001-05-25 2002-05-22 Method of production of lead frame, lead frame, and semiconductor device

Country Status (4)

Country Link
JP (1) JP2002353395A (ja)
KR (1) KR20020090328A (ja)
SG (1) SG102051A1 (ja)
TW (1) TWI221021B (ja)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4807928B2 (ja) * 2003-09-18 2011-11-02 旭化成エレクトロニクス株式会社 表面実装縦型磁電変換素子
JP2005123383A (ja) * 2003-10-16 2005-05-12 Asahi Kasei Electronics Co Ltd 磁電変換素子
JP4723804B2 (ja) * 2003-10-17 2011-07-13 旭化成エレクトロニクス株式会社 磁電変換装置
JP5248232B2 (ja) * 2008-07-31 2013-07-31 株式会社三井ハイテック リードフレーム及びその製造方法
JP6887932B2 (ja) * 2017-10-13 2021-06-16 株式会社三井ハイテック リードフレームの製造方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62193162A (ja) * 1986-02-19 1987-08-25 Sumitomo Metal Mining Co Ltd リードフレームの製造方法
JPH0685151A (ja) * 1992-09-02 1994-03-25 Seiko Epson Corp 半導体装置とその製造方法
JPH0964266A (ja) * 1995-08-18 1997-03-07 Sony Corp リードフレーム
JPH11233702A (ja) * 1998-02-10 1999-08-27 Hitachi Cable Ltd リードフレーム及びその製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62193162A (ja) * 1986-02-19 1987-08-25 Sumitomo Metal Mining Co Ltd リードフレームの製造方法
JPH0685151A (ja) * 1992-09-02 1994-03-25 Seiko Epson Corp 半導体装置とその製造方法
JPH0964266A (ja) * 1995-08-18 1997-03-07 Sony Corp リードフレーム
JPH11233702A (ja) * 1998-02-10 1999-08-27 Hitachi Cable Ltd リードフレーム及びその製造方法

Also Published As

Publication number Publication date
KR20020090328A (ko) 2002-12-02
JP2002353395A (ja) 2002-12-06
TWI221021B (en) 2004-09-11

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