SG10202007757VA - Memory device and method of operating the same - Google Patents

Memory device and method of operating the same

Info

Publication number
SG10202007757VA
SG10202007757VA SG10202007757VA SG10202007757VA SG10202007757VA SG 10202007757V A SG10202007757V A SG 10202007757VA SG 10202007757V A SG10202007757V A SG 10202007757VA SG 10202007757V A SG10202007757V A SG 10202007757VA SG 10202007757V A SG10202007757V A SG 10202007757VA
Authority
SG
Singapore
Prior art keywords
operating
same
memory device
memory
Prior art date
Application number
SG10202007757VA
Inventor
Sun Yoon Mi
Hyuk Chae Dong
Original Assignee
Sk Hynix Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sk Hynix Inc filed Critical Sk Hynix Inc
Publication of SG10202007757VA publication Critical patent/SG10202007757VA/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1057—Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/32—Timing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G06F12/0873—Mapping of cache memory to specific storage devices or parts thereof
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1673—Details of memory controller using buffers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/065—Differential amplifiers of latching type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/106—Data output latches
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1084—Data input buffers, e.g. comprising level conversion circuits, circuits for adapting load
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1087—Data input latches
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Human Computer Interaction (AREA)
  • Read Only Memory (AREA)
SG10202007757VA 2019-12-02 2020-08-13 Memory device and method of operating the same SG10202007757VA (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020190158488A KR20210068902A (en) 2019-12-02 2019-12-02 Memory device and operating method thereof

Publications (1)

Publication Number Publication Date
SG10202007757VA true SG10202007757VA (en) 2021-07-29

Family

ID=76091874

Family Applications (1)

Application Number Title Priority Date Filing Date
SG10202007757VA SG10202007757VA (en) 2019-12-02 2020-08-13 Memory device and method of operating the same

Country Status (4)

Country Link
US (1) US11056162B2 (en)
KR (1) KR20210068902A (en)
CN (1) CN112992204B (en)
SG (1) SG10202007757VA (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113419679B (en) * 2021-06-18 2023-06-30 Oppo广东移动通信有限公司 Storage device, system-on-chip, electronic equipment and storage method
KR102570583B1 (en) * 2021-12-28 2023-08-28 삼성전자 주식회사 Memory device, memory system including the same and operating method of memory system
EP4207199A3 (en) 2021-12-28 2023-08-09 Samsung Electronics Co., Ltd. Memory device, memory system including the same, and operating method of the memory system

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001101878A (en) * 1999-09-28 2001-04-13 Hitachi Ltd Semiconductor memory
KR100626371B1 (en) 2004-03-30 2006-09-20 삼성전자주식회사 Non-volatile memory device performing cache read operation, memory system including the same, and cache read method
KR100723772B1 (en) * 2005-03-28 2007-05-30 주식회사 하이닉스반도체 Improved page buffer of flash memory device and control method for programming thereof
US7123521B1 (en) * 2005-04-27 2006-10-17 Micron Technology, Inc. Random cache read
KR20120005826A (en) * 2010-07-09 2012-01-17 주식회사 하이닉스반도체 Semiconductor memory device and operation method thereof
KR101115623B1 (en) * 2010-07-09 2012-02-15 주식회사 하이닉스반도체 Non-volatile memory device and operation method thereof
KR20140093855A (en) * 2013-01-18 2014-07-29 삼성전자주식회사 Memory system comprising nonvolatile memory device and control method thereof
KR20140134797A (en) * 2013-05-14 2014-11-25 에스케이하이닉스 주식회사 Semiconductor apparatus and method of operating the same
KR102111579B1 (en) * 2013-06-21 2020-05-18 에스케이하이닉스 주식회사 Semiconductor memory device and operating method thereof
JP2015176625A (en) * 2014-03-14 2015-10-05 株式会社東芝 Semiconductor memory
KR102248835B1 (en) * 2014-09-29 2021-05-10 삼성전자주식회사 Nonvolatile memory device and operating method thereof
KR20160074929A (en) 2014-12-19 2016-06-29 에스케이하이닉스 주식회사 Nonvolatile memory device and operating method thereof
KR102293078B1 (en) * 2015-07-06 2021-08-26 삼성전자주식회사 Nonvolatile memory device
KR102544136B1 (en) * 2016-03-08 2023-06-16 에스케이하이닉스 주식회사 Semiconductor memory device and operating method thereof
KR20190090268A (en) * 2018-01-24 2019-08-01 에스케이하이닉스 주식회사 Memory controller and memory system having the same
KR102658792B1 (en) * 2018-09-21 2024-04-18 삼성전자주식회사 Nonvolatile memory devices and methods of operating nonvolatile memory devices
TWI691961B (en) * 2019-01-11 2020-04-21 群聯電子股份有限公司 Memory control method, memory storage device and memory control circuit unit

Also Published As

Publication number Publication date
CN112992204B (en) 2023-06-13
CN112992204A (en) 2021-06-18
US20210166741A1 (en) 2021-06-03
KR20210068902A (en) 2021-06-10
US11056162B2 (en) 2021-07-06

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