SG10201804561QA - High-rate cmp polishing method - Google Patents

High-rate cmp polishing method

Info

Publication number
SG10201804561QA
SG10201804561QA SG10201804561QA SG10201804561QA SG10201804561QA SG 10201804561Q A SG10201804561Q A SG 10201804561QA SG 10201804561Q A SG10201804561Q A SG 10201804561QA SG 10201804561Q A SG10201804561Q A SG 10201804561QA SG 10201804561Q A SG10201804561Q A SG 10201804561QA
Authority
SG
Singapore
Prior art keywords
polishing
polishing pad
grooves
wafer
rotating
Prior art date
Application number
SG10201804561QA
Inventor
Vu Nguyen John
Quan Tran Tony
James Hendron Jeffrey
Robert Stack Jeffrey
Original Assignee
Rohm & Haas Elect Materials Cmp Holdings Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm & Haas Elect Materials Cmp Holdings Inc filed Critical Rohm & Haas Elect Materials Cmp Holdings Inc
Publication of SG10201804561QA publication Critical patent/SG10201804561QA/en

Links

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/11—Lapping tools
    • B24B37/20—Lapping pads for working plane surfaces
    • B24B37/26—Lapping pads for working plane surfaces characterised by the shape of the lapping pad surface, e.g. grooved
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
    • B24B37/042—Lapping machines or devices; Accessories designed for working plane surfaces operating processes therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30625—With simultaneous mechanical treatment, e.g. mechanico-chemical polishing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers
    • H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers
    • H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step
    • H01L21/31055—Planarisation of the insulating layers involving a dielectric removal step the removal being a chemical etching step, e.g. dry etching
    • H01L21/31056—Planarisation of the insulating layers involving a dielectric removal step the removal being a chemical etching step, e.g. dry etching the removal being a selective chemical etching step, e.g. selective dry etching through a mask
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/32115—Planarisation
    • H01L21/3212—Planarisation by chemical mechanical polishing [CMP]

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Chemical & Material Sciences (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)

Abstract

SG-NP 27 HIGH-RATE CMP POLISHING METHOD of the Disclosure The invention provides a method for polishing or planarizing a wafer of at least one of semiconductor, optical and magnetic substrates. The method includes rotating a polishing pad having radial feeder grooves in the polishing layer separating the polishing layer into polishing regions. The radial feeder grooves include a series of biased grooves connecting a pair of adjacent radial feeder grooves. A majority of the biased grooves have either an inward bias toward the center or an outward bias toward the outer edge of the polishing pad. Pressing and rotating the wafer against the rotating polishing pad for multiple rotations of the polishing pad at a fixed distance from the center of the polishing pad increases polishing or planarizing removal rate of the wafer. [Figure 1A]
SG10201804561QA 2017-06-14 2018-05-30 High-rate cmp polishing method SG10201804561QA (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201715623195A 2017-06-14 2017-06-14
US201715624964A 2017-06-16 2017-06-16
US15/725,876 US10857647B2 (en) 2017-06-14 2017-10-05 High-rate CMP polishing method

Publications (1)

Publication Number Publication Date
SG10201804561QA true SG10201804561QA (en) 2019-01-30

Family

ID=64457660

Family Applications (1)

Application Number Title Priority Date Filing Date
SG10201804561QA SG10201804561QA (en) 2017-06-14 2018-05-30 High-rate cmp polishing method

Country Status (8)

Country Link
US (1) US10857647B2 (en)
JP (1) JP7168352B2 (en)
KR (1) KR102660718B1 (en)
CN (1) CN109079648B (en)
DE (1) DE102018004633A1 (en)
FR (1) FR3067627B1 (en)
SG (1) SG10201804561QA (en)
TW (1) TWI775852B (en)

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* Cited by examiner, † Cited by third party
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KR102247186B1 (en) 2018-11-08 2021-05-04 주식회사 엘지화학 Conductive concentrate resin composition, conductive polyamide resin composition, method for preparing the same and molding products
TWI718508B (en) * 2019-03-25 2021-02-11 智勝科技股份有限公司 Polishing pad, manufacturing method of polishing pad and polishing method
KR20210116759A (en) 2020-03-13 2021-09-28 삼성전자주식회사 CMP pad and chemical mechanical polishing apparatus having the same
KR20220116312A (en) * 2020-11-05 2022-08-22 어플라이드 머티어리얼스, 인코포레이티드 horizontal buffing module

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Also Published As

Publication number Publication date
JP2019034402A (en) 2019-03-07
US20180361532A1 (en) 2018-12-20
JP7168352B2 (en) 2022-11-09
CN109079648B (en) 2021-07-20
TWI775852B (en) 2022-09-01
FR3067627A1 (en) 2018-12-21
CN109079648A (en) 2018-12-25
KR20180136373A (en) 2018-12-24
FR3067627B1 (en) 2022-07-08
KR102660718B1 (en) 2024-04-26
DE102018004633A1 (en) 2018-12-20
US10857647B2 (en) 2020-12-08
TW201908058A (en) 2019-03-01

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