SE9500081L - Dataöverföringssystem - Google Patents
DataöverföringssystemInfo
- Publication number
- SE9500081L SE9500081L SE9500081A SE9500081A SE9500081L SE 9500081 L SE9500081 L SE 9500081L SE 9500081 A SE9500081 A SE 9500081A SE 9500081 A SE9500081 A SE 9500081A SE 9500081 L SE9500081 L SE 9500081L
- Authority
- SE
- Sweden
- Prior art keywords
- clock
- clock domain
- speed
- pct
- domain
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
- G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M9/00—Parallel/series conversion or vice versa
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Time-Division Multiplex Systems (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE9500081A SE515563C2 (sv) | 1995-01-11 | 1995-01-11 | Dataöverföringssystem |
AU44616/96A AU4461696A (en) | 1995-01-11 | 1996-01-10 | A data transmission system |
JP8521599A JPH10512410A (ja) | 1995-01-11 | 1996-01-10 | データ伝送システム |
US08/860,256 US6009107A (en) | 1995-01-11 | 1996-01-10 | Data transmission system |
EP96900752A EP0803089A1 (en) | 1995-01-11 | 1996-01-10 | A data transmission system |
PCT/SE1996/000010 WO1996021897A1 (en) | 1995-01-11 | 1996-01-10 | A data transmission system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE9500081A SE515563C2 (sv) | 1995-01-11 | 1995-01-11 | Dataöverföringssystem |
Publications (3)
Publication Number | Publication Date |
---|---|
SE9500081D0 SE9500081D0 (sv) | 1995-01-11 |
SE9500081L true SE9500081L (sv) | 1996-07-12 |
SE515563C2 SE515563C2 (sv) | 2001-08-27 |
Family
ID=20396792
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SE9500081A SE515563C2 (sv) | 1995-01-11 | 1995-01-11 | Dataöverföringssystem |
Country Status (6)
Country | Link |
---|---|
US (1) | US6009107A (sv) |
EP (1) | EP0803089A1 (sv) |
JP (1) | JPH10512410A (sv) |
AU (1) | AU4461696A (sv) |
SE (1) | SE515563C2 (sv) |
WO (1) | WO1996021897A1 (sv) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6393502B1 (en) * | 1999-08-31 | 2002-05-21 | Advanced Micro Devices, Inc. | System and method for initiating a serial data transfer between two clock domains |
US6369614B1 (en) * | 2000-05-25 | 2002-04-09 | Sun Microsystems, Inc. | Asynchronous completion prediction |
US7047196B2 (en) | 2000-06-08 | 2006-05-16 | Agiletv Corporation | System and method of voice recognition near a wireline node of a network supporting cable television and/or video delivery |
US7039074B1 (en) * | 2000-09-14 | 2006-05-02 | Agiletv Corporation | N-way demultiplexer |
US8095370B2 (en) | 2001-02-16 | 2012-01-10 | Agiletv Corporation | Dual compression voice recordation non-repudiation system |
US6977980B2 (en) * | 2001-08-29 | 2005-12-20 | Rambus Inc. | Timing synchronization methods and systems for transmit parallel interfaces |
US7451338B2 (en) * | 2005-09-30 | 2008-11-11 | Intel Corporation | Clock domain crossing |
US7921243B1 (en) * | 2007-01-05 | 2011-04-05 | Marvell International Ltd. | System and method for a DDR SDRAM controller |
Family Cites Families (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2300470A1 (fr) * | 1975-02-05 | 1976-09-03 | Cit Alcatel | Dispositif de synchronisation d'un train d'informations binaires sur un autre |
FR2552916B1 (fr) * | 1983-09-29 | 1988-06-10 | Thomas Alain | File d'attente asynchrone a empilement de registres |
US4803654A (en) * | 1985-06-20 | 1989-02-07 | General Datacomm Industries, Inc. | Circular first-in, first out buffer system for generating input and output addresses for read/write memory independently |
EP0206743A3 (en) * | 1985-06-20 | 1990-04-25 | Texas Instruments Incorporated | Zero fall-through time asynchronous fifo buffer with nonambiguous empty/full resolution |
NL8503250A (nl) * | 1985-11-26 | 1987-06-16 | Philips Nv | Bewakingsschakeling voor een niet-gecodeerde binaire bitstroom. |
US4748588A (en) * | 1985-12-18 | 1988-05-31 | International Business Machines Corp. | Fast data synchronizer |
US5134702A (en) * | 1986-04-21 | 1992-07-28 | Ncr Corporation | Serial-to-parallel and parallel-to-serial converter |
US5084837A (en) * | 1988-01-22 | 1992-01-28 | Sharp Kabushiki Kaisha | Fifo buffer with folded data transmission path permitting selective bypass of storage |
US5142529A (en) * | 1988-12-09 | 1992-08-25 | Transwitch Corporation | Method and means for transferring a data payload from a first SONET signal to a SONET signal of different frequency |
JPH02246442A (ja) * | 1989-03-17 | 1990-10-02 | Fujitsu Ltd | 光中継器の位相補償方式 |
DE3922897A1 (de) * | 1989-07-12 | 1991-01-17 | Philips Patentverwaltung | Stopfentscheidungsschaltung fuer eine anordnung zur bitratenanpassung |
US5402425A (en) * | 1990-07-10 | 1995-03-28 | Telefonaktiebolaget L M Ericsson | Phase locking circuit for jitter reduction in a digital multiplex system |
NL9002426A (nl) * | 1990-11-08 | 1992-06-01 | Koninkl Philips Electronics Nv | Elastisch buffergeheugen. |
US5256912A (en) * | 1991-12-19 | 1993-10-26 | Sun Microsystems, Inc. | Synchronizer apparatus for system having at least two clock domains |
US5319597A (en) * | 1992-06-02 | 1994-06-07 | Texas Instruments Incorporated | FIFO memory and line buffer |
US5285206A (en) * | 1992-08-25 | 1994-02-08 | Alcatel Network Systems, Inc. | Phase detector for elastic store |
US5400340A (en) * | 1993-03-04 | 1995-03-21 | Apple Computer, Inc. | End of packet detector and resynchronizer for serial data buses |
SE503702C2 (sv) * | 1993-10-12 | 1996-08-05 | Ericsson Telefon Ab L M | Signalbearbetande enhet vilken omvandlar ingående överföringshastighet till en därifrån skild utgående överföringshastighet |
FI94697C (sv) * | 1993-10-14 | 1995-10-10 | Nokia Telecommunications Oy | Förfarande för att förverkliga buffring i ett digitalt datakommunikationssystem samt en buffert |
KR960009536B1 (en) * | 1993-12-21 | 1996-07-20 | Korea Electronics Telecomm | Apparatus for arranging frame phase |
-
1995
- 1995-01-11 SE SE9500081A patent/SE515563C2/sv not_active IP Right Cessation
-
1996
- 1996-01-10 AU AU44616/96A patent/AU4461696A/en not_active Abandoned
- 1996-01-10 EP EP96900752A patent/EP0803089A1/en not_active Withdrawn
- 1996-01-10 US US08/860,256 patent/US6009107A/en not_active Expired - Lifetime
- 1996-01-10 JP JP8521599A patent/JPH10512410A/ja active Pending
- 1996-01-10 WO PCT/SE1996/000010 patent/WO1996021897A1/en not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
SE9500081D0 (sv) | 1995-01-11 |
EP0803089A1 (en) | 1997-10-29 |
AU4461696A (en) | 1996-07-31 |
US6009107A (en) | 1999-12-28 |
JPH10512410A (ja) | 1998-11-24 |
SE515563C2 (sv) | 2001-08-27 |
WO1996021897A1 (en) | 1996-07-18 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE60141613D1 (de) | Konfigurierbarer Modulator | |
KR940012968A (ko) | 프레임을 기초로한 데이타 전송 | |
EP0228214A3 (en) | Apparatus and associated methods for converting serial data pattern signals transmitted or suitable for transmission over a high speed synchronous serial transmission media, to parallel pattern output signals | |
EP1014615A3 (en) | Full duplex transmission | |
SE9500081L (sv) | Dataöverföringssystem | |
DE69531597D1 (de) | Testmethode und flipflop mit mutter- und tochtereinheit umfassender elektronischer schaltkreis | |
KR960025082A (ko) | 데이타 전송장치 | |
ATE104103T1 (de) | Nachrichtenuebertragungssystem. | |
KR910003475A (ko) | 시퀀스 제어장치 | |
SE9501176D0 (sv) | Anordning och förfarande vid en integrerad krets | |
SE9601946L (sv) | Anordningskort och förfarande vid telekommunikationsutrustning | |
KR100210780B1 (ko) | 프로세서와 디바이스간의 타임 슬롯 스위치의 데이터 정합회로 | |
KR970056340A (ko) | 패킷데이타 전송장치 및 전송방법 | |
KR920005487A (ko) | 프로그래머블 로직 소자의 입력회로 | |
KR910002064A (ko) | 전류 차동 릴레이(relay) | |
KR960025132A (ko) | 멀티미디어 네트워크의 채널제어방법 | |
KR950022599A (ko) | 전전자 교환기용 pcm 데이타 변환 및 역다중화 회로 | |
KR940012139A (ko) | 장거리 인터페이스 장치의 버스 중계회로 | |
TW280888B (en) | Device for performing signal transmission between chip sets | |
JPS5738041A (en) | Signal synchronizing system | |
KR910010939A (ko) | 데이타 통신 및 단일장치의 전류 루프 정합회로 | |
KR950020632A (ko) | 스테레오 오디오 14채널의 저전송 비트율 접속(low bit rate connection)이 가능한 DS3 송.수신 분리 다중/역다중장치 | |
JPS59112746A (ja) | 多重集配信方式 | |
KR970056179A (ko) | 다수개의 정보중 하나의 정보만을 불확정 전송하는 전송 방법 | |
KR970060788A (ko) | 씨피유 보드에서의 인터럽트신호 전달 장치 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
NUG | Patent has lapsed |