SE8306663L - Forfarande for framstellning av halvledaranordning - Google Patents

Forfarande for framstellning av halvledaranordning

Info

Publication number
SE8306663L
SE8306663L SE8306663A SE8306663A SE8306663L SE 8306663 L SE8306663 L SE 8306663L SE 8306663 A SE8306663 A SE 8306663A SE 8306663 A SE8306663 A SE 8306663A SE 8306663 L SE8306663 L SE 8306663L
Authority
SE
Sweden
Prior art keywords
silicon
wafer
nickel
metallization
layer
Prior art date
Application number
SE8306663A
Other languages
English (en)
Swedish (sv)
Other versions
SE8306663D0 (sv
Inventor
A Nilarp
H J Gould
Original Assignee
Int Rectifier Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US06/447,760 external-priority patent/US4878099A/en
Application filed by Int Rectifier Corp filed Critical Int Rectifier Corp
Publication of SE8306663D0 publication Critical patent/SE8306663D0/xx
Publication of SE8306663L publication Critical patent/SE8306663L/xx

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/069—Manufacture or treatment of conductive parts of the interconnections by forming self-aligned vias or self-aligned contact plugs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/42—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
    • H10P14/44—Physical vapour deposition [PVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/60—Wet etching
    • H10P50/64—Wet etching of semiconductor materials
    • H10P50/642—Chemical etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/60—Wet etching
    • H10P50/64—Wet etching of semiconductor materials
    • H10P50/642—Chemical etching
    • H10P50/644—Anisotropic liquid etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P54/00—Cutting or separating of wafers, substrates or parts of devices

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Weting (AREA)
  • Die Bonding (AREA)
SE8306663A 1982-12-08 1983-12-02 Forfarande for framstellning av halvledaranordning SE8306663L (sv)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US44776182A 1982-12-08 1982-12-08
US06/447,760 US4878099A (en) 1982-12-08 1982-12-08 Metallizing system for semiconductor wafers

Publications (2)

Publication Number Publication Date
SE8306663D0 SE8306663D0 (sv) 1983-12-02
SE8306663L true SE8306663L (sv) 1984-06-09

Family

ID=27035081

Family Applications (1)

Application Number Title Priority Date Filing Date
SE8306663A SE8306663L (sv) 1982-12-08 1983-12-02 Forfarande for framstellning av halvledaranordning

Country Status (5)

Country Link
DE (1) DE3344462A1 (enFirst)
FR (1) FR2537778B1 (enFirst)
GB (2) GB2132412B (enFirst)
IT (1) IT1194505B (enFirst)
SE (1) SE8306663L (enFirst)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3301666A1 (de) * 1983-01-20 1984-07-26 Brown, Boveri & Cie Ag, 6800 Mannheim Verfahren zur herstellung einer mehrschichtigen kontaktmetallisierung
JPH07118534B2 (ja) * 1990-02-22 1995-12-18 三菱電機株式会社 半導体装置の製造方法
US5422286A (en) * 1994-10-07 1995-06-06 United Microelectronics Corp. Process for fabricating high-voltage semiconductor power device
CN1241253C (zh) * 2002-06-24 2006-02-08 丰田合成株式会社 半导体元件的制造方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL289148A (enFirst) * 1961-08-12
US3288662A (en) * 1963-07-18 1966-11-29 Rca Corp Method of etching to dice a semiconductor slice
DE1258235B (de) * 1965-01-04 1968-01-04 Licentia Gmbh Verfahren zur Herstellung einer, die Sperrspannungsfestigkeit erhoehenden Randzonenprofilierung von Siliziumscheiben
DE1286641B (de) * 1966-08-26 1969-01-09 Bosch Gmbh Robert Verfahren zur Kontaktierung einer Halbleiteranordnung
DE1789062C3 (de) * 1968-09-30 1978-11-30 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zum Herstellen von Metallkontaktschichten für Halbleiteranordnungen
IT995593B (it) * 1972-12-11 1975-11-20 Rca Corp Dispositivo semiconduttore con connessioni a barretta e metodo di fabbricazione dello stesso
DE2332822B2 (de) * 1973-06-28 1978-04-27 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Verfahren zum Herstellen von diffundierten, kontaktierten und oberflächenpassivierten Halbleiterbauelementen aus Halbleiterscheiben aus Silizium
GB1487201A (en) * 1974-12-20 1977-09-28 Lucas Electrical Ltd Method of manufacturing semi-conductor devices
US4042951A (en) * 1975-09-25 1977-08-16 Texas Instruments Incorporated Gold-germanium alloy contacts for a semiconductor device
IN144812B (enFirst) * 1976-01-22 1978-07-15 Westinghouse Electric Corp
IT1059086B (it) * 1976-04-14 1982-05-31 Ates Componenti Elettron Procedimento per la passivazione di dispositivi a semiconduttore di potenza ad alta tensione inversa
DE2656015A1 (de) * 1976-12-10 1978-06-15 Bbc Brown Boveri & Cie Verfahren zum herstellen von halbleiterbauelementen
DE2709802A1 (de) * 1977-03-07 1978-09-14 Siemens Ag Verfahren zur entfernung von bei ionenimplantationsprozessen in halbleitersystemen entstehenden verunreinigungen
GB2064860B (en) * 1979-10-18 1984-01-25 Gen Electric Method for metallizing a semiconductor element
CA1164734A (en) * 1980-07-11 1984-04-03 Michael Schneider Method for applying an anti-reflection coating to a solar cell
US4339869A (en) * 1980-09-15 1982-07-20 General Electric Company Method of making low resistance contacts in semiconductor devices by ion induced silicides

Also Published As

Publication number Publication date
FR2537778B1 (fr) 1986-12-19
GB2132412A (en) 1984-07-04
FR2537778A1 (fr) 1984-06-15
GB2132412B (en) 1987-08-19
DE3344462A1 (de) 1984-06-20
GB8529225D0 (en) 1986-01-02
SE8306663D0 (sv) 1983-12-02
DE3344462C2 (enFirst) 1989-12-28
GB2168843A (en) 1986-06-25
IT1194505B (it) 1988-09-22
GB8332808D0 (en) 1984-01-18
GB2168843B (en) 1987-08-19
IT8324070A0 (it) 1983-12-06

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