SE449678B - Forfarande for framstellning av byggelement for sammankoppling av elektroniska komponenter - Google Patents

Forfarande for framstellning av byggelement for sammankoppling av elektroniska komponenter

Info

Publication number
SE449678B
SE449678B SE8202170A SE8202170A SE449678B SE 449678 B SE449678 B SE 449678B SE 8202170 A SE8202170 A SE 8202170A SE 8202170 A SE8202170 A SE 8202170A SE 449678 B SE449678 B SE 449678B
Authority
SE
Sweden
Prior art keywords
coating
wire
metal
carrier
resp
Prior art date
Application number
SE8202170A
Other languages
English (en)
Swedish (sv)
Other versions
SE8202170L (sv
Inventor
C L Lassen
Original Assignee
Kollmorgen Tech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kollmorgen Tech Corp filed Critical Kollmorgen Tech Corp
Publication of SE8202170L publication Critical patent/SE8202170L/xx
Publication of SE449678B publication Critical patent/SE449678B/sv

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5384Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/486Via connections through the substrate with or without pins
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • H05K1/112Pads for surface mounting, e.g. lay-out directly combined with via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00Constructional details common to different types of electric apparatus
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    • H05K7/06Arrangements of circuit components or wiring on supporting structure on insulating boards, e.g. wiring harnesses
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    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
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    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
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    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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    • H05K2201/09372Pads and lands
    • H05K2201/09472Recessed pad for surface mounting; Recessed electrode of component
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    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10287Metal wires as connectors or conductors
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    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10727Leadless chip carrier [LCC], e.g. chip-modules for cards
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    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/103Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by bonding or embedding conductive wires or strips
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    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3442Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/24Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24273Structurally defined web or sheet [e.g., overall dimension, etc.] including aperture
    • Y10T428/24322Composite web or sheet

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Chemically Coating (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
SE8202170A 1981-04-14 1982-04-05 Forfarande for framstellning av byggelement for sammankoppling av elektroniska komponenter SE449678B (sv)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/254,132 US4500389A (en) 1981-04-14 1981-04-14 Process for the manufacture of substrates to interconnect electronic components

Publications (2)

Publication Number Publication Date
SE8202170L SE8202170L (sv) 1982-10-15
SE449678B true SE449678B (sv) 1987-05-11

Family

ID=22963047

Family Applications (1)

Application Number Title Priority Date Filing Date
SE8202170A SE449678B (sv) 1981-04-14 1982-04-05 Forfarande for framstellning av byggelement for sammankoppling av elektroniska komponenter

Country Status (13)

Country Link
US (1) US4500389A (fr)
JP (1) JPS5979594A (fr)
AT (1) AT385624B (fr)
AU (1) AU559827B2 (fr)
CA (1) CA1189196A (fr)
CH (1) CH660275A5 (fr)
DE (1) DE3211025A1 (fr)
ES (3) ES8304363A1 (fr)
FR (1) FR2503931B1 (fr)
GB (2) GB2096834B (fr)
IT (1) IT1147672B (fr)
NL (1) NL191641C (fr)
SE (1) SE449678B (fr)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3373610D1 (en) * 1982-12-22 1987-10-15 Ibm Method and apparatus for embedding wire in a photocurable adhesive
EP0168602A1 (fr) * 1984-06-25 1986-01-22 Kollmorgen Technologies Corporation Procédé de fabrication de plaques de circuit d'interconnexion
US4581098A (en) * 1984-10-19 1986-04-08 International Business Machines Corporation MLC green sheet process
FR2573272A1 (fr) * 1984-11-14 1986-05-16 Int Standard Electric Corp Procede de realisation d'un substrat comportant un conducteur coaxial
US4711026A (en) * 1985-07-19 1987-12-08 Kollmorgen Technologies Corporation Method of making wires scribed circuit boards
FR2585210B1 (fr) * 1985-07-19 1994-05-06 Kollmorgen Technologies Corp Procede de fabrication de plaquettes a circuits d'interconnexion
US4818322A (en) * 1985-07-19 1989-04-04 Kollmorgen Technologies Corporation Method for scribing conductors via laser
US4693778A (en) * 1985-07-19 1987-09-15 Kollmorgen Technologies Corporation Apparatus for making scribed circuit boards and circuit board modifications
US4679321A (en) * 1985-10-18 1987-07-14 Kollmorgen Technologies Corporation Method for making coaxial interconnection boards
US4743710A (en) * 1985-10-18 1988-05-10 Kollmorgen Technologies Corporation Coaxial interconnection boards
US4972050A (en) * 1989-06-30 1990-11-20 Kollmorgen Corporation Wire scribed circuit boards and methods of their manufacture
JP2811811B2 (ja) * 1989-10-03 1998-10-15 三菱電機株式会社 液晶表示装置
DE69122570T2 (de) * 1990-07-25 1997-02-13 Hitachi Chemical Co Ltd Leiterplatte mit Verbindung von Koaxialleitern untereinander
DE4037488A1 (de) * 1990-11-24 1992-05-27 Bosch Gmbh Robert Leistungsbausteine mit elektrisch isolierender thermischer ankopplung
US7062845B2 (en) 1996-06-05 2006-06-20 Laservia Corporation Conveyorized blind microvia laser drilling system
US6631558B2 (en) 1996-06-05 2003-10-14 Laservia Corporation Blind via laser drilling system
WO1997046349A1 (fr) * 1996-06-05 1997-12-11 Burgess Larry W Systeme laser de perçage de trous borgnes
US6005991A (en) * 1997-11-26 1999-12-21 Us Conec Ltd Printed circuit board assembly having a flexible optical circuit and associated fabrication method
DE102006059127A1 (de) * 2006-09-25 2008-03-27 Osram Opto Semiconductors Gmbh Verfahren zur Herstellung einer Anordnung optoelektronischer Bauelemente und Anordnung optoelektronischer Bauelemente
DE102012223077A1 (de) * 2012-12-13 2014-06-18 Robert Bosch Gmbh Kontaktanordnung für einen mehrlagigen Schaltungsträger

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE394600B (sv) * 1967-03-17 1977-07-04 Thams J P B Forfarande for framstellning av en beleggning med onskad ytstruktur pa ett foremal
US3499219A (en) * 1967-11-06 1970-03-10 Bunker Ramo Interconnection means and method of fabrication thereof
US3674914A (en) * 1968-02-09 1972-07-04 Photocircuits Corp Wire scribed circuit boards and method of manufacture
DE1690347A1 (de) * 1968-02-24 1971-05-13 Telefunken Patent Verfahren zur Herstellung einer Verdrahtungsplatte
US3674602A (en) * 1969-10-09 1972-07-04 Photocircuits Corp Apparatus for making wire scribed circuit boards
JPS5550399B1 (fr) * 1970-03-05 1980-12-17
GB1379558A (en) * 1971-05-15 1975-01-02 Int Computers Ltd Methods of manufacture of multilayer circuit structures
CA1001320A (en) * 1972-02-28 1976-12-07 Robert P. Burr Electric wiring assemblies
US4030190A (en) * 1976-03-30 1977-06-21 International Business Machines Corporation Method for forming a multilayer printed circuit board
ZA781637B (en) * 1977-06-20 1979-02-28 Kollmorgen Tech Corp Wire scribed circuit board and method for the manufacture thereof
ZA775455B (en) * 1977-08-09 1978-07-26 Kollmorgen Tech Corp Improved methods and apparatus for making scribed circuit boards
US4258468A (en) * 1978-12-14 1981-03-31 Western Electric Company, Inc. Forming vias through multilayer circuit boards
JPS5810893A (ja) * 1981-07-14 1983-01-21 日本電気株式会社 配線板およびその製造方法
JPS5857782A (ja) * 1981-10-01 1983-04-06 日本電気株式会社 配線板およびその製造方法
DE3373610D1 (en) * 1982-12-22 1987-10-15 Ibm Method and apparatus for embedding wire in a photocurable adhesive

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Publication number Publication date
ATA116582A (de) 1987-09-15
AT385624B (de) 1988-04-25
NL191641B (nl) 1995-07-17
ES513839A0 (es) 1983-11-01
AU8793982A (en) 1984-03-08
ES511413A0 (es) 1983-03-01
CH660275A5 (de) 1987-03-31
GB8422466D0 (en) 1984-10-10
ES8503920A1 (es) 1985-03-16
JPS5979594A (ja) 1984-05-08
NL8201570A (nl) 1982-11-01
AU559827B2 (en) 1987-03-19
GB2146177A (en) 1985-04-11
ES513838A0 (es) 1985-03-16
FR2503931B1 (fr) 1986-02-21
ES8304363A1 (es) 1983-03-01
FR2503931A1 (fr) 1982-10-15
GB2146177B (en) 1985-10-23
GB2096834A (en) 1982-10-20
IT8248207A0 (it) 1982-04-09
SE8202170L (sv) 1982-10-15
US4500389A (en) 1985-02-19
CA1189196A (fr) 1985-06-18
IT1147672B (it) 1986-11-26
ES8400213A1 (es) 1983-11-01
DE3211025C2 (fr) 1991-11-21
GB2096834B (en) 1985-10-23
DE3211025A1 (de) 1982-10-21
NL191641C (nl) 1995-11-20

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