RU2016146517A - Матричная подложка и способ ее возбуждения и устройство отображения - Google Patents

Матричная подложка и способ ее возбуждения и устройство отображения Download PDF

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RU2016146517A
RU2016146517A RU2016146517A RU2016146517A RU2016146517A RU 2016146517 A RU2016146517 A RU 2016146517A RU 2016146517 A RU2016146517 A RU 2016146517A RU 2016146517 A RU2016146517 A RU 2016146517A RU 2016146517 A RU2016146517 A RU 2016146517A
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RU2693559C2 (ru
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Вэньбо Ли
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Боэ Текнолоджи Груп Ко., Лтд.
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    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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Claims (42)

1. Матричная подложка, содержащая множество линий затвора, множество линий данных и множество субпикселов, ограниченных линиями затвора и линиями данных, пересекающимися друг друга,
при этом по меньшей мере одна дополнительная линия для обеспечения дополнительного сигнала данных размещена между субпикселами в двух смежных столбцах, субпикселы в одном и том же столбце соответствуют, по меньшей мере, одной дополнительной линии, и, по меньшей мере, один субпиксел из числа субпикселов в одном и том же столбце возбуждается посредством дополнительной линии, соответствующей, по меньшей мере, одному субпикселу.
2. Матричная подложка по п. 1, в которой одна дополнительная линия размещена между субпикселами в двух смежных столбцах,
субпикселы в одном и том же столбце соответствуют одной линии данных и одной дополнительной линии,
модули переключения субпикселов в (2i+1)-ой строке соединены с линией данных, соответствующей субпикселам,
модули переключения субпикселов в (2i+2)-ой строке соединены с дополнительной линией, соответствующей субпикселам, и
i является целым числом, большим или равным 0.
3. Матричная подложка по п. 1, в которой две дополнительных линии размещены между субпикселами в двух смежных столбцах,
субпикселы в одном и том же столбце соответствуют одной линии данных и двум дополнительным линиям,
две дополнительных линии содержат первую дополнительную линию и вторую дополнительную линию,
модули переключения субпикселов в (3i+1)-ой строке соединены с линиями данных, соответствующими субпикселам,
модули переключения субпикселов в (3i+2)-ой строке соединены с первыми дополнительными линиями, соответствующими субпикселам,
модули переключения субпикселов в (3i+3)-ей строке соединены со вторыми дополнительными линиями, соответствующими субпикселам, и
i является целым числом, большим или равным 0.
4. Матричная подложка по п. 3, в которой первая дополнительная линия размещена между субпикселами и второй дополнительной линией,
электрод истока модуля переключения каждого субпиксела из числа субпикселов в (3i+3)-ей строке снабжен первым сквозным отверстием,
вторая дополнительная линия снабжена вторым сквозным отверстием, и
электрод истока модуля переключения каждого субпиксела из числа субпикселов в (3i+3)-ей строке соединен со второй дополнительной линией первым перекрывающим электродным слоем посредством первого сквозного отверстия и второго сквозного отверстия.
5. Матричная подложка по п. 4, в которой ширина части первой дополнительной линии, перекрывающей первый перекрывающий электродный слой, меньше ширины другой части первой дополнительной линии, или
ширина части первого перекрывающего электродного слоя, перекрывающего первую дополнительную линию, меньше ширины другой части первого перекрывающего электродного слоя.
6. Матричная подложка по п. 4, в которой ширина части второй дополнительной линии, снабженной вторым сквозным отверстием, превышает ширину другой части второй дополнительной линии, или
ширина части первого перекрывающего электродного слоя, перекрывающего вторую дополнительную линию, превышает ширину другой части первого перекрывающего электродного слоя.
7. Матричная подложка по п. 3, в которой первая дополнительная линия размещена между субпикселами и второй дополнительной линией, и
первая дополнительная линия разделена на верхнюю часть и нижнюю часть в позиции, в которой вторая дополнительная линия соединена с электродом истока модуля переключения, каждая из верхней части и нижней части первой дополнительной линии снабжена четвертым сквозным отверстием, посредством которого верхняя часть и нижняя часть первой дополнительной линии электрически соединены между собой вторым перекрывающим электродным слоем.
8. Матричная подложка по п. 1, в которой направление прохождения каждой дополнительной линии является приблизительно идентичным направлению прохождения линии данных.
9. Матричная подложка по п. 1, в которой все или части дополнительных линий размещены в слое и изготовлены из материала, идентичного линиям данных.
10. Устройство отображения, содержащее матричную подложку по любому из пп. 1-9.
11. Способ для возбуждения матричной подложки, содержащий этапы, на которых:
вводят сигнал сканирования в по меньшей мере две линии затвора одновременно,
вводят сигнал данных в субпикселы, управляемые посредством одной из линий затвора, через линии данных, и
вводят дополнительный сигнал данных в субпикселы, управляемые посредством других линий затвора через по меньшей мере одну дополнительную линию.
12. Способ по п. 11, в котором, когда модули переключения субпикселов в (2i+1)-ой строке соединены с линиями данных, соответствующими субпикселам, и модули переключения субпикселов в (2i+2)-ой строке соединены с дополнительной линией, соответствующей субпикселам, способ содержит этапы, на которых:
вводят сигнал сканирования в линии затвора в (2i+1)-ой строке и в (2i+2)-ой строке одновременно,
вводят сигнал данных в каждый субпиксел в (2i+1)-ой строке через линию данных, и
вводят дополнительный сигнал данных в каждый субпиксел в (2i+2)-ой строке через дополнительную линию,
при этом i является целым числом, большим или равным 0.
13. Способ по п. 11, в котором, когда две дополнительных линии размещены между субпикселами в двух смежных столбцах, субпикселамы в одном и том же столбце соответствуют одной линии данных и двум дополнительным линиям, две дополнительных линии содержат первую дополнительную линию и вторую дополнительную линию, модули переключения субпикселов в (3i+1)-ой строке соединены с линиями данных, соответствующими субпикселам, модули переключения субпикселов в (3i+2)-ой строке соединены с первой дополнительной линией, соответствующей субпикселам, и модули переключения субпикселов в (3i+3)-ей строке соединены со второй дополнительной линией, соответствующей субпикселам, способ содержит этапы, на которых:
вводят сигнал сканирования в линии затвора в (3i+1)-ой строке, в (3i+2)-ой строке и в (3i+3)-ей строке одновременно,
вводят сигнал данных в каждый субпиксел в (3i+1)-ой строке через линию данных,
вводят первый дополнительный сигнал данных в каждый субпиксел в (3i+2)-ой строке через первую дополнительную линию, и
ввод второй дополнительный сигнал данных в каждый субпиксел в (3i+3)-ей строке через вторую дополнительную линию,
при этом i является целым числом, большим или равным 0.
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