RU1787471C - Electronic game control device - Google Patents

Abstract

The inventive device includes: two clocks 1, 2, player 3, element And 4, six triggers 5, 8, 18, 12,13, 26, three encoders 6,11,19, two counters 7, 16, divider frequency 9, two OR elements 10, 28, initial setting switch 14, attempt counter 15, pulse shaper 17, inverter 20, two decoders 21, 23, game situation indicator 22, score indicator 24, arithmetic logic device 25, register 27. 14-15-1-4-7-11-16-18-18-22; 15-2-5-8-16-10- 13-17-26-28-25-27-23-24; 3-6-10; 6-12-19-25; 1-8; 1-5-4; 1-9-16; 7-6; 8-18; 7-21; 7-19; 17-15; 14-25-27-23; 27-25; 27-28; 12-20-25; 17-27; 9-12. 2 tablets, 2 ill.

Description

The invention relates to gaming machines and can be used in electronic games.

The purpose of the invention is to increase the entertainingness of the game by complicating the game situation - increasing the number of target stimuli, distinguishing the time each stimulus is presented, during which the player must respond to the stimulus, and also due to the different number of points received by the player on successful attempts , and points by which the player is fined for erroneous actions.

In FIG. 1 is a block diagram of an electronic game control device; Fig. 2 is a timing diagram of voltages on circuit elements.

The essence of the game is as follows.

On the front panel of the device are images of 10 animals made in five colors (two figures of each color). At the center of each figure is a LED target. On the player’s console are five five-color pushbutton switches that shape animals. After starting the device, the target LEDs light up randomly, and the luminescence time of the targets of each of the colors is different. The player’s task is to press a button switch of the same color during the illumination of a target of a certain color. In the case of a successful attempt, the player receives from 1 to 5 points (the more, the less time is allocated to him to hit the target). If a player presses a switch of a different color, or if he presses the desired switch, he is late or does not fire a shot at all, he will be fined from 1 to 5 points (the more, the more time is given to the player to hit the target). In the game loop, a fixed number of targets are presented that the player can hit (e.g. 16). The one who gains the most points in the game cycle wins. Since during the game the number of bonus points received by the player in successful matches

with

X | 00

2

Xi

torture, there may be less than the number of penalty points, the player begins the game, having a initially fixed number of points (in our case 128), which during the game can increase or decrease.

In FIG. 1 the following notation is given: 1,2 - first and second clock generators; 3 - confuse the player with buttons of five colors; : 4 - element And; 5, 8, 12, 18, 13, 26 - first and last triggers; b, 21, 23, 11, 19 - the first fifth decoders; 7, 16, 15-first, second and third with e chiky; 9 - frequency divider; 28.10 - the first second elements OR; 14 - reset switch; 17 - pulse shaper; 20 - inverter; 22 - indicator of a game situation; 24 - points indicator; 25 - arithmetic-logical device; 27 is a register.

The device operates as follows ..

Before starting the game, press the reset switch -14. In this case, counter 15 is reset and the output level is low, the operation of the generators GT1 (1) and GT2 (2) is allowed. The trigger Tb (26) is set to zero, and the register 27 is reset, a high level from the inverse output of the trigger T6 (26) through the OR element 28 is supplied to the input A7 ALU, to the inputs AO-A6 from the output of the register RG (27) is fed zero code. Thus, the binary code of the decimal number 128 is applied to the inputs of AO-A7 ALU. High. The cue level from the output of the trigger T6 (26) is also supplied to the input of the blanking of the decoder 23 and the indicator of points 24 goes out. The oscillation period of the GT1 generator is 5–10 ms, and that of the GT2 generator is about 5–6 s. During the positive half-cycle of oscillations of GT2 (2), the voltage at the direct output of trigger T1 (5) is high, and the pulses of the generator GR1 (1) through the I / I element (4) go to the counter CT1 (7). The counter is repeatedly overflowing. After the voltage at the output of GT2 reaches a low level, the trigger And is set to zero, the supply of pulses to the input of the counter CT1 (7) will stop, and a random binary code of the number From 0000 to 1001 will be generated at the output of the counter (conversion factor counter is 10). At the output of the DC4 decoder (11), a four-bit binary code of the indicator luminance duration is generated. The duration t of pulses of presentation of the target stimulus varies between 250-450 ms in steps of BSGms. The pulse period at the output of the frequency divider is 50 ms. The decimal equivalent of the code at the output of the decoder 11 varies within 5-9 with step 1, Table 1 gives the correspondence of the input and output codes of the decoder 11 and the duration of the generated pulse.

As can be seen from figure 2, the voltage drop at the output of GT2 (2) at the output of the trigger T2

(8) a single pulse is formed, the duration of which is equal to half the period of the output pulses GT1, the Pulse from the output of the trigger T2 triggers TK (12), T4 (18) and T5 (13) are set to zero, and recorded in the counter CT2 (16) code from the output of the DC4 decoder (11). The low level from the output of the trigger T4 (18) allows the operation of the DC2 decoder (21), as a result one of the indicators HL1-HL10 is lit.

whose code is generated at the outputs of the SP counter. By pulses from the output of the frequency divider 9, the output code of the counter CT2 monotonically decreases to zero, after which, after a time interval t at the output P0

overflow of the counter forms a pulse of negative polarity, transferring the trigger T4 (18) to a single state. By supplying a high level to the input V of the DC2 decoder (21), the target indicator is suppressed. Thus, the time of illumination of the target is equal to 1. As noted above, during the illumination of the target, the player must press the button of the same color on his remote control. If none of the buttons

pressed, then at the first output of the decoder DC1 (6) a low is formed, and at the second output a high level. If during the presentation of the first target during the interval t 1 at time ti the player pressed the button

of the desired color, the voltage at the output 1 of the decoder 6 will take a high level, and the level at the output 2 will remain the same.

On the front of the pulse following the time ti at the output of the frequency divider 9,

trigger TK (12) is set to a single state. By the voltage drop at the direct output of the trigger TK (12), the trigger T5 (13) is set to a single state. The negative difference behind its inverse output starts the driver F (17) and a negative polarity pulse of duration t p arises at its output. In case of an error (if the player pressed a button of a different color than that presented

target), the voltage at output 2 of the DC1 decoder is low, and output 1 remains low. The state of the trigger TK (12) does not change. Low level output element OR 10

trigger T5 is reset to a single state, as a result of which, in this case, driver F (17) is also triggered.

If the player does not have time to press the button while the target is illuminated, an error is also counted. In this case, at the end of the pulse r2 (see Fig. 2), a low-level pulse from the overflow output P0 of the counter CT2 (16) supplied to the second input of the OR element 10, the trigger T5 (13) is set to a single state and, as in In previous cases, driver F (17) is started. As follows from the foregoing, a low level at the inverse output of the trigger ТЗ (12) during the action of the pulse of the shaper gr indicates a successful attempt by the player, a high level indicates an error. In case of a successful attempt, the player must receive bonus points, and in case of an error - penalty points. Therefore, at a low level at the inverse output of the trigger TK (12), the code at the inputs P0, S4-S1 is 11001, which corresponds to operation A + B. At a high level on the inverse output of the trigger TK, the operation code 00110 corresponds to operation AB.

Depending on the code at inputs 1-4 of the DC5 decoder (19) and the voltage level at input 5 of this decoder, a code for the number of points is generated at its output, which is either added to the code of the number at input A of the arithmetic-logic device in case of a successful attempt or is subtracted from this code in case of an error.

Table 2 of the truth of the DC5 decoder is made up of the condition that the LEDs HL1 and HL2, HL3 and HL4, HL5 and HL6, HL7u hL8, HL9 and HL10 are pairwise arranged in targets of the same color.

After the first attempt, thus, the following information is displayed at the inputs of ALU 25: at input A, the binary code of 128, at input B, the code for the number of award (in case of a successful attempt) or penalty (in case of an error) points at the inputs of Po , S4-S1 respectively the code of the operation of summing (11001) or subtracting (00110). The result code of the performed operation is generated at the ALU output and is written to the register RG (27) along the pulse edge of the driver F (17), the trigger T6 (26) is transferred to the same state on the same front, the blanking is removed from the DC3 decoder (23), and the indicator 24 shows the number of points that the player has after the first attempt. Further, the state of the trigger T6 does not change until the end of the game cycle. The front of the generator pulse increases the code at the output of the STZ counter (15) by 1. The code from the outputs 1–7 of register 27 is supplied to the inputs of AO-AB ALU directly, and the voltage from the output of register 8 through the logical element OR (28) is supplied to input A7 ALU (25).

The processing unit of the test results is restored to its initial state by another negative difference at the output of the TT2 generator (2), according to which a short pulse of negative polarity is generated at the output 5 of the trigger T2 (8).

Subsequently, during the next attempt, the result of the previous attempt is sent to the A ALU input, to the B code the bonus or penalty points to input B, to the S input, the A + B or A-B operation code, depending on the player’s actions in this attempt.

After each attempt, the code at the output of the counter of attempts STZ (15) is increased by

5 1. After the sixteenth attempt, the voltage at the output of the high-order bit of the counter is high and the generators GT1 and GT2 are blocked. Subsequent presentation of the target stimuli does not

0 occurs and the results on indicator 24 do not change. Game over. To resume it, press the switch 14 of the initial installation,

Decoders DC1, DC4, DC5 can

5 should be implemented on permanent storage devices: DC1 - on the chip K556PT5, and DC4, DC5 - on the chips K155REZ. ALU can be performed on two K155IPZ microcircuits. DC3 decoder

0 can be implemented on 3 K420IP2 microcircuits. The remaining nodes can be implemented on standard K155 series microcircuits.

Thus, the proposed device 5 provides an increase in the entertaining game due to the complication of the game situation, differentiated reward and punishment in case of successful attempts and errors.

Claims (1)

Formula of the invention An electronic game control device comprising a player console, outputs connected to the inputs of the first decoder, second and third decoders, outputs 5 connected to the inputs of the corresponding display units, the first counter associated with the inputs of the fourth decoder, the second counter and reset switch associated with installation input of the third counter, code converter, register, clock: pulse generators with a combined input, the fifth decoder and pulse generator, characterized in that, 5 in order to increase the amusement, it additionally contains triggers, a frequency divider, an AND element, an OR element, and an inverter connected to the first inputs of the code converter, the output of which is connected to the information inputs register, the first outputs connected to the first inputs of the third decoder and the second inputs of the code converter, the output of the first clock generator is connected directly to the first input of the And element, the control input of the first trigger, the installation input of the second trigger and through the frequency divider - with the subtracting input of the second counter and with the control input of the third trigger, the inverse output of which is connected to the first input of the fifth decoder, the inverter input and the third inputs of the code converter, the output of the second The output generator is connected to the information input of the first trigger, the inverse output of which is connected to the control input of the second trigger, the inverse output of the second counter and the third, fourth and fifth triggers connected to the installation inputs, whose inverse output is connected to the control inputs of the third a counter, a sixth trigger, and a register, the second output of which is connected to the second input of the third decoder and the first input of the first OR element, the output associated with the fourth input of the converter Code name, the first output of the first decoder is associated with information 5 0 5 0 the input of the third trigger, the direct output of which is connected to the first control input of the fifth trigger, the second output of the first decoder is connected to the first input of the second OR element, the output connected to the second control input of the fifth trigger, the direct output of the first trigger is connected to the second input of the And element, the output of which is connected to the control input of the first counter, the output connected to the first inputs of the second decoder and the second inputs of the first and fifth decoders, the output of the latter is connected to the fifth input of the pre code reader, the output of the fourth decoder is connected to the information inputs of the second counter, the output connected to the second input of the second OR element and the control input of the fourth trigger, the direct output of which is connected to the installation input of the second decoder, the second output of the Reset switch is connected to the installation inputs of the register and the sixth trigger, the inverse output of which is connected to the second input of the first OR element and the clock input of the third decoder, and the output of the third counter is connected to the input of the second generator torus of clock pulses. Table Table 2