PL117841B1 - Semiconductor element and method of fabrication thereof rovodnikovogo ehlementa - Google Patents

Semiconductor element and method of fabrication thereof rovodnikovogo ehlementa Download PDF

Info

Publication number
PL117841B1
PL117841B1 PL1978204821A PL20482178A PL117841B1 PL 117841 B1 PL117841 B1 PL 117841B1 PL 1978204821 A PL1978204821 A PL 1978204821A PL 20482178 A PL20482178 A PL 20482178A PL 117841 B1 PL117841 B1 PL 117841B1
Authority
PL
Poland
Prior art keywords
layer
passivating
semiconductor element
passivating material
semiconductor
Prior art date
Application number
PL1978204821A
Other languages
English (en)
Polish (pl)
Other versions
PL204821A1 (pl
Inventor
Walter A Hicinbothen
Ming L Tarng
Original Assignee
Rca Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rca Corp filed Critical Rca Corp
Publication of PL204821A1 publication Critical patent/PL204821A1/xx
Publication of PL117841B1 publication Critical patent/PL117841B1/pl

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H01L23/3171—Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02178—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Formation Of Insulating Films (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Photovoltaic Devices (AREA)
PL1978204821A 1977-02-24 1978-02-22 Semiconductor element and method of fabrication thereof rovodnikovogo ehlementa PL117841B1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US77174977A 1977-02-24 1977-02-24

Publications (2)

Publication Number Publication Date
PL204821A1 PL204821A1 (pl) 1978-11-06
PL117841B1 true PL117841B1 (en) 1981-08-31

Family

ID=25092854

Family Applications (1)

Application Number Title Priority Date Filing Date
PL1978204821A PL117841B1 (en) 1977-02-24 1978-02-22 Semiconductor element and method of fabrication thereof rovodnikovogo ehlementa

Country Status (10)

Country Link
JP (1) JPS53105979A (en:Method)
BE (1) BE864271A (en:Method)
DE (1) DE2806492A1 (en:Method)
FR (1) FR2382095B1 (en:Method)
GB (1) GB1552760A (en:Method)
IN (1) IN147578B (en:Method)
IT (1) IT1092729B (en:Method)
PL (1) PL117841B1 (en:Method)
SE (1) SE7801092L (en:Method)
YU (1) YU42276B (en:Method)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3021175A1 (de) * 1980-06-04 1981-12-10 Siemens AG, 1000 Berlin und 8000 München Verfahren zum passivieren von siliciumbauelementen
FR2487576A1 (fr) * 1980-07-24 1982-01-29 Thomson Csf Procede de fabrication de diodes mesa glassivees
US4344985A (en) 1981-03-27 1982-08-17 Rca Corporation Method of passivating a semiconductor device with a multi-layer passivant system by thermally growing a layer of oxide on an oxygen doped polycrystalline silicon layer
US4420765A (en) 1981-05-29 1983-12-13 Rca Corporation Multi-layer passivant system
JPS60208886A (ja) * 1984-03-31 1985-10-21 株式会社東芝 電子部品の製造方法
US4826733A (en) * 1986-12-03 1989-05-02 Dow Corning Corporation Sin-containing coatings for electronic devices
FR2625839B1 (fr) * 1988-01-13 1991-04-26 Sgs Thomson Microelectronics Procede de passivation d'un circuit integre

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1250099A (en:Method) * 1969-04-14 1971-10-20
JPS532552B2 (en:Method) * 1974-03-30 1978-01-28
US3895127A (en) * 1974-04-19 1975-07-15 Rca Corp Method of selectively depositing glass on semiconductor devices
JPS6022497B2 (ja) * 1974-10-26 1985-06-03 ソニー株式会社 半導体装置
NL7500492A (nl) * 1975-01-16 1976-07-20 Philips Nv Werkwijze voor het vervaardigen van halfgelei- derinrichtingen, waarbij een glazen bedekking wordt aangebracht, en halfgeleiderinrichtingen, vervaardigd volgens deze werkwijze.
JPS6041458B2 (ja) * 1975-04-21 1985-09-17 ソニー株式会社 半導体装置の製造方法

Also Published As

Publication number Publication date
JPS53105979A (en) 1978-09-14
IT1092729B (it) 1985-07-12
YU19278A (en) 1982-06-30
IN147578B (en:Method) 1980-04-19
JPS5626981B2 (en:Method) 1981-06-22
IT7819175A0 (it) 1978-01-11
PL204821A1 (pl) 1978-11-06
DE2806492A1 (de) 1978-08-31
YU42276B (en) 1988-08-31
FR2382095B1 (fr) 1985-10-18
SE7801092L (sv) 1978-08-25
FR2382095A1 (fr) 1978-09-22
GB1552760A (en) 1979-09-19
BE864271A (fr) 1978-06-16

Similar Documents

Publication Publication Date Title
US5698451A (en) Method of fabricating contacts for solar cells
US5508881A (en) Capacitors and interconnect lines for use with integrated circuits
Bower Characteristics of aluminum‐titanium electrical contacts on silicon
FI105605B (fi) Planarisoiva eriste
Fuller et al. Diffusion, solubility, and electrical behavior of Li in GaAs single crystals
US3300339A (en) Method of covering the surfaces of objects with protective glass jackets and the objects produced thereby
KR100732259B1 (ko) 반도체 장치용 보호층
Tsujide et al. Properties of aluminum oxide obtained by hydrolysis of AlCl3
PL117841B1 (en) Semiconductor element and method of fabrication thereof rovodnikovogo ehlementa
Do Thanh et al. Defect structure and generation of interface states in MOS structures
Demourgues et al. Transport and magnetic properties of La2NiO4+ δ (0≤ δ≤ 0.25)
Raffel et al. Laser‐formed connections using polyimide
Tani et al. Thermoelectric properties of Pt-doped β-FeSi 2
DE1242760C2 (de) Verfahren zum herstellen einer oberflaechen-schutzschicht fuer halbleiterbauelemente
PL116754B1 (en) Semiconductor element and a method of manufacturing thesame
Duffy et al. Dielectric and interface properties of pyrolytic aluminum oxide films on silicon substrates
Verderber et al. SiO 2/Si 3 N 4 passivation of high-power rectifiers
Magee et al. Investigation of solid–solid reactions of Au films on silicon
Bagnoli et al. Electrical characteristics of silicon nitride on silicon and InGaAs as a function of the insulator stoichiometry
McGruer et al. Polysilicon capacitor failure during rapid thermal processing
Cheng et al. High Dielectric Permittivity Behavior in Cu‐Doped CaTiO3
JPS6079721A (ja) 半導体構造体の形成方法
Chang et al. Double critical temperature characteristics of semiconducting (Ba0. 7Pb0. 3) TiO3 materials prepared by microwave sintering
Huang et al. Kinetics of Cu 3 Ge formation and reaction with Al
Aswal et al. Preparation of adherent Y-Ba-Cu-O thick films and the effect of silver doping