NO20052450D0 - Flashminne-arkitektur med avkodingsplan for sletting i sidemodus ved hjelp av NMOS og PMOS radarkoding - Google Patents

Flashminne-arkitektur med avkodingsplan for sletting i sidemodus ved hjelp av NMOS og PMOS radarkoding

Info

Publication number
NO20052450D0
NO20052450D0 NO20052450A NO20052450A NO20052450D0 NO 20052450 D0 NO20052450 D0 NO 20052450D0 NO 20052450 A NO20052450 A NO 20052450A NO 20052450 A NO20052450 A NO 20052450A NO 20052450 D0 NO20052450 D0 NO 20052450D0
Authority
NO
Norway
Prior art keywords
pmos
nmos
decode
plan
flash memory
Prior art date
Application number
NO20052450A
Other languages
English (en)
Other versions
NO20052450L (no
Inventor
Simone Bartoli
Sabina Mognoni
Lorenzo Bedarida
Fabio Tassan Caser
Original Assignee
Atmel Corp A Delaware Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Atmel Corp A Delaware Corp filed Critical Atmel Corp A Delaware Corp
Publication of NO20052450L publication Critical patent/NO20052450L/no
Publication of NO20052450D0 publication Critical patent/NO20052450D0/no

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
NO20052450A 2002-10-22 2005-05-20 Flashminne-arkitektur med avkodingsplan for sletting i sidemodus ved hjelp av NMOS og PMOS radarkoding NO20052450D0 (no)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
IT002240A ITMI20022240A1 (it) 2002-10-22 2002-10-22 Architettura di memoria flash con cancellazione di modo
PCT/US2003/027843 WO2004038727A1 (en) 2002-10-22 2003-09-04 A flash memory architecture with page mode erase using nmos and pmos row decoding scheme

Publications (2)

Publication Number Publication Date
NO20052450L NO20052450L (no) 2005-05-20
NO20052450D0 true NO20052450D0 (no) 2005-05-20

Family

ID=32089010

Family Applications (1)

Application Number Title Priority Date Filing Date
NO20052450A NO20052450D0 (no) 2002-10-22 2005-05-20 Flashminne-arkitektur med avkodingsplan for sletting i sidemodus ved hjelp av NMOS og PMOS radarkoding

Country Status (11)

Country Link
US (1) US6804148B2 (no)
EP (1) EP1556865A4 (no)
JP (1) JP2006504218A (no)
KR (1) KR20050059287A (no)
CN (1) CN100530430C (no)
AU (1) AU2003265938A1 (no)
CA (1) CA2500798A1 (no)
IT (1) ITMI20022240A1 (no)
NO (1) NO20052450D0 (no)
TW (1) TWI317130B (no)
WO (1) WO2004038727A1 (no)

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ITMI20050868A1 (it) * 2005-05-13 2006-11-14 St Microelectronics Srl Circuito di decodifica di riga
US7548484B2 (en) * 2005-09-29 2009-06-16 Hynix Semiconductor Inc. Semiconductor memory device having column decoder
US7499366B2 (en) * 2006-07-31 2009-03-03 Sandisk 3D Llc Method for using dual data-dependent busses for coupling read/write circuits to a memory array
US8279704B2 (en) * 2006-07-31 2012-10-02 Sandisk 3D Llc Decoder circuitry providing forward and reverse modes of memory array operation and method for biasing same
US7463546B2 (en) 2006-07-31 2008-12-09 Sandisk 3D Llc Method for using a passive element memory array incorporating reversible polarity word line and bit line decoders
US7486587B2 (en) * 2006-07-31 2009-02-03 Sandisk 3D Llc Dual data-dependent busses for coupling read/write circuits to a memory array
US7554832B2 (en) * 2006-07-31 2009-06-30 Sandisk 3D Llc Passive element memory array incorporating reversible polarity word line and bit line decoders
US7593259B2 (en) * 2006-09-13 2009-09-22 Mosaid Technologies Incorporated Flash multi-level threshold distribution scheme
KR100776900B1 (ko) * 2006-10-31 2007-11-19 주식회사 하이닉스반도체 플래시 메모리 소자 및 이를 이용한 프로그램/독출 방법
US7414891B2 (en) * 2007-01-04 2008-08-19 Atmel Corporation Erase verify method for NAND-type flash memories
US7882405B2 (en) * 2007-02-16 2011-02-01 Atmel Corporation Embedded architecture with serial interface for testing flash memories
US7577059B2 (en) * 2007-02-27 2009-08-18 Mosaid Technologies Incorporated Decoding control with address transition detection in page erase function
US20080232169A1 (en) * 2007-03-20 2008-09-25 Atmel Corporation Nand-like memory array employing high-density nor-like memory devices
TWI417894B (zh) * 2007-03-21 2013-12-01 Ibm 於動態隨機存取記憶體架構之定址期間實施省電之結構及方法
US7577029B2 (en) 2007-05-04 2009-08-18 Mosaid Technologies Incorporated Multi-level cell access buffer with dual function
US9588883B2 (en) 2011-09-23 2017-03-07 Conversant Intellectual Property Management Inc. Flash memory system
JP5908803B2 (ja) * 2012-06-29 2016-04-26 株式会社フローディア 不揮発性半導体記憶装置
US8737137B1 (en) 2013-01-22 2014-05-27 Freescale Semiconductor, Inc. Flash memory with bias voltage for word line/row driver
KR102210520B1 (ko) 2013-12-19 2021-02-02 삼성전자주식회사 비휘발성 메모리 장치 및 그것의 소거 방법
FR3029000B1 (fr) * 2014-11-24 2017-12-22 Stmicroelectronics Rousset Dispositif de memoire non volatile compact
US11087207B2 (en) * 2018-03-14 2021-08-10 Silicon Storage Technology, Inc. Decoders for analog neural memory in deep learning artificial neural network
US10482968B1 (en) * 2018-11-22 2019-11-19 Wuhan Xinxin Semiconductor Manufacturing Co., Ltd. Local x-decoder and related memory system
CN109448772B (zh) * 2018-11-28 2024-05-28 合肥博雅半导体有限公司 一种减少电压差的存储器字线选择电路及芯片和存储器
US11114143B2 (en) * 2019-02-22 2021-09-07 Intel Corporation Bipolar decoder for crosspoint memory cells
CN112151095A (zh) * 2019-06-26 2020-12-29 北京知存科技有限公司 存算一体芯片、存储单元阵列结构

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Also Published As

Publication number Publication date
EP1556865A1 (en) 2005-07-27
NO20052450L (no) 2005-05-20
TW200409126A (en) 2004-06-01
CN1689115A (zh) 2005-10-26
US20040076037A1 (en) 2004-04-22
EP1556865A4 (en) 2010-06-30
CA2500798A1 (en) 2004-05-06
WO2004038727A1 (en) 2004-05-06
TWI317130B (en) 2009-11-11
ITMI20022240A1 (it) 2004-04-23
KR20050059287A (ko) 2005-06-17
AU2003265938A1 (en) 2004-05-13
JP2006504218A (ja) 2006-02-02
US6804148B2 (en) 2004-10-12
CN100530430C (zh) 2009-08-19

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