NO20051713L - Fremgangsmate for a fabrikere en selvinnstillende ikke-flyktig minnecelle - Google Patents
Fremgangsmate for a fabrikere en selvinnstillende ikke-flyktig minnecelleInfo
- Publication number
- NO20051713L NO20051713L NO20051713A NO20051713A NO20051713L NO 20051713 L NO20051713 L NO 20051713L NO 20051713 A NO20051713 A NO 20051713A NO 20051713 A NO20051713 A NO 20051713A NO 20051713 L NO20051713 L NO 20051713L
- Authority
- NO
- Norway
- Prior art keywords
- small
- floating gate
- intermediate layer
- self
- layer
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract 2
- 239000000758 substrate Substances 0.000 abstract 2
- 235000003392 Curcuma domestica Nutrition 0.000 abstract 1
- 244000008991 Curcuma longa Species 0.000 abstract 1
- 235000003373 curcuma longa Nutrition 0.000 abstract 1
- 235000013976 turmeric Nutrition 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
- H01L29/7881—Programmable transistors with only two possible levels of programmation
- H01L29/7883—Programmable transistors with only two possible levels of programmation charging by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28123—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects
- H01L21/28141—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects insulating part of the electrode is defined by a sidewall spacer, e.g. dummy spacer, or a similar technique, e.g. oxidation under mask, plating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76895—Local interconnects; Local pads, as exemplified by patent document EP0896365
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
- H01L29/4011—Multistep manufacturing processes for data storage electrodes
- H01L29/40114—Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42324—Gate electrodes for transistors with a floating gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42324—Gate electrodes for transistors with a floating gate
- H01L29/42328—Gate electrodes for transistors with a floating gate with at least one additional gate other than the floating gate and the control gate, e.g. program gate, erase gate or select gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66825—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a floating gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Non-Volatile Memory (AREA)
- Semiconductor Memories (AREA)
Abstract
En selvinnstillende ikke-volatil mirmecelle (200) som omfatter et lite sideveggs- mellomsjikt (239) som er elektrisk koblet og plassert ved siden av et hovedflytende portelekttode-område (212) avdekkes. Både det lille sideveggs-mellomsjiktet og hoved- flytende portelekttode-området formes på et substtat (204) og begge former den flytende portelekttoden til den ikke-volatile mirmecellen. Begge isoleres elektrisk fra substtatet av et oksidsjikt (208, 232, 242) som er tynnere (260, 232,242) mellom det lille sideveggs-mellomsjiktet og substtatet; og tykkere (263, 208) mellom hovedflytende portelekttode-området og substtatet. Det lille sideveggs-mellomsjiktet kan lages lite; og derfor kan også det tyrme oksid-sjikt-arealet lages lite for å skape en liten bane som elekttoner kan turmelere gjermom og irm i den flytende portelekttoden.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/236,670 US6624029B2 (en) | 2000-11-30 | 2002-09-06 | Method of fabricating a self-aligned non-volatile memory cell |
PCT/US2003/024106 WO2004023543A1 (en) | 2002-09-06 | 2003-07-31 | Method of fabricating a self-aligned non-volatile memory cell |
Publications (1)
Publication Number | Publication Date |
---|---|
NO20051713L true NO20051713L (no) | 2005-05-19 |
Family
ID=31977662
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
NO20051713A NO20051713L (no) | 2002-09-06 | 2005-04-06 | Fremgangsmate for a fabrikere en selvinnstillende ikke-flyktig minnecelle |
Country Status (10)
Country | Link |
---|---|
US (1) | US6624029B2 (no) |
EP (1) | EP1552549A4 (no) |
JP (1) | JP2005538549A (no) |
KR (1) | KR20050035876A (no) |
CN (1) | CN1682361A (no) |
AU (1) | AU2003269929A1 (no) |
CA (1) | CA2494527A1 (no) |
NO (1) | NO20051713L (no) |
TW (1) | TWI236734B (no) |
WO (1) | WO2004023543A1 (no) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6831325B2 (en) * | 2002-12-20 | 2004-12-14 | Atmel Corporation | Multi-level memory cell with lateral floating spacers |
US6878986B2 (en) * | 2003-03-31 | 2005-04-12 | Taiwan Semiconductor Manufacturing Co., Ltd. | Embedded flash memory cell having improved programming and erasing efficiency |
US20050239250A1 (en) * | 2003-08-11 | 2005-10-27 | Bohumil Lojek | Ultra dense non-volatile memory array |
US7154779B2 (en) * | 2004-01-21 | 2006-12-26 | Sandisk Corporation | Non-volatile memory cell using high-k material inter-gate programming |
US7476926B2 (en) * | 2005-01-06 | 2009-01-13 | International Business Machines Corporation | Eraseable nonvolatile memory with sidewall storage |
US8099783B2 (en) * | 2005-05-06 | 2012-01-17 | Atmel Corporation | Security method for data protection |
US20080119022A1 (en) * | 2006-11-22 | 2008-05-22 | Atmel Corporation | Method of making eeprom transistors |
US8642441B1 (en) | 2006-12-15 | 2014-02-04 | Spansion Llc | Self-aligned STI with single poly for manufacturing a flash memory device |
US8320191B2 (en) | 2007-08-30 | 2012-11-27 | Infineon Technologies Ag | Memory cell arrangement, method for controlling a memory cell, memory array and electronic device |
US9318337B2 (en) * | 2013-09-17 | 2016-04-19 | Texas Instruments Incorporated | Three dimensional three semiconductor high-voltage capacitors |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4833096A (en) | 1988-01-19 | 1989-05-23 | Atmel Corporation | EEPROM fabrication process |
US5021848A (en) | 1990-03-13 | 1991-06-04 | Chiu Te Long | Electrically-erasable and electrically-programmable memory storage devices with self aligned tunnel dielectric area and the method of fabricating thereof |
US5108939A (en) * | 1990-10-16 | 1992-04-28 | National Semiconductor Corp. | Method of making a non-volatile memory cell utilizing polycrystalline silicon spacer tunnel region |
US5618742A (en) | 1992-01-22 | 1997-04-08 | Macronix Internatioal, Ltd. | Method of making flash EPROM with conductive sidewall spacer contacting floating gate |
US5477068A (en) | 1992-03-18 | 1995-12-19 | Rohm Co., Ltd. | Nonvolatile semiconductor memory device |
US5640031A (en) | 1993-09-30 | 1997-06-17 | Keshtbod; Parviz | Spacer flash cell process |
US5479368A (en) | 1993-09-30 | 1995-12-26 | Cirrus Logic, Inc. | Spacer flash cell device with vertically oriented floating gate |
JP3403877B2 (ja) | 1995-10-25 | 2003-05-06 | 三菱電機株式会社 | 半導体記憶装置とその製造方法 |
KR100192546B1 (ko) * | 1996-04-12 | 1999-06-15 | 구본준 | 플래쉬 메모리 및 이의 제조방법 |
DE19638969C2 (de) | 1996-09-23 | 2002-05-16 | Mosel Vitelic Inc | EEPROM mit einem Polydistanz-Floating-Gate und Verfahren zu deren Herstellung |
US5963806A (en) | 1996-12-09 | 1999-10-05 | Mosel Vitelic, Inc. | Method of forming memory cell with built-in erasure feature |
JP3183396B2 (ja) | 1997-11-20 | 2001-07-09 | 日本電気株式会社 | 不揮発性半導体記憶装置およびその製造方法 |
JPH11186416A (ja) | 1997-12-19 | 1999-07-09 | Rohm Co Ltd | 不揮発性半導体記憶装置およびその製造方法 |
US5972752A (en) | 1997-12-29 | 1999-10-26 | United Semiconductor Corp. | Method of manufacturing a flash memory cell having a tunnel oxide with a long narrow top profile |
US6043530A (en) | 1998-04-15 | 2000-03-28 | Chang; Ming-Bing | Flash EEPROM device employing polysilicon sidewall spacer as an erase gate |
US6074914A (en) | 1998-10-30 | 2000-06-13 | Halo Lsi Design & Device Technology, Inc. | Integration method for sidewall split gate flash transistor |
US6479351B1 (en) * | 2000-11-30 | 2002-11-12 | Atmel Corporation | Method of fabricating a self-aligned non-volatile memory cell |
-
2002
- 2002-09-06 US US10/236,670 patent/US6624029B2/en not_active Expired - Lifetime
-
2003
- 2003-07-31 CN CNA038212005A patent/CN1682361A/zh active Pending
- 2003-07-31 WO PCT/US2003/024106 patent/WO2004023543A1/en active Application Filing
- 2003-07-31 JP JP2004534260A patent/JP2005538549A/ja not_active Withdrawn
- 2003-07-31 CA CA002494527A patent/CA2494527A1/en not_active Abandoned
- 2003-07-31 KR KR1020057002002A patent/KR20050035876A/ko not_active Application Discontinuation
- 2003-07-31 AU AU2003269929A patent/AU2003269929A1/en not_active Abandoned
- 2003-07-31 EP EP03751819A patent/EP1552549A4/en not_active Withdrawn
- 2003-08-25 TW TW092123263A patent/TWI236734B/zh not_active IP Right Cessation
-
2005
- 2005-04-06 NO NO20051713A patent/NO20051713L/no unknown
Also Published As
Publication number | Publication date |
---|---|
EP1552549A4 (en) | 2008-06-04 |
WO2004023543A1 (en) | 2004-03-18 |
EP1552549A1 (en) | 2005-07-13 |
TW200406890A (en) | 2004-05-01 |
JP2005538549A (ja) | 2005-12-15 |
US20030013255A1 (en) | 2003-01-16 |
TWI236734B (en) | 2005-07-21 |
AU2003269929A1 (en) | 2004-03-29 |
US6624029B2 (en) | 2003-09-23 |
KR20050035876A (ko) | 2005-04-19 |
CN1682361A (zh) | 2005-10-12 |
CA2494527A1 (en) | 2004-03-18 |
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