NL7713004A - Werkwijze voor het vervaardigen van halfgelei- derinrichtingen. - Google Patents

Werkwijze voor het vervaardigen van halfgelei- derinrichtingen.

Info

Publication number
NL7713004A
NL7713004A NL7713004A NL7713004A NL7713004A NL 7713004 A NL7713004 A NL 7713004A NL 7713004 A NL7713004 A NL 7713004A NL 7713004 A NL7713004 A NL 7713004A NL 7713004 A NL7713004 A NL 7713004A
Authority
NL
Netherlands
Prior art keywords
guide devices
manufacturing semi
semi
manufacturing
guide
Prior art date
Application number
NL7713004A
Other languages
English (en)
Dutch (nl)
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP14252776A external-priority patent/JPS5367361A/ja
Priority claimed from JP8084677A external-priority patent/JPS5415677A/ja
Priority claimed from JP8084777A external-priority patent/JPS5415678A/ja
Priority claimed from JP8085077A external-priority patent/JPS5415680A/ja
Priority claimed from JP8084877A external-priority patent/JPS5415679A/ja
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of NL7713004A publication Critical patent/NL7713004A/xx

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/112—Constructional design considerations for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layers, e.g. by using channel stoppers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01332—Making the insulator
    • H10D64/01336—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid
    • H10D64/0134—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid with a treatment, e.g. annealing, after the formation of the insulator and before the formation of the conductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/681—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
    • H10D64/685—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being perpendicular to the channel plane
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/691—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/693—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0135—Manufacturing their gate conductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/208—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically inactive species
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/40—Ion implantation into wafers, substrates or parts of devices into insulating materials
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/082—Ion implantation FETs/COMs
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/91—Controlling charging state at semiconductor-insulator interface
NL7713004A 1976-11-27 1977-11-25 Werkwijze voor het vervaardigen van halfgelei- derinrichtingen. NL7713004A (nl)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP14252776A JPS5367361A (en) 1976-11-27 1976-11-27 Semiconductor device
JP8084677A JPS5415677A (en) 1977-07-06 1977-07-06 Manufacture of integrated circuit
JP8084777A JPS5415678A (en) 1977-07-06 1977-07-06 Manufacture of integrated circuit
JP8085077A JPS5415680A (en) 1977-07-06 1977-07-06 Semiconductor device
JP8084877A JPS5415679A (en) 1977-07-06 1977-07-06 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
NL7713004A true NL7713004A (nl) 1978-05-30

Family

ID=27524886

Family Applications (1)

Application Number Title Priority Date Filing Date
NL7713004A NL7713004A (nl) 1976-11-27 1977-11-25 Werkwijze voor het vervaardigen van halfgelei- derinrichtingen.

Country Status (4)

Country Link
US (1) US4297782A (OSRAM)
DE (1) DE2752698A1 (OSRAM)
GB (1) GB1596184A (OSRAM)
NL (1) NL7713004A (OSRAM)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4551908A (en) * 1981-06-15 1985-11-12 Nippon Electric Co., Ltd. Process of forming electrodes and interconnections on silicon semiconductor devices
US4426765A (en) 1981-08-24 1984-01-24 Trw Inc. Process for fabrication of ohmic contacts in compound semiconductor devices
DE3138960A1 (de) * 1981-09-30 1983-04-14 Siemens AG, 1000 Berlin und 8000 München Verfahren zur erzeugung elektrisch leitender schichten
GB2137806B (en) * 1983-04-05 1986-10-08 Standard Telephones Cables Ltd Ion implantation in semiconductor bodies
US5210042A (en) * 1983-09-26 1993-05-11 Fujitsu Limited Method of producing semiconductor device
JPS60130844A (ja) * 1983-12-20 1985-07-12 Toshiba Corp 半導体装置の製造方法
JPH0614524B2 (ja) * 1984-03-01 1994-02-23 株式会社東芝 半導体装置
JP2724702B2 (ja) * 1985-06-21 1998-03-09 日本テキサス・インスツルメンツ 株式会社 電荷結合型半導体装置の製造方法
CA1216962A (en) * 1985-06-28 1987-01-20 Hussein M. Naguib Mos device processing
FR2592220B1 (fr) * 1985-12-20 1988-02-05 Thomson Csf Procede de realisation d'electrodes alignees par rapport a un niveau d'implantation dans un substrat et procede de realisation d'un filtre a transfert de charges
EP0308814B1 (en) * 1987-09-21 1993-01-27 National Semiconductor Corporation Modification of interfacial fields between dielectrics and semiconductors
US5132248A (en) * 1988-05-31 1992-07-21 The United States Of America As Represented By The United States Department Of Energy Direct write with microelectronic circuit fabrication
US5231045A (en) * 1988-12-08 1993-07-27 Fujitsu Limited Method of producing semiconductor-on-insulator structure by besol process with charged insulating layers
KR930007096B1 (ko) * 1988-12-08 1993-07-29 후지쓰 가부시끼가이샤 세미콘덕터-온-인슐레이터(semiconductor-on-insulator)구조와 세미콘덕터-온-인슐레이터 구조를 가지는 반도체장치의 제조방법
US5250455A (en) * 1990-04-10 1993-10-05 Matsushita Electric Industrial Co., Ltd. Method of making a nonvolatile semiconductor memory device by implanting into the gate insulating film
TW220007B (OSRAM) * 1992-03-12 1994-02-01 Philips Nv
US5648673A (en) * 1994-12-28 1997-07-15 Nippon Steel Corporation Semiconductor device having metal silicide film on impurity diffused layer or conductive layer
KR100320796B1 (ko) * 1999-12-29 2002-01-17 박종섭 게이트 유전체막이 적용되는 반도체 소자의 제조 방법
US7132336B1 (en) * 2002-02-12 2006-11-07 Lsi Logic Corporation Method and apparatus for forming a memory structure having an electron affinity region
US6989565B1 (en) * 2002-04-15 2006-01-24 Lsi Logic Corporation Memory device having an electron trapping layer in a high-K dielectric gate stack
US8946020B2 (en) 2007-09-06 2015-02-03 Spansion, Llc Method of forming controllably conductive oxide
FR2934925B1 (fr) * 2008-08-06 2011-02-25 Soitec Silicon On Insulator Procede de fabrication d'une structure comprernant une etape d'implantations d'ions pour stabiliser l'interface de collage.
JP7464863B2 (ja) * 2022-05-31 2024-04-10 日新電機株式会社 固定電荷制御方法、薄膜トランジスタの製造方法及び薄膜トランジスタ
JP7382608B1 (ja) * 2022-05-31 2023-11-17 国立大学法人東京農工大学 固定電荷発現方法、薄膜トランジスタの製造方法及び薄膜トランジスタ

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3328210A (en) * 1964-10-26 1967-06-27 North American Aviation Inc Method of treating semiconductor device by ionic bombardment
US3495031A (en) * 1967-11-01 1970-02-10 Zenith Radio Corp Variable q i.f. amplifier circuit for a television receiver
US3600797A (en) * 1967-12-26 1971-08-24 Hughes Aircraft Co Method of making ohmic contacts to semiconductor bodies by indirect ion implantation
BE759057A (OSRAM) * 1969-11-19 1971-05-17 Philips Nv
US3708360A (en) * 1970-06-09 1973-01-02 Texas Instruments Inc Self-aligned gate field effect transistor with schottky barrier drain and source
US3877054A (en) * 1973-03-01 1975-04-08 Bell Telephone Labor Inc Semiconductor memory apparatus with a multilayer insulator contacting the semiconductor
US3852120A (en) * 1973-05-29 1974-12-03 Ibm Method for manufacturing ion implanted insulated gate field effect semiconductor transistor devices

Also Published As

Publication number Publication date
US4297782A (en) 1981-11-03
DE2752698C2 (OSRAM) 1987-06-04
GB1596184A (en) 1981-08-19
DE2752698A1 (de) 1978-06-01

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Legal Events

Date Code Title Description
BC A request for examination has been filed
A85 Still pending on 85-01-01
BV The patent application has lapsed