NL266513A - - Google Patents
Info
- Publication number
- NL266513A NL266513A NL266513DA NL266513A NL 266513 A NL266513 A NL 266513A NL 266513D A NL266513D A NL 266513DA NL 266513 A NL266513 A NL 266513A
- Authority
- NL
- Netherlands
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
- H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
- H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
- H10P14/3411—Silicon, silicon germanium or germanium
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D99/00—Subject matter not provided for in other groups of this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P10/00—Bonding of wafers, substrates or parts of devices
- H10P10/12—Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/24—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
- H10P14/2901—Materials
- H10P14/2902—Materials being Group IVA materials
- H10P14/2905—Silicon, silicon germanium or germanium
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
- H10P14/3202—Materials thereof
- H10P14/3204—Materials thereof being Group IVA semiconducting materials
- H10P14/3211—Silicon, silicon germanium or germanium
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
- H10P14/3438—Doping during depositing
- H10P14/3441—Conductivity type
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DES69202A DE1166938B (de) | 1960-07-01 | 1960-07-01 | Verfahren zur Herstellung einer Halbleiteranordnung |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| NL266513A true NL266513A (https=) |
Family
ID=7500812
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| NL266513D NL266513A (https=) | 1960-07-01 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US3242018A (https=) |
| CH (1) | CH391111A (https=) |
| DE (1) | DE1166938B (https=) |
| FR (1) | FR1293869A (https=) |
| GB (1) | GB918889A (https=) |
| NL (1) | NL266513A (https=) |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3200490A (en) * | 1962-12-07 | 1965-08-17 | Philco Corp | Method of forming ohmic bonds to a germanium-coated silicon body with eutectic alloyforming materials |
| US4357183A (en) * | 1980-08-13 | 1982-11-02 | Massachusetts Institute Of Technology | Heteroepitaxy of germanium silicon on silicon utilizing alloying control |
| US4861393A (en) * | 1983-10-28 | 1989-08-29 | American Telephone And Telegraph Company, At&T Bell Laboratories | Semiconductor heterostructures having Gex Si1-x layers on Si utilizing molecular beam epitaxy |
| US4728998A (en) * | 1984-09-06 | 1988-03-01 | Fairchild Semiconductor Corporation | CMOS circuit having a reduced tendency to latch |
| JPS61241985A (ja) * | 1985-04-19 | 1986-10-28 | Eizo Yamaga | 赤外線検知装置 |
| US5142641A (en) * | 1988-03-23 | 1992-08-25 | Fujitsu Limited | CMOS structure for eliminating latch-up of parasitic thyristor |
| US5245204A (en) * | 1989-03-29 | 1993-09-14 | Canon Kabushiki Kaisha | Semiconductor device for use in an improved image pickup apparatus |
| US5140400A (en) * | 1989-03-29 | 1992-08-18 | Canon Kabushiki Kaisha | Semiconductor device and photoelectric converting apparatus using the same |
| US5095358A (en) * | 1990-04-18 | 1992-03-10 | National Semiconductor Corporation | Application of electronic properties of germanium to inhibit n-type or p-type diffusion in silicon |
| JP3214868B2 (ja) * | 1991-07-19 | 2001-10-02 | ローム株式会社 | ヘテロ接合バイポーラトランジスタの製造方法 |
| JP2971246B2 (ja) * | 1992-04-15 | 1999-11-02 | 株式会社東芝 | ヘテロバイポーラトランジスタの製造方法 |
| US6861324B2 (en) | 2001-06-15 | 2005-03-01 | Maxim Integrated Products, Inc. | Method of forming a super self-aligned hetero-junction bipolar transistor |
| US7772060B2 (en) * | 2006-06-21 | 2010-08-10 | Texas Instruments Deutschland Gmbh | Integrated SiGe NMOS and PMOS transistors |
| KR102069345B1 (ko) * | 2018-03-06 | 2020-01-22 | 에스케이씨 주식회사 | 반도체 공정용 조성물 및 반도체 공정 |
Family Cites Families (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB815564A (en) * | 1957-06-21 | 1959-06-24 | Gen Motors Corp | Improvements in or relating to fuel injection systems |
| DE883784C (de) * | 1949-04-06 | 1953-06-03 | Sueddeutsche App Fabrik G M B | Verfahren zur Herstellung von Flaechengleichrichtern und Kristallverstaerkerschichten aus Elementen |
| NL99536C (https=) * | 1951-03-07 | 1900-01-01 | ||
| GB742237A (en) * | 1951-10-24 | 1955-12-21 | Ass Elect Ind | Improvements in barrier layer cells |
| US2695852A (en) * | 1952-02-15 | 1954-11-30 | Bell Telephone Labor Inc | Fabrication of semiconductors for signal translating devices |
| DE966848C (de) * | 1952-07-29 | 1957-08-29 | Licentia Gmbh | Verfahren zum Herstellen von scharf abgegrenzten Schichten entgegengesetzten Leitfaehigkeitstyps auf einem fertigen Halbleiterkristall eines bestimmten Leitfaehigkeitstyps |
| NL180750B (nl) * | 1952-08-20 | Bristol Myers Co | Werkwijze voor het bereiden van een 7-amino-3-cefem-4-carbonzuur derivaat door een 7-acylamino-3-cefem-4-carbonzuur derivaat om te zetten. | |
| GB778383A (en) * | 1953-10-02 | 1957-07-03 | Standard Telephones Cables Ltd | Improvements in or relating to the production of material for semi-conductors |
| BE537841A (https=) * | 1954-05-03 | 1900-01-01 | ||
| DE1240188B (de) * | 1954-10-29 | 1967-05-11 | Telefunken Patent | Verfahren zum Herstellen von Halbleiterbauelementen mit einem oder mehreren einlegierten p-n-UEbergaengen |
| DE1046196B (de) * | 1954-11-27 | 1958-12-11 | Siemens Ag | Verfahren zur Herstellung eines Halbleiters fuer Flaechengleichrichter, -transistoren od. dgl. mit mehreren Bereichen verschiedener Leitfaehigkeit |
| GB805493A (en) * | 1955-04-07 | 1958-12-10 | Telefunken Gmbh | Improved method for the production of semi-conductor devices of npn or pnp type |
| DE1029941B (de) * | 1955-07-13 | 1958-05-14 | Siemens Ag | Verfahren zur Herstellung von einkristallinen Halbleiterschichten |
| US2855334A (en) * | 1955-08-17 | 1958-10-07 | Sprague Electric Co | Method of preparing semiconducting crystals having symmetrical junctions |
| GB843407A (en) * | 1956-12-04 | 1960-08-04 | Sylvania Thorn Colour Television Laboratories Ltd | Improvements in and relating to semi-conductor devices |
| US3099588A (en) * | 1959-03-11 | 1963-07-30 | Westinghouse Electric Corp | Formation of semiconductor transition regions by alloy vaporization and deposition |
| FR1148316A (fr) * | 1959-10-20 | 1957-12-06 | Thomson Houston Comp Francaise | Procédé et appareil pour la réalisation de circuits imprimés |
-
0
- NL NL266513D patent/NL266513A/xx unknown
-
1960
- 1960-07-01 DE DES69202A patent/DE1166938B/de active Granted
-
1961
- 1961-06-02 CH CH647261A patent/CH391111A/de unknown
- 1961-06-15 US US117401A patent/US3242018A/en not_active Expired - Lifetime
- 1961-06-29 FR FR866499A patent/FR1293869A/fr not_active Expired
- 1961-06-29 GB GB23567/61A patent/GB918889A/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| US3242018A (en) | 1966-03-22 |
| DE1166938C2 (https=) | 1964-10-08 |
| GB918889A (en) | 1963-02-20 |
| DE1166938B (de) | 1964-04-02 |
| FR1293869A (fr) | 1962-05-18 |
| CH391111A (de) | 1965-04-30 |