NL187373C - Werkwijze voor vervaardiging van een halfgeleiderinrichting. - Google Patents
Werkwijze voor vervaardiging van een halfgeleiderinrichting.Info
- Publication number
- NL187373C NL187373C NLAANVRAGE8203903,A NL8203903A NL187373C NL 187373 C NL187373 C NL 187373C NL 8203903 A NL8203903 A NL 8203903A NL 187373 C NL187373 C NL 187373C
- Authority
- NL
- Netherlands
- Prior art keywords
- manufacturing
- semiconductor device
- semiconductor
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
- H01L21/76205—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
- H01L21/7621—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region the recessed region having a shape other than rectangular, e.g. rounded or oblique shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
- H01L21/76213—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
- Local Oxidation Of Silicon (AREA)
Priority Applications (8)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NLAANVRAGE8203903,A NL187373C (nl) | 1982-10-08 | 1982-10-08 | Werkwijze voor vervaardiging van een halfgeleiderinrichting. |
US06/535,124 US4533429A (en) | 1982-10-08 | 1983-09-23 | Method of manufacturing a semiconductor device |
DE19833334624 DE3334624A1 (de) | 1982-10-08 | 1983-09-24 | Verfahren zum herstellen einer halbleiteranordnung und nach diesem verfahren hergestellte halbleiteranordnung |
IT23153/83A IT1172413B (it) | 1982-10-08 | 1983-10-05 | Metodo di fabbricazione di un dispositivo semiconduttore e dispositivo semiconduttore fabbricato con l'ausilio di tale metodo |
CA000438376A CA1209722A (en) | 1982-10-08 | 1983-10-05 | Semiconductor device manufacturing method using under-etching |
GB08326578A GB2129213B (en) | 1982-10-08 | 1983-10-05 | Semiconductor device with dielectric isolation |
FR8315867A FR2537341B1 (fr) | 1982-10-08 | 1983-10-05 | Procede permettant de realiser un dispositif semi-conducteur et dispositif semi-conducteur realise selon ce procede |
JP58186079A JPS5987832A (ja) | 1982-10-08 | 1983-10-06 | 半導体装置の製造方法 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL8203903 | 1982-10-08 | ||
NLAANVRAGE8203903,A NL187373C (nl) | 1982-10-08 | 1982-10-08 | Werkwijze voor vervaardiging van een halfgeleiderinrichting. |
Publications (3)
Publication Number | Publication Date |
---|---|
NL8203903A NL8203903A (nl) | 1984-05-01 |
NL187373B NL187373B (nl) | 1991-04-02 |
NL187373C true NL187373C (nl) | 1991-09-02 |
Family
ID=19840387
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
NLAANVRAGE8203903,A NL187373C (nl) | 1982-10-08 | 1982-10-08 | Werkwijze voor vervaardiging van een halfgeleiderinrichting. |
Country Status (8)
Country | Link |
---|---|
US (1) | US4533429A (xx) |
JP (1) | JPS5987832A (xx) |
CA (1) | CA1209722A (xx) |
DE (1) | DE3334624A1 (xx) |
FR (1) | FR2537341B1 (xx) |
GB (1) | GB2129213B (xx) |
IT (1) | IT1172413B (xx) |
NL (1) | NL187373C (xx) |
Families Citing this family (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2554638A1 (fr) * | 1983-11-04 | 1985-05-10 | Efcis | Procede de fabrication de structures integrees de silicium sur ilots isoles du substrat |
NL8401711A (nl) * | 1984-05-29 | 1985-12-16 | Philips Nv | Werkwijze voor het vervaardigen van een halfgeleiderinrichting met een siliciumlichaam waarin plaatselijk een verzonken oxidelaag is aangebracht. |
JP2533078B2 (ja) * | 1984-11-27 | 1996-09-11 | ソニー株式会社 | 不純物拡散方法 |
US4660278A (en) * | 1985-06-26 | 1987-04-28 | Texas Instruments Incorporated | Process of making IC isolation structure |
IT1200725B (it) * | 1985-08-28 | 1989-01-27 | Sgs Microelettronica Spa | Struttura di isolamento in dispositivi mos e procedimento di preparazione della stessa |
JPS6281727A (ja) * | 1985-10-05 | 1987-04-15 | Fujitsu Ltd | 埋込型素子分離溝の形成方法 |
US4891092A (en) * | 1986-01-13 | 1990-01-02 | General Electric Company | Method for making a silicon-on-insulator substrate |
US4704186A (en) * | 1986-02-19 | 1987-11-03 | Rca Corporation | Recessed oxide method for making a silicon-on-insulator substrate |
US5182227A (en) * | 1986-04-25 | 1993-01-26 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device and method for manufacturing the same |
US4700461A (en) * | 1986-09-29 | 1987-10-20 | Massachusetts Institute Of Technology | Process for making junction field-effect transistors |
US4729816A (en) * | 1987-01-02 | 1988-03-08 | Motorola, Inc. | Isolation formation process with active area protection |
US5149669A (en) * | 1987-03-06 | 1992-09-22 | Seiko Instruments Inc. | Method of forming an isolation region in a semiconductor device |
US4775644A (en) * | 1987-06-03 | 1988-10-04 | Lsi Logic Corporation | Zero bird-beak oxide isolation scheme for integrated circuits |
FR2631488B1 (fr) * | 1988-05-10 | 1990-07-27 | Thomson Hybrides Microondes | Circuit integre hyperfrequence de type planar, comportant au moins un composant mesa, et son procede de fabrication |
JPH03156927A (ja) * | 1989-10-24 | 1991-07-04 | Hewlett Packard Co <Hp> | アルミ・メタライゼーションのパターン形成方法 |
US5293061A (en) * | 1990-04-09 | 1994-03-08 | Seiko Instruments Inc. | Semiconductor device having an isolation layer region on the side wall of a groove |
FR2672731A1 (fr) * | 1991-02-07 | 1992-08-14 | France Telecom | Procede d'oxydation localisee enterree d'un substrat de silicium et circuit integre correspondant. |
KR950002188B1 (ko) * | 1992-02-12 | 1995-03-14 | 삼성전자주식회사 | 반도체 장치의 소자분리 방법 |
KR950004972B1 (ko) * | 1992-10-13 | 1995-05-16 | 현대전자산업주식회사 | 반도체 장치의 필드산화막 형성 방법 |
US5470783A (en) * | 1994-06-06 | 1995-11-28 | At&T Ipm Corp. | Method for integrated circuit device isolation |
RU2096051C1 (ru) * | 1995-02-24 | 1997-11-20 | Григорий Борисович Альтшулер | Устройство для лазерной обработки биологической ткани (его варианты) |
US5661073A (en) * | 1995-08-11 | 1997-08-26 | Micron Technology, Inc. | Method for forming field oxide having uniform thickness |
US6830988B1 (en) | 2000-01-06 | 2004-12-14 | National Semiconductor Corporation | Method of forming an isolation structure for an integrated circuit utilizing grown and deposited oxide |
US6740592B1 (en) | 2001-12-03 | 2004-05-25 | Taiwan Semiconductor Manufacturing Company | Shallow trench isolation scheme for border-less contact process |
US20060052880A1 (en) * | 2004-09-09 | 2006-03-09 | Smith & Nephew, Inc. | Plasma sprayed porous coating for medical implants |
GB0818156D0 (en) * | 2008-10-03 | 2008-11-12 | Smith & Nephew Orthopaedics Ag | Plasma spray process and products formed thereby |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1437112A (en) * | 1973-09-07 | 1976-05-26 | Mullard Ltd | Semiconductor device manufacture |
JPS5456381A (en) * | 1977-10-14 | 1979-05-07 | Hitachi Ltd | Production of semiconductor device |
US4256514A (en) * | 1978-11-03 | 1981-03-17 | International Business Machines Corporation | Method for forming a narrow dimensioned region on a body |
US4326332A (en) * | 1980-07-28 | 1982-04-27 | International Business Machines Corp. | Method of making a high density V-MOS memory array |
EP0052948A1 (en) * | 1980-11-24 | 1982-06-02 | Motorola, Inc. | Oxide isolation process |
US4356211A (en) * | 1980-12-19 | 1982-10-26 | International Business Machines Corporation | Forming air-dielectric isolation regions in a monocrystalline silicon substrate by differential oxidation of polysilicon |
US4472240A (en) * | 1981-08-21 | 1984-09-18 | Tokyo Shibaura Denki Kabushiki Kaisha | Method for manufacturing semiconductor device |
US4398992A (en) * | 1982-05-20 | 1983-08-16 | Hewlett-Packard Company | Defect free zero oxide encroachment process for semiconductor fabrication |
-
1982
- 1982-10-08 NL NLAANVRAGE8203903,A patent/NL187373C/xx not_active IP Right Cessation
-
1983
- 1983-09-23 US US06/535,124 patent/US4533429A/en not_active Expired - Fee Related
- 1983-09-24 DE DE19833334624 patent/DE3334624A1/de active Granted
- 1983-10-05 CA CA000438376A patent/CA1209722A/en not_active Expired
- 1983-10-05 GB GB08326578A patent/GB2129213B/en not_active Expired
- 1983-10-05 FR FR8315867A patent/FR2537341B1/fr not_active Expired
- 1983-10-05 IT IT23153/83A patent/IT1172413B/it active
- 1983-10-06 JP JP58186079A patent/JPS5987832A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
US4533429A (en) | 1985-08-06 |
FR2537341B1 (fr) | 1985-09-13 |
IT8323153A0 (it) | 1983-10-05 |
JPH0473295B2 (xx) | 1992-11-20 |
GB2129213B (en) | 1986-06-25 |
IT1172413B (it) | 1987-06-18 |
GB2129213A (en) | 1984-05-10 |
DE3334624A1 (de) | 1984-04-12 |
GB8326578D0 (en) | 1983-11-09 |
FR2537341A1 (fr) | 1984-06-08 |
DE3334624C2 (xx) | 1992-05-21 |
JPS5987832A (ja) | 1984-05-21 |
NL187373B (nl) | 1991-04-02 |
CA1209722A (en) | 1986-08-12 |
NL8203903A (nl) | 1984-05-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A1B | A search report has been drawn up | ||
A85 | Still pending on 85-01-01 | ||
BC | A request for examination has been filed | ||
V1 | Lapsed because of non-payment of the annual fee |