NL159817B - Werkwijze ter vervaardiging van een halfgeleiderinrichting. - Google Patents

Werkwijze ter vervaardiging van een halfgeleiderinrichting.

Info

Publication number
NL159817B
NL159817B NL7002384A NL7002384A NL159817B NL 159817 B NL159817 B NL 159817B NL 7002384 A NL7002384 A NL 7002384A NL 7002384 A NL7002384 A NL 7002384A NL 159817 B NL159817 B NL 159817B
Authority
NL
Netherlands
Prior art keywords
semi
manufacture
conductor device
conductor
Prior art date
Application number
NL7002384A
Other languages
English (en)
Dutch (nl)
Other versions
NL7002384A (de
Inventor
Else Dr Kooi
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from NL666614016A external-priority patent/NL153374B/xx
Application filed by Philips Nv filed Critical Philips Nv
Priority to NL7002384A priority Critical patent/NL159817B/xx
Priority to NL7010208A priority patent/NL7010208A/xx
Priority to DE19712105178 priority patent/DE2105178C3/de
Priority to CA105325A priority patent/CA920281A/en
Priority to SE197871A priority patent/SE372139B/xx
Priority to AT130671A priority patent/AT339959B/de
Priority to IT2062271A priority patent/IT976361B/it
Priority to CH222571A priority patent/CH526858A/de
Priority to ES388379A priority patent/ES388379A2/es
Priority to BR108971A priority patent/BR7101089D0/pt
Priority to BE763112A priority patent/BE763112R/xx
Priority to FR7105551A priority patent/FR2081017A2/fr
Priority to DE19712133980 priority patent/DE2133980C3/de
Publication of NL7002384A publication Critical patent/NL7002384A/xx
Priority to JP14123875A priority patent/JPS5176087A/ja
Publication of NL159817B publication Critical patent/NL159817B/xx
Priority to JP13535380A priority patent/JPS56153748A/ja
Priority to JP6715583A priority patent/JPS58212148A/ja

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/32Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76205Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76213Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose
    • H01L21/76216Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose introducing electrical active impurities in the local oxidation region for the sole purpose of creating channel stoppers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0635Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors and diodes, or resistors, or capacitors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Element Separation (AREA)
NL7002384A 1966-10-05 1970-02-19 Werkwijze ter vervaardiging van een halfgeleiderinrichting. NL159817B (nl)

Priority Applications (16)

Application Number Priority Date Filing Date Title
NL7002384A NL159817B (nl) 1966-10-05 1970-02-19 Werkwijze ter vervaardiging van een halfgeleiderinrichting.
NL7010208A NL7010208A (de) 1966-10-05 1970-07-10
DE19712105178 DE2105178C3 (de) 1966-10-05 1971-02-04 Integrierte Halbleiterschaltung
CA105325A CA920281A (en) 1970-02-19 1971-02-15 Method of manufacturing a semiconductor device and semiconductor device obtained by using the method
SE197871A SE372139B (de) 1966-10-05 1971-02-16
AT130671A AT339959B (de) 1966-10-05 1971-02-16 Verfahren zum herstellen einer integrierten monolithischen halbleiteranordnung mit versenkter isolierschicht
IT2062271A IT976361B (it) 1970-02-19 1971-02-16 Metodo di fabbricazione di un dispo sitivo semiconduttore e dispositivo semiconduttore ottenuto con l ausi lio di tale metodo
CH222571A CH526858A (de) 1966-10-05 1971-02-16 Verfahren zur Herstellung einer Halbleitervorrichtung und nach diesem Verfahren hergestellte Halbleitervorrichtung
BE763112A BE763112R (fr) 1970-02-19 1971-02-17 Dispositif semiconducteur et procede pour sa
ES388379A ES388379A2 (es) 1970-02-19 1971-02-17 Un metodo de fabricar un dispositivo semiconductor.
BR108971A BR7101089D0 (pt) 1970-02-19 1971-02-17 Processo de fabricacao de dispositivo semicondutor e semicondutor obtido por esse processo
FR7105551A FR2081017A2 (en) 1966-10-05 1971-02-18 Fabrication of a semiconductor device
DE19712133980 DE2133980C3 (de) 1966-10-05 1971-07-08 Verfahren zur Herstellung einer integrierten Halbleiterschaltung
JP14123875A JPS5176087A (ja) 1970-02-19 1975-11-27 Shusekihandotaisochi
JP13535380A JPS56153748A (en) 1970-02-19 1980-09-30 Integrated semiconductor device
JP6715583A JPS58212148A (ja) 1970-02-19 1983-04-18 集積半導体装置

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL666614016A NL153374B (nl) 1966-10-05 1966-10-05 Werkwijze ter vervaardiging van een halfgeleiderinrichting voorzien van een oxydelaag en halfgeleiderinrichting vervaardigd volgens de werkwijze.
NL7002384A NL159817B (nl) 1966-10-05 1970-02-19 Werkwijze ter vervaardiging van een halfgeleiderinrichting.

Publications (2)

Publication Number Publication Date
NL7002384A NL7002384A (de) 1971-08-23
NL159817B true NL159817B (nl) 1979-03-15

Family

ID=26644100

Family Applications (1)

Application Number Title Priority Date Filing Date
NL7002384A NL159817B (nl) 1966-10-05 1970-02-19 Werkwijze ter vervaardiging van een halfgeleiderinrichting.

Country Status (5)

Country Link
AT (1) AT339959B (de)
DE (1) DE2105178C3 (de)
FR (1) FR2081017A2 (de)
NL (1) NL159817B (de)
SE (1) SE372139B (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL170901C (nl) * 1971-04-03 1983-01-03 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting.
US4044454A (en) * 1975-04-16 1977-08-30 Ibm Corporation Method for forming integrated circuit regions defined by recessed dielectric isolation

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3254277A (en) * 1963-02-27 1966-05-31 United Aircraft Corp Integrated circuit with component defining groove
US3411051A (en) * 1964-12-29 1968-11-12 Texas Instruments Inc Transistor with an isolated region having a p-n junction extending from the isolation wall to a surface
US3386865A (en) * 1965-05-10 1968-06-04 Ibm Process of making planar semiconductor devices isolated by encapsulating oxide filled channels
NL153374B (nl) * 1966-10-05 1977-05-16 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting voorzien van een oxydelaag en halfgeleiderinrichting vervaardigd volgens de werkwijze.
NL6815286A (de) * 1967-10-28 1969-05-01
US3488564A (en) * 1968-04-01 1970-01-06 Fairchild Camera Instr Co Planar epitaxial resistors
US3649386A (en) * 1968-04-23 1972-03-14 Bell Telephone Labor Inc Method of fabricating semiconductor devices

Also Published As

Publication number Publication date
DE2105178B2 (de) 1979-07-12
DE2105178A1 (de) 1971-09-02
NL7002384A (de) 1971-08-23
FR2081017B2 (de) 1976-03-19
AT339959B (de) 1977-11-25
FR2081017A2 (en) 1971-11-26
DE2105178C3 (de) 1983-12-22
ATA130671A (de) 1977-03-15
SE372139B (de) 1974-12-09

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