NL159817B - PROCESS FOR THE MANUFACTURE OF A SEMI-CONDUCTOR DEVICE. - Google Patents

PROCESS FOR THE MANUFACTURE OF A SEMI-CONDUCTOR DEVICE.

Info

Publication number
NL159817B
NL159817B NL7002384A NL7002384A NL159817B NL 159817 B NL159817 B NL 159817B NL 7002384 A NL7002384 A NL 7002384A NL 7002384 A NL7002384 A NL 7002384A NL 159817 B NL159817 B NL 159817B
Authority
NL
Netherlands
Prior art keywords
semi
manufacture
conductor device
conductor
Prior art date
Application number
NL7002384A
Other languages
Dutch (nl)
Other versions
NL7002384A (en
Inventor
Else Dr Kooi
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from NL666614016A external-priority patent/NL153374B/en
Application filed by Philips Nv filed Critical Philips Nv
Priority to NL7002384A priority Critical patent/NL159817B/en
Priority to NL7010208A priority patent/NL7010208A/xx
Priority to DE19712105178 priority patent/DE2105178C3/en
Priority to CA105325A priority patent/CA920281A/en
Priority to AT130671A priority patent/AT339959B/en
Priority to CH222571A priority patent/CH526858A/en
Priority to IT2062271A priority patent/IT976361B/en
Priority to SE197871A priority patent/SE372139B/xx
Priority to BE763112A priority patent/BE763112R/en
Priority to BR108971A priority patent/BR7101089D0/en
Priority to ES388379A priority patent/ES388379A2/en
Priority to FR7105551A priority patent/FR2081017A2/en
Priority to DE19712133980 priority patent/DE2133980C3/en
Publication of NL7002384A publication Critical patent/NL7002384A/xx
Priority to JP14123875A priority patent/JPS5176087A/en
Publication of NL159817B publication Critical patent/NL159817B/en
Priority to JP13535380A priority patent/JPS56153748A/en
Priority to JP6715583A priority patent/JPS58212148A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76205—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76213—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose
    • H01L21/76216—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose introducing electrical active impurities in the local oxidation region for the sole purpose of creating channel stoppers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0635—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors and diodes, or resistors, or capacitors
NL7002384A 1966-10-05 1970-02-19 PROCESS FOR THE MANUFACTURE OF A SEMI-CONDUCTOR DEVICE. NL159817B (en)

Priority Applications (16)

Application Number Priority Date Filing Date Title
NL7002384A NL159817B (en) 1966-10-05 1970-02-19 PROCESS FOR THE MANUFACTURE OF A SEMI-CONDUCTOR DEVICE.
NL7010208A NL7010208A (en) 1966-10-05 1970-07-10
DE19712105178 DE2105178C3 (en) 1966-10-05 1971-02-04 Integrated semiconductor circuit
CA105325A CA920281A (en) 1970-02-19 1971-02-15 Method of manufacturing a semiconductor device and semiconductor device obtained by using the method
AT130671A AT339959B (en) 1966-10-05 1971-02-16 PROCESS FOR PRODUCING AN INTEGRATED MONOLITHIC SEMICONDUCTOR ARRANGEMENT WITH A RECESSED INSULATING LAYER
CH222571A CH526858A (en) 1966-10-05 1971-02-16 Fabrication of a semiconductor device
IT2062271A IT976361B (en) 1970-02-19 1971-02-16 MANUFACTURING METHOD OF A SEMICONDUCTING SITIVE DEVICE AND A SEMICONDUCTING DEVICE OBTAINED WITH THE AID OF THIS METHOD
SE197871A SE372139B (en) 1966-10-05 1971-02-16
ES388379A ES388379A2 (en) 1970-02-19 1971-02-17 Integrated semiconductor device
BE763112A BE763112R (en) 1970-02-19 1971-02-17 SEMICONDUCTOR DEVICE AND METHOD FOR ITS
BR108971A BR7101089D0 (en) 1970-02-19 1971-02-17 SEMICONDUCTOR AND SEMICONDUCTOR DEVICE MANUFACTURING PROCESS OBTAINED BY THAT PROCESS
FR7105551A FR2081017A2 (en) 1966-10-05 1971-02-18 Fabrication of a semiconductor device
DE19712133980 DE2133980C3 (en) 1966-10-05 1971-07-08 Method for manufacturing an integrated semiconductor circuit
JP14123875A JPS5176087A (en) 1970-02-19 1975-11-27 SHUSEKIHANDOTAISOCHI
JP13535380A JPS56153748A (en) 1970-02-19 1980-09-30 Integrated semiconductor device
JP6715583A JPS58212148A (en) 1970-02-19 1983-04-18 Integrated semiconductor device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL666614016A NL153374B (en) 1966-10-05 1966-10-05 PROCESS FOR THE MANUFACTURE OF A SEMICONDUCTOR DEVICE PROVIDED WITH AN OXIDE LAYER AND SEMI-CONDUCTOR DEVICE MANUFACTURED ACCORDING TO THE PROCEDURE.
NL7002384A NL159817B (en) 1966-10-05 1970-02-19 PROCESS FOR THE MANUFACTURE OF A SEMI-CONDUCTOR DEVICE.

Publications (2)

Publication Number Publication Date
NL7002384A NL7002384A (en) 1971-08-23
NL159817B true NL159817B (en) 1979-03-15

Family

ID=26644100

Family Applications (1)

Application Number Title Priority Date Filing Date
NL7002384A NL159817B (en) 1966-10-05 1970-02-19 PROCESS FOR THE MANUFACTURE OF A SEMI-CONDUCTOR DEVICE.

Country Status (5)

Country Link
AT (1) AT339959B (en)
DE (1) DE2105178C3 (en)
FR (1) FR2081017A2 (en)
NL (1) NL159817B (en)
SE (1) SE372139B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL170901C (en) * 1971-04-03 1983-01-03 Philips Nv METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE
US4044454A (en) * 1975-04-16 1977-08-30 Ibm Corporation Method for forming integrated circuit regions defined by recessed dielectric isolation

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3254277A (en) * 1963-02-27 1966-05-31 United Aircraft Corp Integrated circuit with component defining groove
US3411051A (en) * 1964-12-29 1968-11-12 Texas Instruments Inc Transistor with an isolated region having a p-n junction extending from the isolation wall to a surface
US3386865A (en) * 1965-05-10 1968-06-04 Ibm Process of making planar semiconductor devices isolated by encapsulating oxide filled channels
NL153374B (en) * 1966-10-05 1977-05-16 Philips Nv PROCESS FOR THE MANUFACTURE OF A SEMICONDUCTOR DEVICE PROVIDED WITH AN OXIDE LAYER AND SEMI-CONDUCTOR DEVICE MANUFACTURED ACCORDING TO THE PROCEDURE.
NL6815286A (en) * 1967-10-28 1969-05-01
US3488564A (en) * 1968-04-01 1970-01-06 Fairchild Camera Instr Co Planar epitaxial resistors
US3649386A (en) * 1968-04-23 1972-03-14 Bell Telephone Labor Inc Method of fabricating semiconductor devices

Also Published As

Publication number Publication date
FR2081017A2 (en) 1971-11-26
NL7002384A (en) 1971-08-23
DE2105178C3 (en) 1983-12-22
DE2105178A1 (en) 1971-09-02
SE372139B (en) 1974-12-09
FR2081017B2 (en) 1976-03-19
AT339959B (en) 1977-11-25
DE2105178B2 (en) 1979-07-12
ATA130671A (en) 1977-03-15

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