MY159063A - Adhesive masking tape for molded underfill process for die-exposed flip chip package - Google Patents

Adhesive masking tape for molded underfill process for die-exposed flip chip package

Info

Publication number
MY159063A
MY159063A MYPI2011002715A MYPI2011002715A MY159063A MY 159063 A MY159063 A MY 159063A MY PI2011002715 A MYPI2011002715 A MY PI2011002715A MY PI2011002715 A MYPI2011002715 A MY PI2011002715A MY 159063 A MY159063 A MY 159063A
Authority
MY
Malaysia
Prior art keywords
flip chip
die
molded underfill
masking tape
heat
Prior art date
Application number
MYPI2011002715A
Other languages
English (en)
Inventor
Sung-Hwan Choi
Sang-Pil Kim
Ki-Jeong Moon
Original Assignee
Toray Advanced Mat Korea Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toray Advanced Mat Korea Inc filed Critical Toray Advanced Mat Korea Inc
Publication of MY159063A publication Critical patent/MY159063A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565—Moulds
    • H01L21/566—Release layers for moulds, e.g. release layers, layers against residue during moulding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape
    • H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
    • H01L2924/18161—Exposing the passive side of the semiconductor or solid-state body of a flip chip

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Adhesive Tapes (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
MYPI2011002715A 2011-01-20 2011-06-13 Adhesive masking tape for molded underfill process for die-exposed flip chip package MY159063A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020110005902A KR101194544B1 (ko) 2011-01-20 2011-01-20 다이 익스포즈드 플립칩 패키지(ｄｅｆｃｐ)의 몰드 언더필 공정용 점착 마스킹 테이프

Publications (1)

Publication Number Publication Date
MY159063A true MY159063A (en) 2016-12-15

Family

ID=46715407

Family Applications (1)

Application Number Title Priority Date Filing Date
MYPI2011002715A MY159063A (en) 2011-01-20 2011-06-13 Adhesive masking tape for molded underfill process for die-exposed flip chip package

Country Status (4)

Country Link
JP (1) JP5659408B2 (zh)
KR (1) KR101194544B1 (zh)
MY (1) MY159063A (zh)
TW (1) TWI504717B (zh)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5942321B2 (ja) * 2012-09-21 2016-06-29 東レ先端素材株式会社Ｔｏｒａｙ Ａｄｖａｎｃｅｄ Ｍａｔｅｒｉａｌｓ Ｋｏｒｅａ， Ｉｎｃ． モールドアンダーフィル工程のマスキングテープ用粘着剤組成物及びそれを利用したマスキングテープ
JP6204051B2 (ja) * 2013-04-19 2017-09-27 株式会社巴川製紙所 モールド成形用離型シート
JP5858347B2 (ja) * 2014-02-05 2016-02-10 大日本印刷株式会社 粘着剤組成物およびそれを用いた粘着フィルム
WO2019130539A1 (ja) * 2017-12-28 2019-07-04 リンテック株式会社 粘着シート及び半導体装置の製造方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2661950B2 (ja) * 1988-03-31 1997-10-08 古河電気工業株式会社 半導体ウエハ固定用放射線硬化性粘着テープ
CN100362035C (zh) * 2003-01-31 2008-01-16 日本瑞翁株式会社 制备环烯树脂膜的方法和制备环烯聚合物片或膜的方法
JP4563711B2 (ja) * 2004-03-30 2010-10-13 グンゼ株式会社 ダイシング用基体フイルム
JP4393934B2 (ja) * 2004-06-23 2010-01-06 リンテック株式会社 半導体加工用粘着シート
JP4805765B2 (ja) * 2006-09-12 2011-11-02 電気化学工業株式会社 電子部品固定用粘着シート及びそれを用いた電子部品の製造方法。
JP4343943B2 (ja) * 2006-11-24 2009-10-14 日東電工株式会社 半導体装置製造用の耐熱性粘着テープ
JP2010053192A (ja) * 2008-08-27 2010-03-11 Nitto Denko Corp 粘着テープ又はシート
KR20100073613A (ko) * 2008-12-23 2010-07-01 도레이첨단소재 주식회사 반도체 장치용 내열 점착테잎

Also Published As

Publication number Publication date
JP2012149210A (ja) 2012-08-09
KR20120084501A (ko) 2012-07-30
JP5659408B2 (ja) 2015-01-28
KR101194544B1 (ko) 2012-10-25
TWI504717B (zh) 2015-10-21
TW201245384A (en) 2012-11-16

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