MY137329A - Process of transferring a thin layer including an over-weakening phase - Google Patents
Process of transferring a thin layer including an over-weakening phaseInfo
- Publication number
- MY137329A MY137329A MYPI20003580A MYPI20003580A MY137329A MY 137329 A MY137329 A MY 137329A MY PI20003580 A MYPI20003580 A MY PI20003580A MY PI20003580 A MYPI20003580 A MY PI20003580A MY 137329 A MY137329 A MY 137329A
- Authority
- MY
- Malaysia
- Prior art keywords
- thin layer
- source substrate
- transferring
- over
- zone
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract 3
- 239000000758 substrate Substances 0.000 abstract 6
- 238000002513 implantation Methods 0.000 abstract 1
- 238000000926 separation method Methods 0.000 abstract 1
- 238000007669 thermal treatment Methods 0.000 abstract 1
- 230000003313 weakening effect Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physical Vapour Deposition (AREA)
- Thermal Transfer Or Thermal Recording In General (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9910121A FR2797347B1 (fr) | 1999-08-04 | 1999-08-04 | Procede de transfert d'une couche mince comportant une etape de surfragililisation |
Publications (1)
Publication Number | Publication Date |
---|---|
MY137329A true MY137329A (en) | 2009-01-30 |
Family
ID=9548879
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MYPI20003580A MY137329A (en) | 1999-08-04 | 2000-08-04 | Process of transferring a thin layer including an over-weakening phase |
Country Status (7)
Country | Link |
---|---|
EP (1) | EP1203403A1 (fr) |
JP (1) | JP2003506892A (fr) |
KR (1) | KR100742240B1 (fr) |
FR (1) | FR2797347B1 (fr) |
MY (1) | MY137329A (fr) |
TW (1) | TW457565B (fr) |
WO (1) | WO2001011667A1 (fr) |
Families Citing this family (32)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2773261B1 (fr) | 1997-12-30 | 2000-01-28 | Commissariat Energie Atomique | Procede pour le transfert d'un film mince comportant une etape de creation d'inclusions |
FR2823599B1 (fr) | 2001-04-13 | 2004-12-17 | Commissariat Energie Atomique | Substrat demomtable a tenue mecanique controlee et procede de realisation |
FR2830983B1 (fr) * | 2001-10-11 | 2004-05-14 | Commissariat Energie Atomique | Procede de fabrication de couches minces contenant des microcomposants |
JP4277481B2 (ja) * | 2002-05-08 | 2009-06-10 | 日本電気株式会社 | 半導体基板の製造方法、半導体装置の製造方法 |
FR2845517B1 (fr) * | 2002-10-07 | 2005-05-06 | Commissariat Energie Atomique | Realisation d'un substrat semiconducteur demontable et obtention d'un element semiconducteur |
FR2845518B1 (fr) * | 2002-10-07 | 2005-10-14 | Commissariat Energie Atomique | Realisation d'un substrat semiconducteur demontable et obtention d'un element semiconducteur |
FR2846788B1 (fr) * | 2002-10-30 | 2005-06-17 | Procede de fabrication de substrats demontables | |
FR2847075B1 (fr) * | 2002-11-07 | 2005-02-18 | Commissariat Energie Atomique | Procede de formation d'une zone fragile dans un substrat par co-implantation |
US7176108B2 (en) | 2002-11-07 | 2007-02-13 | Soitec Silicon On Insulator | Method of detaching a thin film at moderate temperature after co-implantation |
FR2848336B1 (fr) | 2002-12-09 | 2005-10-28 | Commissariat Energie Atomique | Procede de realisation d'une structure contrainte destinee a etre dissociee |
FR2856844B1 (fr) | 2003-06-24 | 2006-02-17 | Commissariat Energie Atomique | Circuit integre sur puce de hautes performances |
FR2857953B1 (fr) | 2003-07-21 | 2006-01-13 | Commissariat Energie Atomique | Structure empilee, et procede pour la fabriquer |
FR2861497B1 (fr) | 2003-10-28 | 2006-02-10 | Soitec Silicon On Insulator | Procede de transfert catastrophique d'une couche fine apres co-implantation |
US7772087B2 (en) | 2003-12-19 | 2010-08-10 | Commissariat A L'energie Atomique | Method of catastrophic transfer of a thin film after co-implantation |
JP4879737B2 (ja) * | 2004-01-29 | 2012-02-22 | ソワテク | 半導体層の分離方法 |
EP1605504B1 (fr) * | 2004-06-10 | 2011-05-25 | S.O.I. Tec Silicon on Insulator Technologies S.A. | Procédé pour la fabrication d'une tranche SOI |
FR2886051B1 (fr) | 2005-05-20 | 2007-08-10 | Commissariat Energie Atomique | Procede de detachement d'un film mince |
FR2889887B1 (fr) | 2005-08-16 | 2007-11-09 | Commissariat Energie Atomique | Procede de report d'une couche mince sur un support |
FR2891281B1 (fr) | 2005-09-28 | 2007-12-28 | Commissariat Energie Atomique | Procede de fabrication d'un element en couches minces. |
FR2899378B1 (fr) | 2006-03-29 | 2008-06-27 | Commissariat Energie Atomique | Procede de detachement d'un film mince par fusion de precipites |
JP5284576B2 (ja) * | 2006-11-10 | 2013-09-11 | 信越化学工業株式会社 | 半導体基板の製造方法 |
FR2910179B1 (fr) | 2006-12-19 | 2009-03-13 | Commissariat Energie Atomique | PROCEDE DE FABRICATION DE COUCHES MINCES DE GaN PAR IMPLANTATION ET RECYCLAGE D'UN SUBSTRAT DE DEPART |
KR101440930B1 (ko) * | 2007-04-20 | 2014-09-15 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Soi 기판의 제작방법 |
WO2008132895A1 (fr) * | 2007-04-20 | 2008-11-06 | Semiconductor Energy Laboratory Co., Ltd. | Procédé de fabrication d'un substrat soi et dispositif semi-conducteur |
JP5367330B2 (ja) | 2007-09-14 | 2013-12-11 | 株式会社半導体エネルギー研究所 | Soi基板の作製方法及び半導体装置の作製方法 |
JP5464843B2 (ja) | 2007-12-03 | 2014-04-09 | 株式会社半導体エネルギー研究所 | Soi基板の作製方法 |
FR2925221B1 (fr) | 2007-12-17 | 2010-02-19 | Commissariat Energie Atomique | Procede de transfert d'une couche mince |
JP5339785B2 (ja) * | 2008-06-03 | 2013-11-13 | 信越半導体株式会社 | 貼り合わせウェーハの製造方法 |
FR2947098A1 (fr) | 2009-06-18 | 2010-12-24 | Commissariat Energie Atomique | Procede de transfert d'une couche mince sur un substrat cible ayant un coefficient de dilatation thermique different de celui de la couche mince |
US8524572B2 (en) * | 2011-10-06 | 2013-09-03 | Micron Technology, Inc. | Methods of processing units comprising crystalline materials, and methods of forming semiconductor-on-insulator constructions |
US9281233B2 (en) * | 2012-12-28 | 2016-03-08 | Sunedison Semiconductor Limited | Method for low temperature layer transfer in the preparation of multilayer semiconductor devices |
FR3055063B1 (fr) * | 2016-08-11 | 2018-08-31 | Soitec | Procede de transfert d'une couche utile |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2738671B1 (fr) * | 1995-09-13 | 1997-10-10 | Commissariat Energie Atomique | Procede de fabrication de films minces a materiau semiconducteur |
FR2748851B1 (fr) * | 1996-05-15 | 1998-08-07 | Commissariat Energie Atomique | Procede de realisation d'une couche mince de materiau semiconducteur |
JP2001525991A (ja) * | 1997-05-12 | 2001-12-11 | シリコン・ジェネシス・コーポレーション | 制御された劈開プロセス |
US5877070A (en) * | 1997-05-31 | 1999-03-02 | Max-Planck Society | Method for the transfer of thin layers of monocrystalline material to a desirable substrate |
US5909627A (en) * | 1998-05-18 | 1999-06-01 | Philips Electronics North America Corporation | Process for production of thin layers of semiconductor material |
-
1999
- 1999-08-04 FR FR9910121A patent/FR2797347B1/fr not_active Expired - Fee Related
-
2000
- 2000-08-03 JP JP2001516228A patent/JP2003506892A/ja active Pending
- 2000-08-03 KR KR1020027001366A patent/KR100742240B1/ko not_active IP Right Cessation
- 2000-08-03 WO PCT/FR2000/002239 patent/WO2001011667A1/fr active Search and Examination
- 2000-08-03 EP EP00956612A patent/EP1203403A1/fr not_active Withdrawn
- 2000-08-04 MY MYPI20003580A patent/MY137329A/en unknown
- 2000-09-05 TW TW089115613A patent/TW457565B/zh not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
FR2797347A1 (fr) | 2001-02-09 |
EP1203403A1 (fr) | 2002-05-08 |
WO2001011667A1 (fr) | 2001-02-15 |
FR2797347B1 (fr) | 2001-11-23 |
KR100742240B1 (ko) | 2007-07-24 |
JP2003506892A (ja) | 2003-02-18 |
KR20020085868A (ko) | 2002-11-16 |
TW457565B (en) | 2001-10-01 |
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