MY137329A - Process of transferring a thin layer including an over-weakening phase - Google Patents

Process of transferring a thin layer including an over-weakening phase

Info

Publication number
MY137329A
MY137329A MYPI20003580A MYPI20003580A MY137329A MY 137329 A MY137329 A MY 137329A MY PI20003580 A MYPI20003580 A MY PI20003580A MY PI20003580 A MYPI20003580 A MY PI20003580A MY 137329 A MY137329 A MY 137329A
Authority
MY
Malaysia
Prior art keywords
thin layer
source substrate
transferring
over
zone
Prior art date
Application number
MYPI20003580A
Inventor
Lagahe Chrystelle
Soubie Alain
Bruel Michel
Aspar Bernard
Original Assignee
Commissariat Energie Atomique
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat Energie Atomique filed Critical Commissariat Energie Atomique
Publication of MY137329A publication Critical patent/MY137329A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering

Abstract

PROCESS OF TRANSFERRING A THIN LAYER (18) FROM A SOURCE SUBSTRATE (10) TO A TARGET SUPPORT (30) INCLUDING THE FOLLOWING STEPS:A) THE IMPLANTATION OF IONS OR GASEOUS KINDS IN THE SOURCE SUBSTRATE SO AS TO FORM IN IT A ZONE (16) CALLED CLEAVING ZONE, THAT DELIMITS THE SAID THIN LAYER (18) IN THE SOURCE SUBSTRATE;@B) THE TRANSFER OF THE SOURCE SUBSTRATE ON THE TARGET SUPPORT AND THE JOINING OF THE THIN LAYER WITH THE TRGET SUPPORT;@C) THE SEPARATION OF THE THIN LAYER (18) FROM THE SOURCE SUBSTRATE (10) ACCORDING TO THE CLEAVING ZONE;@IN COMPLIANCE WITH THE INVENTION, THE PROCESS INCLUDES PRIOR TO STEP B):@- THE OVER- WEAKENING OF THE CLEAVING ZONE (10) CAUSED BY A THERMAL TREATMENT AND/OR BY THE ACTION OF MECHANICAL EFFORTS ON THE SOURCE SUBSTRATE.
MYPI20003580A 1999-08-04 2000-08-04 Process of transferring a thin layer including an over-weakening phase MY137329A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9910121A FR2797347B1 (en) 1999-08-04 1999-08-04 METHOD FOR TRANSFERRING A THIN FILM HAVING A SURFRAGILILIZATION STEP

Publications (1)

Publication Number Publication Date
MY137329A true MY137329A (en) 2009-01-30

Family

ID=9548879

Family Applications (1)

Application Number Title Priority Date Filing Date
MYPI20003580A MY137329A (en) 1999-08-04 2000-08-04 Process of transferring a thin layer including an over-weakening phase

Country Status (7)

Country Link
EP (1) EP1203403A1 (en)
JP (1) JP2003506892A (en)
KR (1) KR100742240B1 (en)
FR (1) FR2797347B1 (en)
MY (1) MY137329A (en)
TW (1) TW457565B (en)
WO (1) WO2001011667A1 (en)

Families Citing this family (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2773261B1 (en) 1997-12-30 2000-01-28 Commissariat Energie Atomique METHOD FOR THE TRANSFER OF A THIN FILM COMPRISING A STEP OF CREATING INCLUSIONS
FR2823599B1 (en) 2001-04-13 2004-12-17 Commissariat Energie Atomique DEMOMTABLE SUBSTRATE WITH CONTROLLED MECHANICAL HOLDING AND METHOD OF MAKING
FR2830983B1 (en) * 2001-10-11 2004-05-14 Commissariat Energie Atomique METHOD FOR MANUFACTURING THIN FILMS CONTAINING MICROCOMPONENTS
JP4277481B2 (en) 2002-05-08 2009-06-10 日本電気株式会社 Semiconductor substrate manufacturing method and semiconductor device manufacturing method
FR2845517B1 (en) * 2002-10-07 2005-05-06 Commissariat Energie Atomique IMPLEMENTING A DEMONDABLE SEMICONDUCTOR SUBSTRATE AND OBTAINING A SEMICONDUCTOR ELEMENT
FR2845518B1 (en) * 2002-10-07 2005-10-14 Commissariat Energie Atomique IMPLEMENTING A DEMONDABLE SEMICONDUCTOR SUBSTRATE AND OBTAINING A SEMICONDUCTOR ELEMENT
FR2846788B1 (en) * 2002-10-30 2005-06-17 PROCESS FOR PRODUCING DETACHABLE SUBSTRATES
FR2847075B1 (en) * 2002-11-07 2005-02-18 Commissariat Energie Atomique PROCESS FOR FORMING A FRAGILE ZONE IN A SUBSTRATE BY CO-IMPLANTATION
US7176108B2 (en) 2002-11-07 2007-02-13 Soitec Silicon On Insulator Method of detaching a thin film at moderate temperature after co-implantation
FR2848336B1 (en) 2002-12-09 2005-10-28 Commissariat Energie Atomique METHOD FOR PRODUCING A STRESS STRUCTURE FOR DISSOCIATING
FR2856844B1 (en) 2003-06-24 2006-02-17 Commissariat Energie Atomique HIGH PERFORMANCE CHIP INTEGRATED CIRCUIT
FR2857953B1 (en) * 2003-07-21 2006-01-13 Commissariat Energie Atomique STACKED STRUCTURE, AND METHOD FOR MANUFACTURING THE SAME
FR2861497B1 (en) 2003-10-28 2006-02-10 Soitec Silicon On Insulator METHOD FOR CATASTROPHIC TRANSFER OF A FINE LAYER AFTER CO-IMPLANTATION
US7772087B2 (en) 2003-12-19 2010-08-10 Commissariat A L'energie Atomique Method of catastrophic transfer of a thin film after co-implantation
JP4879737B2 (en) * 2004-01-29 2012-02-22 ソワテク Method for separating semiconductor layers
EP1605504B1 (en) 2004-06-10 2011-05-25 S.O.I. Tec Silicon on Insulator Technologies S.A. Method for manufacturing a SOI wafer
FR2886051B1 (en) 2005-05-20 2007-08-10 Commissariat Energie Atomique METHOD FOR DETACHING THIN FILM
FR2889887B1 (en) 2005-08-16 2007-11-09 Commissariat Energie Atomique METHOD FOR DEFERING A THIN LAYER ON A SUPPORT
FR2891281B1 (en) 2005-09-28 2007-12-28 Commissariat Energie Atomique METHOD FOR MANUFACTURING A THIN FILM ELEMENT
FR2899378B1 (en) 2006-03-29 2008-06-27 Commissariat Energie Atomique METHOD FOR DETACHING A THIN FILM BY FUSION OF PRECIPITS
JP5284576B2 (en) * 2006-11-10 2013-09-11 信越化学工業株式会社 Manufacturing method of semiconductor substrate
FR2910179B1 (en) 2006-12-19 2009-03-13 Commissariat Energie Atomique METHOD FOR MANUFACTURING THIN LAYERS OF GaN BY IMPLANTATION AND RECYCLING OF A STARTING SUBSTRATE
WO2008132895A1 (en) * 2007-04-20 2008-11-06 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing soi substrate and semiconductor device
KR101440930B1 (en) * 2007-04-20 2014-09-15 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Method of manufacturing soi substrate
JP5367330B2 (en) 2007-09-14 2013-12-11 株式会社半導体エネルギー研究所 Method for manufacturing SOI substrate and method for manufacturing semiconductor device
JP5464843B2 (en) 2007-12-03 2014-04-09 株式会社半導体エネルギー研究所 Method for manufacturing SOI substrate
FR2925221B1 (en) 2007-12-17 2010-02-19 Commissariat Energie Atomique METHOD FOR TRANSFERRING A THIN LAYER
JP5339785B2 (en) * 2008-06-03 2013-11-13 信越半導体株式会社 Manufacturing method of bonded wafer
FR2947098A1 (en) 2009-06-18 2010-12-24 Commissariat Energie Atomique METHOD OF TRANSFERRING A THIN LAYER TO A TARGET SUBSTRATE HAVING A THERMAL EXPANSION COEFFICIENT DIFFERENT FROM THAT OF THE THIN LAYER
US8524572B2 (en) * 2011-10-06 2013-09-03 Micron Technology, Inc. Methods of processing units comprising crystalline materials, and methods of forming semiconductor-on-insulator constructions
US9281233B2 (en) * 2012-12-28 2016-03-08 Sunedison Semiconductor Limited Method for low temperature layer transfer in the preparation of multilayer semiconductor devices
FR3055063B1 (en) * 2016-08-11 2018-08-31 Soitec METHOD OF TRANSFERRING A USEFUL LAYER
FR3108787B1 (en) * 2020-03-31 2022-04-01 Commissariat Energie Atomique LOW TEMPERATURE TRANSFER AND CURE PROCESS OF A SEMICONDUCTOR LAYER

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2738671B1 (en) * 1995-09-13 1997-10-10 Commissariat Energie Atomique PROCESS FOR PRODUCING THIN FILMS WITH SEMICONDUCTOR MATERIAL
FR2748851B1 (en) * 1996-05-15 1998-08-07 Commissariat Energie Atomique PROCESS FOR PRODUCING A THIN FILM OF SEMICONDUCTOR MATERIAL
CN1146973C (en) * 1997-05-12 2004-04-21 硅源公司 Controlled cleavage process
US5877070A (en) * 1997-05-31 1999-03-02 Max-Planck Society Method for the transfer of thin layers of monocrystalline material to a desirable substrate
US5909627A (en) * 1998-05-18 1999-06-01 Philips Electronics North America Corporation Process for production of thin layers of semiconductor material

Also Published As

Publication number Publication date
FR2797347A1 (en) 2001-02-09
KR20020085868A (en) 2002-11-16
KR100742240B1 (en) 2007-07-24
EP1203403A1 (en) 2002-05-08
TW457565B (en) 2001-10-01
JP2003506892A (en) 2003-02-18
WO2001011667A1 (en) 2001-02-15
FR2797347B1 (en) 2001-11-23

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