MX2023007099A - Metodo para el deposito de una aleacion de bronce en un circuito impreso y un circuito impreso obtenido por dicho metodo. - Google Patents

Metodo para el deposito de una aleacion de bronce en un circuito impreso y un circuito impreso obtenido por dicho metodo.

Info

Publication number
MX2023007099A
MX2023007099A MX2023007099A MX2023007099A MX2023007099A MX 2023007099 A MX2023007099 A MX 2023007099A MX 2023007099 A MX2023007099 A MX 2023007099A MX 2023007099 A MX2023007099 A MX 2023007099A MX 2023007099 A MX2023007099 A MX 2023007099A
Authority
MX
Mexico
Prior art keywords
printed circuit
depositing
bronze alloy
bronze
weight
Prior art date
Application number
MX2023007099A
Other languages
English (en)
Inventor
Jérôme Sanson
Stéphanie Coquillard
Original Assignee
Linxens Holding
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Linxens Holding filed Critical Linxens Holding
Publication of MX2023007099A publication Critical patent/MX2023007099A/es

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/10—Electroplating with more than one layer of the same or of different metals
    • C25D5/12—Electroplating with more than one layer of the same or of different metals at least one layer being of nickel or chromium
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/10—Electroplating with more than one layer of the same or of different metals
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D3/00—Electroplating: Baths therefor
    • C25D3/02—Electroplating: Baths therefor from solutions
    • C25D3/56—Electroplating: Baths therefor from solutions of alloys
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D3/00—Electroplating: Baths therefor
    • C25D3/02—Electroplating: Baths therefor from solutions
    • C25D3/56—Electroplating: Baths therefor from solutions of alloys
    • C25D3/58—Electroplating: Baths therefor from solutions of alloys containing more than 50% by weight of copper
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00—Electroplating characterised by the article coated
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745—Mounting details of integrated circuit chips
    • G06K19/07747—Mounting details of integrated circuit chips at least one of the integrated circuit chips being mounted as a module
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/244—Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/032—Materials
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0338—Layered conductor, e.g. layered metal substrate, layered finish layer, layered thin film adhesion layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Theoretical Computer Science (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Laminated Bodies (AREA)
  • Physical Vapour Deposition (AREA)

Abstract

Se divulga un método para el depósito de una aleación de bronce en un circuito impreso (5). Dicho método comprende una operación de depósito electrolítico de al menos una capa de bronce (12) sobre una hoja de cobre (10). La capa de bronce (12) comprende, después del depósito, 45-65 % en peso de cobre, 35-45 % en peso de estaño, y 2-11 % en peso de zinc. También se divulga un circuito impreso (5) obtenido por este método. tal como el de la FIGURA.
MX2023007099A 2020-12-18 2021-12-07 Metodo para el deposito de una aleacion de bronce en un circuito impreso y un circuito impreso obtenido por dicho metodo. MX2023007099A (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR2013714A FR3118067B1 (fr) 2020-12-18 2020-12-18 Procédé de dépôt d’un alliage de bronze sur un circuit imprimé et circuit imprimé obtenu par ce procédé
PCT/EP2021/084523 WO2022128608A1 (fr) 2020-12-18 2021-12-07 Procédé de dépôt d'un alliage de bronze sur un circuit imprimé et circuit imprimé obtenu par ce procédé

Publications (1)

Publication Number Publication Date
MX2023007099A true MX2023007099A (es) 2023-06-27

Family

ID=74554132

Family Applications (1)

Application Number Title Priority Date Filing Date
MX2023007099A MX2023007099A (es) 2020-12-18 2021-12-07 Metodo para el deposito de una aleacion de bronce en un circuito impreso y un circuito impreso obtenido por dicho metodo.

Country Status (10)

Country Link
US (1) US20240117518A1 (es)
EP (1) EP4263920A1 (es)
KR (1) KR20230121754A (es)
CN (1) CN116802344A (es)
AU (1) AU2021402198A1 (es)
CA (1) CA3202285A1 (es)
FR (1) FR3118067B1 (es)
MX (1) MX2023007099A (es)
TW (1) TW202231924A (es)
WO (1) WO2022128608A1 (es)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3141834A1 (fr) * 2022-11-08 2024-05-10 Linxens Holding Circuit imprimé avec une couche d’alliage substitutive de l’or et procédé de fabrication d’un tel circuit imprimé
CN115939074B (zh) * 2023-03-13 2023-08-22 新恒汇电子股份有限公司 一种新型双面柔性引线框架结构及其制备工艺

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1930478B1 (en) * 2006-12-06 2013-06-19 Enthone, Inc. Electrolyte composition and method for the deposition of quaternary copper alloys
JP5642928B2 (ja) * 2007-12-12 2014-12-17 ローム・アンド・ハース・エレクトロニック・マテリアルズ，エル．エル．シー． 青銅の電気めっき
EP2738290A1 (en) * 2011-08-30 2014-06-04 Rohm and Haas Electronic Materials LLC Adhesion promotion of cyanide-free white bronze
ES2790583T3 (es) * 2015-09-30 2020-10-28 Coventya S P A Baño de galvanoplastia para el depósito electroquímica de una aleación de Cu-Sn-Zn-Pd, procedimiento para el depósito electroquímica de dicha aleación, sustrato que comprende dicha aleación y usos del sustrato
CN111534840B (zh) * 2020-06-07 2021-12-17 深圳市普雷德科技有限公司 一种pcb铜合金的电镀方法

Also Published As

Publication number Publication date
FR3118067A1 (fr) 2022-06-24
EP4263920A1 (fr) 2023-10-25
WO2022128608A1 (fr) 2022-06-23
US20240117518A1 (en) 2024-04-11
FR3118067B1 (fr) 2023-05-26
TW202231924A (zh) 2022-08-16
KR20230121754A (ko) 2023-08-21
CN116802344A (zh) 2023-09-22
CA3202285A1 (en) 2022-06-23
AU2021402198A1 (en) 2023-07-06

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