MD4554C1 - Process for increasing the efficiency of photovoltaic cells based on p+InP-p-InP-n+CdS - Google Patents

Process for increasing the efficiency of photovoltaic cells based on p+InP-p-InP-n+CdS

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Publication number
MD4554C1
MD4554C1 MDA20170092A MD20170092A MD4554C1 MD 4554 C1 MD4554 C1 MD 4554C1 MD A20170092 A MDA20170092 A MD A20170092A MD 20170092 A MD20170092 A MD 20170092A MD 4554 C1 MD4554 C1 MD 4554C1
Authority
MD
Moldova
Prior art keywords
inp
cds
deposition
board
increasing
Prior art date
Application number
MDA20170092A
Other languages
Romanian (ro)
Russian (ru)
Other versions
MD4554B1 (en
Inventor
Василе БОТНАРЮК
Леонид ГОРЧАК
Андрей КОВАЛ
Симион РАЕВСКИЙ
Original Assignee
Государственный Университет Молд0
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Государственный Университет Молд0 filed Critical Государственный Университет Молд0
Priority to MDA20170092A priority Critical patent/MD4554C1/en
Publication of MD4554B1 publication Critical patent/MD4554B1/en
Publication of MD4554C1 publication Critical patent/MD4554C1/en

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  • Photovoltaic Devices (AREA)

Abstract

The invention relates to semiconductor technology and can be used, in particular, in photoelectric converters.The process for increasing the efficiency of photovoltaic cells based on p+InP-p-InP-n+CdS involves the growth of the p-InP layer on a substrate, made in the form of a p+InP board with the crystallographic orientation (100), disorientation of 3…5° in the direction ( 110) and the charge carrier concentration of 1018 cm-3, deposition, on the frontal part of the board, using the method of quasi-closed volume of the n+CdS layer, deposition of an ohmic contact of Ag+Zn on the reverse side of the board, its thermal treatment at a temperature of 450°C, deposition of an ohmic contact of In onto the n+CdS layer, its thermal treatment at a temperature of 250°C and deposition by the pulverization method, at a temperature of 300°C, of a ZnO antireflection layer.
MDA20170092A 2017-10-18 2017-10-18 Process for increasing the efficiency of photovoltaic cells based on p+InP-p-InP-n+CdS MD4554C1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
MDA20170092A MD4554C1 (en) 2017-10-18 2017-10-18 Process for increasing the efficiency of photovoltaic cells based on p+InP-p-InP-n+CdS

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
MDA20170092A MD4554C1 (en) 2017-10-18 2017-10-18 Process for increasing the efficiency of photovoltaic cells based on p+InP-p-InP-n+CdS

Publications (2)

Publication Number Publication Date
MD4554B1 MD4554B1 (en) 2018-02-28
MD4554C1 true MD4554C1 (en) 2018-09-30

Family

ID=61282887

Family Applications (1)

Application Number Title Priority Date Filing Date
MDA20170092A MD4554C1 (en) 2017-10-18 2017-10-18 Process for increasing the efficiency of photovoltaic cells based on p+InP-p-InP-n+CdS

Country Status (1)

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MD (1) MD4554C1 (en)

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL252729A (en) * 1959-06-18
CN1237272A (en) * 1997-08-27 1999-12-01 松下电器产业株式会社 Silicon carbide substrate, process for producing the same, and semiconductor element containing silicon carbide substrate
JP3920103B2 (en) * 2002-01-31 2007-05-30 大阪府 Insulating layer embedded type semiconductor silicon carbide substrate manufacturing method and manufacturing apparatus thereof
CN101313092B (en) * 2005-08-26 2013-08-21 斯莫特克有限公司 Interconnects and heat dissipators based on nanostructures
MD3372C2 (en) * 2006-03-31 2008-02-29 ШИШЯНУ Серджиу Process for obtaining photocells (variants)
JP5448304B2 (en) * 2007-04-19 2014-03-19 パナソニック株式会社 Semiconductor device
MD151Z (en) * 2008-12-30 2010-09-30 Государственный Университет Молд0 Process for growth of GaAs epitaxial layers into a horizontal reactor
US11417788B2 (en) * 2010-11-19 2022-08-16 The Boeing Company Type-II high bandgap tunnel junctions of InP lattice constant for multijunction solar cells
MD4261B1 (en) * 2011-05-12 2013-11-30 Государственный Университет Молд0 Method for manufacturing a semiconductor device with relief p-n junction (embodiments)
MD4280C1 (en) * 2013-09-04 2014-10-31 Государственный Университет Молд0 pInP-nCdS structure growth method
MD972Z (en) * 2015-02-19 2016-06-30 Государственный Университет Молд0 Method for p+InP-p-InP-n+CdS structure growth for photovoltaic cells
MD4510C1 (en) * 2016-06-23 2018-03-31 Государственный Университет Молд0 Method for growth of n+-p-p+ InP structure for solar cells

Also Published As

Publication number Publication date
MD4554B1 (en) 2018-02-28

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Legal Events

Date Code Title Description
FG4A Patent for invention issued
KA4A Patent for invention lapsed due to non-payment of fees (with right of restoration)