KR970053990A - 강유전체 캐패시터의 제조방법 - Google Patents
강유전체 캐패시터의 제조방법 Download PDFInfo
- Publication number
- KR970053990A KR970053990A KR1019950046910A KR19950046910A KR970053990A KR 970053990 A KR970053990 A KR 970053990A KR 1019950046910 A KR1019950046910 A KR 1019950046910A KR 19950046910 A KR19950046910 A KR 19950046910A KR 970053990 A KR970053990 A KR 970053990A
- Authority
- KR
- South Korea
- Prior art keywords
- contact hole
- forming
- oxide
- manufacturing
- mask
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
- H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
- H01L28/90—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions
- H01L28/91—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions made by depositing layers, e.g. by depositing alternating conductive and insulating layers
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Memories (AREA)
- Electrodes Of Semiconductors (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
반도체 메모리 장치의 축적 캐패시터를 제작하는 방법에 있어서, G-bit급 DRAM 제조에 유용한 고유전막과 백금 전극을 구비한 캐패시터의 제조방법이 개시된다.
본 발명에 의한 강유전체 캐패시터의 제작방법에 의하면, 통상의 포토레지스트를 마스크로 사용하지 않고 콘택 홀내에 매몰되어 피식각물인 백금과 단차없이 리세스된 산화물(Oxide)을 마스크로 사용함으로써, 간단한 공정 개선에 의해 백금 전극 패터닝시 발생하는 측벽부착막의 형성을 방지할 수 있다. 또한, 스토리지 노드패턴을 입체적인 구조로 형성함으로써 제한된 셀 면적 내에서 충분한 캐패시턴스를 확보할 수 있다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3도 내지 제13도는 본 발명에 의한 강유전체 캐패시터의 제조방법을 각 단계별로 도시한 공정단면도이다.
Claims (6)
- 트랜지스터들이 형성된 반도체 기판상에 프러그(plug)를 형성하는 공정; 결과물 전면에 식각중지용 질화막과, 콘택 홀 형성용 산화막을 순차 증착하는 공정; 상기 프러그와의 콘택 및 스토리지 패턴의 입체화를 위한 콘택 홀 형성 공정; 하부전극이 될 백금 증착공정; 산화막 증착 및 에치 백을 통하여 상기 콘택 홀내에 산화물 마스크를 형성하는 공정; 상기 산화물 마스크를 식각 마스크로 이용한 백금 식각공정; 상기 콘택 홀내의 산화물 마스크 및 상기 콘택홀 형성용 산화막을 동시에 제거하여 입체화된 하부전극을 형성하는 공정; 및 강유전막 및 상부전극을 순차적으로 형성하는 공정으로 이루어진 강유전체 캐패시터 제조방법.
- 제1항에 있어서, 상기 백금 증착공정 전에 상기 프러그내의 실리콘이 금속 내부로의 확산을 방지하기 위하여, 장벽 금속층을 형성하는 공정을 부가하는 것을 특징으로 하는 강유전체 캐패시터의 제조방법.
- 제2항에 있어서, 상기 장벽 금속이 TiN로 이루어진 것을 특징으로 하는 강유전체 캐패시터의 제조방법;
- 제1항에 있어서, 상기 콘택 홀 형성용 산화막은 BPSG(Borophosphorus Silica Glass), USG(Undoped Silica Glass), PE-SiH4, PE-TEOS, SOG(Silicon on Glass), HTO(High Temperature Oxide), 및 FOX(Flowable Oxide) 중의 어느 하나로 이루어진 것을 특징으로 하는 강유전체 캐패시터의 제조방법.
- 제1항에 있어서, 상기 산화물 마스크 및 상기 콘택홀 형성용 산화막을 동시에 제거하는 방법은 상기 질화막을 식각 중지막(Etch Stopper)로 이용한 습식 식각(Wet Etching)을 사용하는 것을 특징으로 하는 강유전체 캐패시터의 제조방법.
- 제1항에 있어서, 상기 강유전막은 MOCVD(Metal Organic CVD)방법으로 증착된 PZT(PbZiTiO3) 및 BST(BrSrTiO3) 중의 어느 하나로 이루어진 것을 특징으로 하는 강유전체 캐패시터의 제조방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950046910A KR0170308B1 (ko) | 1995-12-05 | 1995-12-05 | 강유전체 캐패시터의 제조방법 |
JP8317652A JPH09289296A (ja) | 1995-12-05 | 1996-11-28 | 強誘電体キャパシタ及びその製造方法 |
US08/760,576 US5843818A (en) | 1995-12-05 | 1996-12-03 | Methods of fabricating ferroelectric capacitors |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950046910A KR0170308B1 (ko) | 1995-12-05 | 1995-12-05 | 강유전체 캐패시터의 제조방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR970053990A true KR970053990A (ko) | 1997-07-31 |
KR0170308B1 KR0170308B1 (ko) | 1999-02-01 |
Family
ID=19437956
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950046910A KR0170308B1 (ko) | 1995-12-05 | 1995-12-05 | 강유전체 캐패시터의 제조방법 |
Country Status (3)
Country | Link |
---|---|
US (1) | US5843818A (ko) |
JP (1) | JPH09289296A (ko) |
KR (1) | KR0170308B1 (ko) |
Families Citing this family (38)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19640273C1 (de) * | 1996-09-30 | 1998-03-12 | Siemens Ag | Verfahren zur Herstellung barrierenfreier Halbleiterspeicheranordnungen |
GB2324408A (en) * | 1997-01-21 | 1998-10-21 | United Microelectronics Corporation | Forming DRAM cells |
US5976928A (en) * | 1997-11-20 | 1999-11-02 | Advanced Technology Materials, Inc. | Chemical mechanical polishing of FeRAM capacitors |
US6911371B2 (en) | 1997-12-19 | 2005-06-28 | Micron Technology, Inc. | Capacitor forming methods with barrier layers to threshold voltage shift inducing material |
US6165833A (en) | 1997-12-19 | 2000-12-26 | Micron Technology, Inc. | Semiconductor processing method of forming a capacitor |
US6319774B1 (en) * | 1998-02-27 | 2001-11-20 | Micron Technology, Inc. | Method for forming a memory cell |
US6838719B2 (en) * | 1998-04-09 | 2005-01-04 | Samsung Electronics Co. Ltd. | Dram cell capacitors having U-shaped electrodes with rough inner and outer surfaces |
TW372365B (en) * | 1998-04-20 | 1999-10-21 | United Microelectronics Corp | Manufacturing method for capacitors of dynamic random access memory |
US6380574B1 (en) * | 1998-05-25 | 2002-04-30 | Hitachi, Ltd. | Ferroelectric capacitor with a self-aligned diffusion barrier |
US6611020B2 (en) | 1998-08-17 | 2003-08-26 | Micron Technology, Inc. | Memory cell structure |
DE19842704C2 (de) * | 1998-09-17 | 2002-03-28 | Infineon Technologies Ag | Herstellverfahren für einen Kondensator mit einem Hoch-epsilon-Dielektrikum oder einem Ferroelektrikum nach dem Fin-Stack-Prinzip unter Einsatz einer Negativform |
US6218239B1 (en) * | 1998-11-17 | 2001-04-17 | United Microelectronics Corp. | Manufacturing method of a bottom plate |
US6090679A (en) * | 1998-11-30 | 2000-07-18 | Worldwide Semiconductor Manufacturing Corporation | Method for forming a crown capacitor |
KR100345664B1 (ko) * | 1999-05-31 | 2002-07-24 | 주식회사 하이닉스반도체 | 반도체 소자의 캐패시터 하부전극 형성방법 |
DE19929723B4 (de) * | 1999-06-29 | 2004-05-06 | Infineon Technologies Ag | Verfahren zur Herstellung einer Elektrode |
KR100546291B1 (ko) * | 1999-07-16 | 2006-01-26 | 삼성전자주식회사 | 커패시터의 전극 제조 방법 |
TW417293B (en) * | 1999-08-27 | 2001-01-01 | Taiwan Semiconductor Mfg | Formation of DRAM capacitor |
KR100541700B1 (ko) * | 1999-10-28 | 2006-01-12 | 주식회사 하이닉스반도체 | 커패시터 형성방법 |
JP2001313379A (ja) * | 2000-04-28 | 2001-11-09 | Nec Corp | 半導体メモリの製造方法及び容量素子の製造方法 |
US7192335B2 (en) * | 2002-08-29 | 2007-03-20 | Micron Technology, Inc. | Method and apparatus for chemically, mechanically, and/or electrolytically removing material from microelectronic substrates |
US7112121B2 (en) | 2000-08-30 | 2006-09-26 | Micron Technology, Inc. | Methods and apparatus for electrical, mechanical and/or chemical removal of conductive material from a microelectronic substrate |
US7153195B2 (en) * | 2000-08-30 | 2006-12-26 | Micron Technology, Inc. | Methods and apparatus for selectively removing conductive material from a microelectronic substrate |
US7094131B2 (en) * | 2000-08-30 | 2006-08-22 | Micron Technology, Inc. | Microelectronic substrate having conductive material with blunt cornered apertures, and associated methods for removing conductive material |
US7129160B2 (en) | 2002-08-29 | 2006-10-31 | Micron Technology, Inc. | Method for simultaneously removing multiple conductive materials from microelectronic substrates |
US7134934B2 (en) | 2000-08-30 | 2006-11-14 | Micron Technology, Inc. | Methods and apparatus for electrically detecting characteristics of a microelectronic substrate and/or polishing medium |
US7160176B2 (en) | 2000-08-30 | 2007-01-09 | Micron Technology, Inc. | Methods and apparatus for electrically and/or chemically-mechanically removing conductive material from a microelectronic substrate |
US7220166B2 (en) | 2000-08-30 | 2007-05-22 | Micron Technology, Inc. | Methods and apparatus for electromechanically and/or electrochemically-mechanically removing conductive material from a microelectronic substrate |
US7153410B2 (en) * | 2000-08-30 | 2006-12-26 | Micron Technology, Inc. | Methods and apparatus for electrochemical-mechanical processing of microelectronic workpieces |
US7074113B1 (en) | 2000-08-30 | 2006-07-11 | Micron Technology, Inc. | Methods and apparatus for removing conductive material from a microelectronic substrate |
US7078308B2 (en) * | 2002-08-29 | 2006-07-18 | Micron Technology, Inc. | Method and apparatus for removing adjacent conductive and nonconductive materials of a microelectronic substrate |
US6462368B2 (en) | 2000-10-31 | 2002-10-08 | Hitachi, Ltd. | Ferroelectric capacitor with a self-aligned diffusion barrier |
KR100413606B1 (ko) * | 2001-12-31 | 2004-01-03 | 주식회사 하이닉스반도체 | 캐패시터의 제조 방법 |
KR100536030B1 (ko) * | 2003-02-25 | 2005-12-12 | 삼성전자주식회사 | 반도체 장치의 커패시터 형성 방법 |
US7112122B2 (en) | 2003-09-17 | 2006-09-26 | Micron Technology, Inc. | Methods and apparatus for removing conductive material from a microelectronic substrate |
JP2005158842A (ja) * | 2003-11-21 | 2005-06-16 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
US7153777B2 (en) * | 2004-02-20 | 2006-12-26 | Micron Technology, Inc. | Methods and apparatuses for electrochemical-mechanical polishing |
US7566391B2 (en) | 2004-09-01 | 2009-07-28 | Micron Technology, Inc. | Methods and systems for removing materials from microfeature workpieces with organic and/or non-aqueous electrolytic media |
US20080087930A1 (en) * | 2006-10-11 | 2008-04-17 | Jong-Cheol Lee | Capicitor Using Binary Metal Electrode, Semiconductor Device Having The Capacitor And Method of Fabricating The Same |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5046043A (en) * | 1987-10-08 | 1991-09-03 | National Semiconductor Corporation | Ferroelectric capacitor and memory cell including barrier and isolation layers |
KR950000156B1 (ko) * | 1989-02-08 | 1995-01-10 | 세이꼬 엡슨 가부시끼가이샤 | 반도체 장치 |
KR940006682B1 (ko) * | 1991-10-17 | 1994-07-25 | 삼성전자 주식회사 | 반도체 메모리장치의 제조방법 |
US5270241A (en) * | 1992-03-13 | 1993-12-14 | Micron Technology, Inc. | Optimized container stacked capacitor DRAM cell utilizing sacrificial oxide deposition and chemical mechanical polishing |
US5392189A (en) * | 1993-04-02 | 1995-02-21 | Micron Semiconductor, Inc. | Capacitor compatible with high dielectric constant materials having two independent insulative layers and the method for forming same |
US5381302A (en) * | 1993-04-02 | 1995-01-10 | Micron Semiconductor, Inc. | Capacitor compatible with high dielectric constant materials having a low contact resistance layer and the method for forming same |
US5489548A (en) * | 1994-08-01 | 1996-02-06 | Texas Instruments Incorporated | Method of forming high-dielectric-constant material electrodes comprising sidewall spacers |
US5488011A (en) * | 1994-11-08 | 1996-01-30 | Micron Technology, Inc. | Method of forming contact areas between vertical conductors |
US5668038A (en) * | 1996-10-09 | 1997-09-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | One step smooth cylinder surface formation process in stacked cylindrical DRAM products |
-
1995
- 1995-12-05 KR KR1019950046910A patent/KR0170308B1/ko not_active IP Right Cessation
-
1996
- 1996-11-28 JP JP8317652A patent/JPH09289296A/ja active Pending
- 1996-12-03 US US08/760,576 patent/US5843818A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH09289296A (ja) | 1997-11-04 |
KR0170308B1 (ko) | 1999-02-01 |
US5843818A (en) | 1998-12-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR970053990A (ko) | 강유전체 캐패시터의 제조방법 | |
US7557013B2 (en) | Methods of forming a plurality of capacitors | |
US6319789B1 (en) | Method for improved processing and etchback of a container capacitor | |
US5994181A (en) | Method for forming a DRAM cell electrode | |
US5774327A (en) | High dielectric capacitors | |
US20080090416A1 (en) | Methods of etching polysilicon and methods of forming pluralities of capacitors | |
KR960043218A (ko) | 반도체 장치의 커패시터 및 그 제조방법 | |
WO2009023396A2 (en) | Methods of forming a plurality of capacitors | |
US20030054634A1 (en) | Method for fabricating semiconductor device | |
KR970063744A (ko) | 메모리 셀내에 적층 캐패시터의 원통형 저장 노드를 제조하는 방법 | |
KR100246989B1 (ko) | 반도체소자의 캐패시터 형성방법 | |
US6291850B1 (en) | Structure of cylindrical capacitor electrode with layer of hemispherical grain silicon | |
JP2741672B2 (ja) | スタック形dramセルのキャパシタ製造方法 | |
US5219780A (en) | Method for fabricating a semiconductor memory cell | |
KR19990005449A (ko) | 반도체 메모리 장치 및 그 제조 방법 | |
JP3604525B2 (ja) | 半導体装置のキャパシタ製造方法 | |
US6261900B1 (en) | Method for fabricating a DRAM capacitor | |
JPH09213903A (ja) | 半導体記憶装置の製造方法 | |
KR100685674B1 (ko) | 캐패시터의 제조 방법 | |
US5658817A (en) | Method for fabricating stacked capacitors of semiconductor device | |
KR20020031083A (ko) | 반도체 장치 및 그 제조 방법 | |
KR100491420B1 (ko) | 반도체 소자의 캐패시터 형성 방법 | |
KR0132654B1 (ko) | 반도체 소자의 캐패시터 제조방법 | |
KR960030407A (ko) | 반도체 메모리장치의 캐패시터 및 그 제조방법 | |
KR20020042192A (ko) | 커패시터 제조 방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20071001 Year of fee payment: 10 |
|
LAPS | Lapse due to unpaid annual fee |