KR970018400A - 반도체 소자의 금속배선층 형성후 처리방법 - Google Patents

반도체 소자의 금속배선층 형성후 처리방법 Download PDF

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Publication number
KR970018400A
KR970018400A KR1019950030186A KR19950030186A KR970018400A KR 970018400 A KR970018400 A KR 970018400A KR 1019950030186 A KR1019950030186 A KR 1019950030186A KR 19950030186 A KR19950030186 A KR 19950030186A KR 970018400 A KR970018400 A KR 970018400A
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South Korea
Prior art keywords
metal
wiring layer
film
metal wiring
layer
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KR1019950030186A
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English (en)
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KR0184066B1 (ko
Inventor
이정옥
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문정환
엘지반도체 주식회사
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Priority to KR1019950030186A priority Critical patent/KR0184066B1/ko
Publication of KR970018400A publication Critical patent/KR970018400A/ko
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Publication of KR0184066B1 publication Critical patent/KR0184066B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76883—Post-treatment or after-treatment of the conductive material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/7685—Barrier, adhesion or liner layers the layer covering a conductive structure
    • H01L21/76852—Barrier, adhesion or liner layers the layer covering a conductive structure the layer also covering the sidewalls of the conductive structure

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

본 발명은 반도체 기판상에 형성시킨 절연막에 콘택부위를 정의하여, 콘택홀을 형성시키고, 절연막과 콘택홀위에 장벽금속층과, 금속막과, 반사방지막을 적층하여 형성시킨 후에, 배선영역을 정의하는 감광막 마스크를 이용한 장벽금속층과, 금속막과, 반사방지막의 건식식각으로 형성시키는 반도체 소자의 금속배선층 형성후 처리방법에 있어서, 금속매선층을 혼합가스와 반응시켜서, 금속배선층의 측벽에서 노출된 금속막을 비활성화시키는 동시에 감광막 마스크와, 금속배선층의 측벽 하단에 발생되는 폴리머가 제거되도록 하는 단계를 코함하여 이루어지는 것을 특징으로 한다.

Description

반도체 소자의 금속배선층 형성후 처리방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3도는 본 발명에 의한 반도체 소자의 금속배선층 형성후 처리방법의 흐름도.
제4도는 본 발명에 의한 반도체 소자의 금속배선층 형성후 처리방법을 진행시키는 단계를 도시한 단면도.

Claims (4)

  1. 반도체 기판상에 형성시킨 절연막에 콘택부위를 정의하여, 콘택홀을 형성시키고, 상기 절연막과 상기 콘택홀 위에 장벽금속층과, 금속막과, 반사방지막을 적층하여 형성시킨 후에, 배선영역을 정의하는 감광막 마스크를 이용한 장벽금속층과 금속막과, 반사방지막의 건식식각으로 형성시키는 반도체 소자의 금속배선층 형성후 처리방법에 있어서, 상기 금속배선층을 소정의 혼합가스와 반응시켜서, 상기 금속배선층의 측벽에서 노출된 금속막을 비활성화시키면서, 동시에 상기 감광막 마스크와, 상기 금속배선층의 측벽 하단에 발생되는 폴리머가 제거되도록 하는 단계를 포함하여 이루어지는 것을 특징으로 하는 반도체 소자의 금속배선층 형성후 처리방법.
  2. 제1항에 있어서, 상기 혼합가스 산소(O2), 수수(DI), 메탄(CH4)의 혼합가스를 사용하는 것을 특징으로 하는 반도체 소자의 금속배선층 형성후 처리방법.
  3. 제2항에 있어서, 상기 산소(O2), 순수(DI), 메탄(CH4)의 혼합가스는 온도는 20℃에서 400°c의v 범위이고, 압력은 1토르[torr]에서 10토르[torr] 범위인 방응실에서 상기 금속 배선층과 반응시키는 것을 특징으로 하는 반도체 소자의 금속배선층 형성후 처리방법.
  4. 제2항 또는 제3항에 있어서, 상기 산소(O2), 순수(DI), 메탄(CH4)의 혼합가스는 산호(O2)의 유량이 50[som]에서 2000[sccm]의 범위로, 순수(H2O)의 유량은 50[sccm]에서 500[sccm]의 범위로, 메탈(CH4)의 유량은 5[sccm]에서 100[sccm]의 범위로 상기 반응실에 주입되어 형성되는 것을 특징으로 하는 반도체 소자의 금속배선층 형성후 처리방법.
KR1019950030186A 1995-09-15 1995-09-15 반도체 소자의 금속배선층 형성후 처리방법 KR0184066B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950030186A KR0184066B1 (ko) 1995-09-15 1995-09-15 반도체 소자의 금속배선층 형성후 처리방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950030186A KR0184066B1 (ko) 1995-09-15 1995-09-15 반도체 소자의 금속배선층 형성후 처리방법

Publications (2)

Publication Number Publication Date
KR970018400A true KR970018400A (ko) 1997-04-30
KR0184066B1 KR0184066B1 (ko) 1999-04-15

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KR1019950030186A KR0184066B1 (ko) 1995-09-15 1995-09-15 반도체 소자의 금속배선층 형성후 처리방법

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