KR960701472A - Jfet를 지니는 cmos 디바이스의 제조 방법(fabrication process fro cmos device with jfet) - Google Patents

Jfet를 지니는 cmos 디바이스의 제조 방법(fabrication process fro cmos device with jfet)

Info

Publication number
KR960701472A
KR960701472A KR1019950703597A KR19950703597A KR960701472A KR 960701472 A KR960701472 A KR 960701472A KR 1019950703597 A KR1019950703597 A KR 1019950703597A KR 19950703597 A KR19950703597 A KR 19950703597A KR 960701472 A KR960701472 A KR 960701472A
Authority
KR
South Korea
Prior art keywords
jfet
fabrication process
cmos device
process fro
fro
Prior art date
Application number
KR1019950703597A
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of KR960701472A publication Critical patent/KR960701472A/ko

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
KR1019950703597A 1993-02-25 1995-08-25 Jfet를 지니는 cmos 디바이스의 제조 방법(fabrication process fro cmos device with jfet) KR960701472A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US2379893A 1993-02-25 1993-02-25
PCT/US1994/001990 WO1994019828A1 (en) 1993-02-25 1994-02-18 Fabrication process for cmos device with jfet

Publications (1)

Publication Number Publication Date
KR960701472A true KR960701472A (ko) 1996-02-24

Family

ID=21817260

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950703597A KR960701472A (ko) 1993-02-25 1995-08-25 Jfet를 지니는 cmos 디바이스의 제조 방법(fabrication process fro cmos device with jfet)

Country Status (5)

Country Link
EP (1) EP0686305A1 (ko)
JP (1) JPH08507177A (ko)
KR (1) KR960701472A (ko)
TW (1) TW232086B (ko)
WO (1) WO1994019828A1 (ko)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69717992T2 (de) * 1997-10-02 2003-07-24 Istituto Trentino Di Cultura, Trento Verfahren zur Herstellung eines JFET Bauelements
FR2776832B1 (fr) * 1998-03-31 2000-06-16 Sgs Thomson Microelectronics Procede de fabrication de transistors jfet
JP2010177268A (ja) * 2009-01-27 2010-08-12 Asahi Kasei Electronics Co Ltd 接合型fet、半導体装置およびその製造方法
FI20160183L (fi) * 2016-07-14 2016-07-15 Artto Mikael Aurola Parannettu puolijohdekokoonpano

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53136977A (en) * 1977-05-04 1978-11-29 Seiko Instr & Electronics Ltd Driving circuit
DE2753704C2 (de) * 1977-12-02 1986-11-06 Bernd Prof. Dr. rer.nat 5841 Holzen Höfflinger Verfahren zum gleichzeitigen Herstellen von mittels Feldoxid isolierten CMOS-Schaltungsanordnungen und Bipolartransistoren
US4403395A (en) * 1979-02-15 1983-09-13 Texas Instruments Incorporated Monolithic integration of logic, control and high voltage interface circuitry
JPS5854711A (ja) * 1981-09-29 1983-03-31 Nec Corp 差動増幅器
JPS6024056A (ja) * 1984-06-25 1985-02-06 Hitachi Ltd 差動増幅器
JPS6185855A (ja) * 1984-10-04 1986-05-01 Nec Corp 半導体集積回路
US5296409A (en) * 1992-05-08 1994-03-22 National Semiconductor Corporation Method of making n-channel and p-channel junction field-effect transistors and CMOS transistors using a CMOS or bipolar/CMOS process

Also Published As

Publication number Publication date
EP0686305A1 (en) 1995-12-13
JPH08507177A (ja) 1996-07-30
TW232086B (ko) 1994-10-11
WO1994019828A1 (en) 1994-09-01

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Legal Events

Date Code Title Description
WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid