KR950022076A - Serial communication circuit - Google Patents

Serial communication circuit Download PDF

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Publication number
KR950022076A
KR950022076A KR1019930030069A KR930030069A KR950022076A KR 950022076 A KR950022076 A KR 950022076A KR 1019930030069 A KR1019930030069 A KR 1019930030069A KR 930030069 A KR930030069 A KR 930030069A KR 950022076 A KR950022076 A KR 950022076A
Authority
KR
South Korea
Prior art keywords
clock
data
output
latch
shift register
Prior art date
Application number
KR1019930030069A
Other languages
Korean (ko)
Other versions
KR960005978B1 (en
Inventor
박성휘
Original Assignee
문정환
금성일렉트론 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 문정환, 금성일렉트론 주식회사 filed Critical 문정환
Priority to KR1019930030069A priority Critical patent/KR960005978B1/en
Publication of KR950022076A publication Critical patent/KR950022076A/en
Application granted granted Critical
Publication of KR960005978B1 publication Critical patent/KR960005978B1/en

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L65/00—Network arrangements, protocols or services for supporting real-time applications in data packet communication

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Communication Control (AREA)

Abstract

본 발명은 직렬통신회로에 관한 것으로, 종래에서 쉬프트레지스터를 사용하여 순차적으로 데이타를 다음단의 쉬프트레지스터로 전송함에 있어 쉬프트레지스터의 회로가 복잡하고, 데이타가 쉬프트되어 있기 때문에 처음설정한 값과는 다른 데이타를 갖게되는 문제점이 있었다. 따라서 본 발명은 래치에 저장된 데이타가 직렬전송도중에도 변화없이 저장되어 있도록 함으로써 재전송이 필요할 경우 아주 유용하도록 하고, 회로가 간단하고 고속동작에 적당하도록 한 효과가 있다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a serial communication circuit. In the related art, a shift register circuit is complicated in transferring data sequentially to a shift register of a next stage using a shift register, and thus the data is shifted. There was a problem with different data. Therefore, the present invention allows the data stored in the latch to be stored unchanged even during serial transmission so that it is very useful when retransmission is required, and the circuit is simple and suitable for high speed operation.

Description

직렬통신회로Serial communication circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명의 직렬통신회로도.2 is a serial communication circuit diagram of the present invention.

Claims (1)

전송할 데이타를 쓰거나 데이타버스(DATA BUS)를 통해 전송받은 데이타를 읽을 수 있도록 한 전송할 데이타의 비스트수만큼 상기 데이타버스(DATA BUS)에 병렬연결된 래치와, 클럭발생기로 부터 출력되는 클럭의 갯수를 카운트하는 클럭카운터와, 상기 클럭카운터의 카운트값을 디코딩하여 상기 각 래치의 출력을 제어하는 디코더와, 상기 래치의 출력을 일시적으로 저장하고 있다가 클럭에 따라 순차적으로 출력하는 데이타출력 래치버퍼와, 상기 클럭발생기의 클럭출력을 상기 클럭카운터로 부터 발생하는 클럭출력제어신호에 따라 제어하는 클럭출력버퍼로 구성됨을 특징으로 하는 직렬통신회로.The number of latches connected in parallel to the data bus and the number of clocks output from the clock generator are counted by the number of bits of data to be transmitted so that the data to be transmitted or the data received through the data bus can be read. A clock counter, a decoder for decoding the count value of the clock counter to control the output of each latch, a data output latch buffer for temporarily storing the output of the latch and sequentially outputting the latch according to a clock; And a clock output buffer configured to control a clock output of a clock generator according to a clock output control signal generated from the clock counter. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019930030069A 1993-12-27 1993-12-27 Serial communication circuit KR960005978B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019930030069A KR960005978B1 (en) 1993-12-27 1993-12-27 Serial communication circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930030069A KR960005978B1 (en) 1993-12-27 1993-12-27 Serial communication circuit

Publications (2)

Publication Number Publication Date
KR950022076A true KR950022076A (en) 1995-07-26
KR960005978B1 KR960005978B1 (en) 1996-05-06

Family

ID=19373091

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019930030069A KR960005978B1 (en) 1993-12-27 1993-12-27 Serial communication circuit

Country Status (1)

Country Link
KR (1) KR960005978B1 (en)

Also Published As

Publication number Publication date
KR960005978B1 (en) 1996-05-06

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