SU930666A2 - Device for decoding cyclic linear codes - Google Patents

Description

(5) DEVICE FOR DECODING CYCLIC LINEAR CODES

one

The invention relates to telemechanics and communications and can be used when designing decoders for channels with error correction.

According to the main auth. No. i 33637, a device is known comprising a receiving register, the outputs of which bits are connected to the inputs of key elements, a modulo two adder, whose inputs are connected to the outputs of the corresponding group of key elements, and the output is connected to the input of a shift register, the outputs of which bits are connected to the corresponding inputs of the threshold element I, the element I whose first input is connected to the output of the threshold element, the second input to the clock bus, and the output to the output of the device l.

The disadvantage of the device is low speed.

The purpose of the invention is to increase speed.

The goal is achieved by the fact that the device for decoding cyclic linear codes containing a receiving register, the outputs of which through the corresponding key elements are centered with the modulo two, its output through

to connected in series shift register and the threshold element is connected to the first, the input element And, the output of which is connected to the output of the device, introduced additional register

IS shift, the threshold element and the elements are NOT and OR, and the output of the modulo-two adder is through a connected in series element NOT, an additional register and an additional

2q threshold element is connected to the first input of the OR element, the second loop of which is connected to the output of the threshold element, and the output is connected to the second input of the AND element and the auxiliary output of the device. The drawing shows the structures of the ma scheme of the device. The device contains the receiving register 1, the key elements 2-15, the module 16 modulo two, the element NOT 1 shift register 18, the additional shift register 19, the additional threshold element 20, the threshold element 21, the element OR 22, the element, AND 23, and output buses (outputs J 2k and 25 of the device. The device functions as follows. Consider the operation of the device by the example of decoding a linear code that allows full orthogonalization and allows correcting errors of three or less. Empty check symbols of the code b, 62 h, Q are given as follows linear combinations of information symbols a, aj, a, a4: jb, a + aj; b, a bj a, bg a 37 a + a4; a + 34; 9 5 Sf b, Q a + For each information sym the ox can make a system of separate checks and determine the order of their follow- ing aj - a

Key elements 2-15 are grouped together. One group includes key elements that commute those characters of a decoded word that do not add up between each other in any of the tested relationships.

In the initial state, it is decoded

ah, a, a4, b, b

word a ,,

f

bjo is written to register 1 (character

If the output of the adder 16 as a result of checks will be issued four zero, the device works as follows.

Each zero signal from the output of the adder 16 is fed to the input of the element NOT 17. Four additional units are written to the additional shift register 19 (not necessarily

Claims (1)

one after the other With the arrival of the fourth unit in the additional shift register 19, a single signal appears at the output of the additional threshold element 20, which is fed through the OR element 22 to the output of the device 25. The information symbol is decoded and its value O is output through the element a to the left), the key Items 2-15 are open. The key elements 2-15 are closed according to a program defined by a system of test ratios. In the first cycle, the key element 2 closes and connects the symbol, possibly distorted) to one of the inputs of the adder 16. In the second cycle, the key element 2 opens and closes the key elements 3 and 6, which connect the characters a and 2 to the inputs of the adder 6. In the third cycle, the key elements 3 and 6 are opened and the key elements 4 and 7 are opened, which connect the characters a-j and L and Etc to the inputs of the 16 adder. The value of the symbol a, taken from the output of the adder 1b in each clock, goes to the shift register 18. The inverted values with the NOT element 1 7 of the character a at the same time are written to the additional shift register 19. As soon as four units arrive at the shift register 18 from the output of the adder 16 (as a result of the corresponding checks), a single signal appears at the output of the threshold element 21, which enters through the OR element 22 at the device output 25, indicating that the information symbol is decoded. At the same time, a single signal from the output of the element OR 22 is fed to the input of the element AND 23 and allows the output of the decoded information symbol to be output to the output 2C of the device, equal to 1. And 23 to the output 2 of the device. Similarly, other information symbols are decoded. In order to decode the code considered in the example in a known device, 28 clocks will always be needed. In the proposed device, provided that the code combination arrived without errors, it would take 16 cycles, i.e. four checks at decoding each information symbol. If one of the characters is distorted, then decoding a, aj is done in 20 ticks. If two characters are distorted, for example, a and a, the word is decoded per clock. Thus, the proposed device has a higher speed than the known. . The invention The device for decoding cyclic linear codes auth.St. ff 33637 characterized in that, in order to increase speed, neg: 0 introduced an additional shift register and threshold element and element NEE and ISH1, modulo-two output of the modulo-2 connected in series through the connected shift register and additional threshold element to the first input of the OR element, the second input of which is connected to the output of the threshold element, and the output to the second input of the AND element and an additional output of the device. -. The source “) nyki information taken into account during the examination 1. USSR Copyright Certificate 33637. cl. H 03 K 13/32, 1972. ppaaaaaaaaa P1