KR950021789A - 모스펫(mosfet) 제조방법 - Google Patents

모스펫(mosfet) 제조방법 Download PDF

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Publication number
KR950021789A
KR950021789A KR1019930031831A KR930031831A KR950021789A KR 950021789 A KR950021789 A KR 950021789A KR 1019930031831 A KR1019930031831 A KR 1019930031831A KR 930031831 A KR930031831 A KR 930031831A KR 950021789 A KR950021789 A KR 950021789A
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South Korea
Prior art keywords
semiconductor substrate
forming
oxide film
silicide
gate electrode
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KR1019930031831A
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English (en)
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KR0146275B1 (ko
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박상훈
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김주용
현대전자산업 주식회사
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Priority to KR1019930031831A priority Critical patent/KR0146275B1/ko
Publication of KR950021789A publication Critical patent/KR950021789A/ko
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Publication of KR0146275B1 publication Critical patent/KR0146275B1/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/665Unipolar field-effect transistors with an insulated gate, i.e. MISFET using self aligned silicidation, i.e. salicide
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4916Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
    • H01L29/4925Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement
    • H01L29/4933Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement with a silicide layer contacting the silicon layer, e.g. Polycide gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66492Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a pocket or a lightly doped drain selectively formed at the side of the gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66575Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H01L29/6659Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

본 발명은 반도체소자의 모스펫(MOSFET)제조방법에 관한 것으로, 집적도가 높아짐에 따라 감소하는 채널 길이가 작아져 발생되는 문제를 해결하기 위하여 반도체기판에 돌출부를 제조한 다음, 돌출부가 감싸지도록 게이트산화막과 게이트전극을 형성하고, 게이트 전극 양측 가장자리저부의 반도체기판에 LDD영역 및 소오스/드레인 영역을 각각 형성하되 상기 게이트전극에만 실리사이드를 형성하는 기술이다.

Description

모스펫(MOSFET) 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 종래의 기술로 모스펫(MOSFET)을 제조한 단면도.
제2A도 내지 제2D도는 본 발명에 의해 채널길이가 증대된 모스펫을 제조하는 단계를 도시한 단면도.

Claims (4)

  1. 반도체기판 상부에 산화막을 형성하고, 그 상부에 감광막 패턴을 형성하고, 노출된 산화막과 그 하부의 반도체기판의 일정두께를 식각하여 돌출된 형태의 반도체기판을 형성하는 단계와, 상기 감광막 패턴과 산화막을 제거하고, 전체적으로 게이트 산화막과 폴리실리콘층을 적층하는 단계와, 게이트 전극 마스크를 이용한 식각공정으로 게이트전극용 폴리실리콘층 패턴을 형성하고 저농도불순물을 반도체기판으로 이온주입하여 LDD영역을 형성하는 단계와, 전체구조 상부에 전이금속을 증착하고 고온열처리 함으로써 상기 게이트전극용 폴리실리콘층의 표면에 실리사이드를 형성하고 남아있는 전이금속을 제거하는 단계와, 전체적으로 저온 산화막을 형성하고 비등방성 블랭킷 식각하여 상기 실리사이드의 측벽에 산화막 스페이서를 형성하는 단계와, 고농도 불순물을 반도체 기판으로 이온주입시켜 소오스/드레인 영역을 형성하는 단계를 포함하는 모스펫 제조방법.
  2. 제1항에 있어서, 상기 저농도 불순물을 이온주입할때 반도체기판에 대해 경사지게 주입하는 것을 특징으로 하는 모스펫 제조방법.
  3. 제1항에 있어서, 상기 게이트산화막을 형성하기 전에 반도체기판으로 문턱전합 조절용 불순물을 이온주입하는 것을 특징으로 하는 모스펫 제조방법.
  4. 제1항에 있어서, 상기 저온 산화막을 형성하고 비등방성 블랭킷 식각하여 상기 실리사이드 측벽에 산화막 스페이서를 형성할 때 실리사이드와 소오스/드레인 영역 상부에 잔류 산화막이 50~250Å정도로 남도록 식각하는 것을 특징으로 하는 모스펫 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019930031831A 1993-12-31 1993-12-31 모스펫 제조방법 KR0146275B1 (ko)

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Application Number Priority Date Filing Date Title
KR1019930031831A KR0146275B1 (ko) 1993-12-31 1993-12-31 모스펫 제조방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930031831A KR0146275B1 (ko) 1993-12-31 1993-12-31 모스펫 제조방법

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KR950021789A true KR950021789A (ko) 1995-07-26
KR0146275B1 KR0146275B1 (ko) 1998-11-02

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100779015B1 (ko) * 2005-12-29 2007-11-22 동부일렉트로닉스 주식회사 반도체 소자의 제조 방법

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100779015B1 (ko) * 2005-12-29 2007-11-22 동부일렉트로닉스 주식회사 반도체 소자의 제조 방법

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