KR950001899A - Contact formation method during PLUG process - Google Patents

Contact formation method during PLUG process Download PDF

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Publication number
KR950001899A
KR950001899A KR1019930011179A KR930011179A KR950001899A KR 950001899 A KR950001899 A KR 950001899A KR 1019930011179 A KR1019930011179 A KR 1019930011179A KR 930011179 A KR930011179 A KR 930011179A KR 950001899 A KR950001899 A KR 950001899A
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KR
South Korea
Prior art keywords
forming
metal
contact
contact hole
floc
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Application number
KR1019930011179A
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Korean (ko)
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KR960016224B1 (en
Inventor
김준기
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문정환
금성일렉트론 주식회사
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Priority to KR93011179A priority Critical patent/KR960016224B1/en
Publication of KR950001899A publication Critical patent/KR950001899A/en
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Publication of KR960016224B1 publication Critical patent/KR960016224B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

본 발명은 플럭공정시 콘택형성 방법에 관한 것으로, 반도체 공정에서 플럭을 형성하고자 할때 한 기판상에 콘택홀의 크기가 다른 복수개의 콘택홀이 존재하면, 콘택홀을 채우기 위한 금속증착 공정후 에치-백 공정시, 넓은 폭을 갖는 콘택홀의 경우에는 금속이 충분히 채워지지 않아, 반도체 기판이 손상되는 경우가 발생하였다.The present invention relates to a method of forming a contact during a floc process. When a plurality of contact holes having different sizes of contact holes exist on a substrate when forming a floc in a semiconductor process, an etch after a metal deposition process for filling a contact hole is performed. In the back process, in the case of a contact hole having a wide width, the metal is not sufficiently filled, resulting in damage to the semiconductor substrate.

따라서, 이를 방지하기 위해, 본 기술에서는 콘택홀의 폭 d를 후속증착되는 금속의 두께 H와 d≤2H의 관계가 되도록 설정하여 에치-백 공정시 발생하는 반도체층의 손상을 방지하도록 하였다.Therefore, in order to prevent this, in the present technology, the width d of the contact hole is set to have a relationship between the thickness H of the metal deposited subsequently and d ≦ 2H to prevent damage to the semiconductor layer generated during the etch-back process.

Description

플럭(PLUG)공정시 콘택형성 방법Contact formation method during PLUG process

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도 (A)-(D)는 본 발명의 플럭공정에 의한 콘택형성 방법을 나타낸 공정단면도, 제4도는 (A)-(C)는 제2도에 의한 콘택형성예를 나타낸 평면도.(A)-(D) is the process cross-sectional view which shows the contact formation method by the floc process of this invention, and FIG. 4 is (A)-(C) the top view which shows the example of contact formation by FIG.

Claims (4)

반도체 기판(11)상에 절연물(12)을 증착하고, 상기 절연물(12)을 선택적으로 패터닝하여 일정폭(d)을 갖는 복수개의 콘택홀(13)을 형성하는 공정과, 노출된 전표면에 후속증착되는 물질과 접착성이 좋은 물질로써 글루 레이어(14)를 형성하는 공정과, 노출된 전표면에 플럭 형성용 금속(15)을 H두께로 형성한 후 에치-백하여 콘택홀(13)내에 금속플럭(15a)를 형성함을 특징으로 하는 플럭공정시 콘택형성 방법.Depositing an insulator 12 on the semiconductor substrate 11 and selectively patterning the insulator 12 to form a plurality of contact holes 13 having a predetermined width d; A process of forming the glue layer 14 as a material having good adhesion to the subsequently deposited material, and forming a floc forming metal 15 on the exposed entire surface to an H thickness and then etching back the contact hole 13 Forming a metal plug (15a) in the contact forming method during the flocculation process characterized in that. 제1항에 있어서, 콘택홀 (13)의 폭 d와 금속(15)의 두께 H는 d≤2H로 함을 특징으로 하는 플럭공정시 콘택형성 방법.2. The method of claim 1, wherein the width d of the contact hole (13) and the thickness (H) of the metal (15) are d ≦ 2H. 제1항에 있어서, 금속(15)은 텅스텐을 이용함을 특징으로 하는 플럭공정시 콘택형성 방법.The method of claim 1, wherein the metal (15) uses tungsten. 제1항에 있어서, 글루 레이어(14)는 Ti 또는 TiN을 사용함을 특징으로 하는 플럭공정시 콘택형성 방법.The method of claim 1, wherein the glue layer (14) uses Ti or TiN. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR93011179A 1993-06-18 1993-06-18 Contact forming method KR960016224B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR93011179A KR960016224B1 (en) 1993-06-18 1993-06-18 Contact forming method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR93011179A KR960016224B1 (en) 1993-06-18 1993-06-18 Contact forming method

Publications (2)

Publication Number Publication Date
KR950001899A true KR950001899A (en) 1995-01-04
KR960016224B1 KR960016224B1 (en) 1996-12-07

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR93011179A KR960016224B1 (en) 1993-06-18 1993-06-18 Contact forming method

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KR (1) KR960016224B1 (en)

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Publication number Publication date
KR960016224B1 (en) 1996-12-07

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