KR960035806A - Tungsten Plug Formation Method - Google Patents

Tungsten Plug Formation Method Download PDF

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Publication number
KR960035806A
KR960035806A KR1019950004456A KR19950004456A KR960035806A KR 960035806 A KR960035806 A KR 960035806A KR 1019950004456 A KR1019950004456 A KR 1019950004456A KR 19950004456 A KR19950004456 A KR 19950004456A KR 960035806 A KR960035806 A KR 960035806A
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South Korea
Prior art keywords
tungsten
residual
oxide film
forming
during
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Application number
KR1019950004456A
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Korean (ko)
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KR100222125B1 (en
Inventor
조경수
Original Assignee
김주용
현대전자산업 주식회사
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Priority to KR1019950004456A priority Critical patent/KR100222125B1/en
Publication of KR960035806A publication Critical patent/KR960035806A/en
Application granted granted Critical
Publication of KR100222125B1 publication Critical patent/KR100222125B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76883—Post-treatment or after-treatment of the conductive material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/7684—Smoothing; Planarisation

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

본 발명은 반도체 소자의 금속 배선 형성공정중 텅스텐 플러그 형성방법에 관한 것으로, 보다 구체적으로 텅스텐 플러그를 형성하기 위한 에치백(etch back) 공정시 잔류 텅스텐을 제거하여 소자의 신뢰성을 확보하는 텅스텐 플러그 형성 방법에 관한 것으로 종래의 큰 단차비를 갖는 소자에 텅스텐 플러그 형성 공정 중 텅스텐 에치백시 콘택홀의 깊이 만큼 까지만 에치 백할 경우, 단차부에 잔류 텅스텐이 존재하게 되고, 잔류 텅스텐막을 제거하기 위한 과도 식각시 텅스텐이 손실되는 결과를 초래하여 본 발명은 글러벌 단차를 갖는 디바이스에서 텅스텐 플러그를 형성하기 위한 에칭 시 발생하는 잔류 텅스텐 막을 제거하기 위하여 텅스텐을 증착하기 전에 습식 식각률이 높고 기존에 금속층 상부에 절연용으로 쓰이는 산화막과 증착 방법 내지는 물질 특성을 달리하여 종래의 산화막 상부에 증착시키는 의도적인 잔류 산화막을 형성하여, 상기 잔류 산화막 에칭 시 자연적으로 잔류 텅스텐을 제거함으로써, 후속에 진행되는 금속 배선시 소자의 신뢰성을 향상시킬 수 있다.The present invention relates to a tungsten plug forming method of a metal wiring forming process of a semiconductor device, and more particularly to forming a tungsten plug to remove the residual tungsten during the etch back process to form a tungsten plug to ensure the reliability of the device In the case of tungsten etch-back during the tungsten plug forming process in a conventional device having a large step ratio, residual tungsten is present in the stepped portion, and during excessive etching to remove the residual tungsten film. The present invention results in the loss of tungsten, and the present invention provides a high wet etch rate prior to depositing tungsten to remove residual tungsten film during etching to form a tungsten plug in a device having a global step, and is used for insulation on a metal layer. Oxides and deposition methods or materials used By forming an intentional residual oxide film which is deposited on top of a conventional oxide film with different characteristics, and naturally removing residual tungsten during the etching of the residual oxide film, it is possible to improve the reliability of the device during subsequent metal wiring.

Description

텅스텐 플러그 형성방법Tungsten Plug Formation Method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2 (가) 내지 (바)는 본 발명의 일 실시예에 따른 텅스텐 플러그의 제조 공정을 보인 단면도.Second (a) to (bar) is a cross-sectional view showing a manufacturing process of the tungsten plug according to an embodiment of the present invention.

Claims (3)

반도체 기판 상부에 하지층, 폴리실리콘 패턴, 산화막을 차례로 형성하는 단계 : 상기 산화막 상부에 증착 방법 및 물질 특성이 다른 습식 식각률이 높은 산화막을 개재하는 단계 : 상기 습식 식각률이 높은 산화막을 에치 백하여 단차 부분에 잔류 산화막을 잔존시키는 단계 : 상기 폴리실리콘 패턴간에 포토리소그라피에 의해 콘택홀을 형성하는 단계 : 상기 산화막과 잔류 산화막 및 콘택홀 내부에 텅스텐을 증착하는 단계 : 상기 텅스텐을 에치 백하는 단계 및 시편을 습식 식각 용액에 담그어 잔류 텅스텐과 상기 잔류 산화막을 동시에 제거하는 단계로 이루어지는 것을 특징로 하는 텅스텐 플러그 형성방법.Forming a base layer, a polysilicon pattern, and an oxide layer on the semiconductor substrate in sequence: interposing an oxide layer having a high wet etching rate having different deposition methods and material properties on the oxide layer by etching back the oxide layer having a high wet etching rate; Residual oxide film remaining in the portion: Forming a contact hole by photolithography between the polysilicon pattern: Depositing tungsten inside the oxide film and the remaining oxide film and contact hole: Etching back the tungsten and specimen Immersing in a wet etching solution to remove residual tungsten and the residual oxide film at the same time. 제1항에 있어서, 상기 잔류 산화막을 형성하기 위한 산화막은 상기 폴리실리콘 패턴 상부의 산화막보다 습식 식각률이 2배 이상인 것을 특징으로 하는 텅스텐 플러그 형성방법.The method of claim 1, wherein a wet etching rate of the oxide film for forming the residual oxide film is twice or more than that of the oxide film on the polysilicon pattern. 제1항 또는 제2항에 있어서, 상기 잔류 산화막을 형성하기 위한 산화막은 1000내지 3000Å 두께로 증착하는 것을 특징으로 하는 텅스텐 플러그 형성방법.The tungsten plug forming method according to claim 1 or 2, wherein the oxide film for forming the residual oxide film is deposited to a thickness of 1000 to 3000 GPa. 참고사항 : 최초출원 내용에 의하여 공개하는 것임.Note: The disclosure is based on the original application.
KR1019950004456A 1995-03-04 1995-03-04 Method for forming tungsten plug KR100222125B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950004456A KR100222125B1 (en) 1995-03-04 1995-03-04 Method for forming tungsten plug

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950004456A KR100222125B1 (en) 1995-03-04 1995-03-04 Method for forming tungsten plug

Publications (2)

Publication Number Publication Date
KR960035806A true KR960035806A (en) 1996-10-28
KR100222125B1 KR100222125B1 (en) 1999-10-01

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950004456A KR100222125B1 (en) 1995-03-04 1995-03-04 Method for forming tungsten plug

Country Status (1)

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Also Published As

Publication number Publication date
KR100222125B1 (en) 1999-10-01

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