KR930024095A - Manufacturing method of contact hole with improved profile - Google Patents

Manufacturing method of contact hole with improved profile Download PDF

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Publication number
KR930024095A
KR930024095A KR1019920008102A KR920008102A KR930024095A KR 930024095 A KR930024095 A KR 930024095A KR 1019920008102 A KR1019920008102 A KR 1019920008102A KR 920008102 A KR920008102 A KR 920008102A KR 930024095 A KR930024095 A KR 930024095A
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KR
South Korea
Prior art keywords
bpsg
layer
lower layer
conductive material
conductive
Prior art date
Application number
KR1019920008102A
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Korean (ko)
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KR100269595B1 (en
Inventor
김준기
Original Assignee
문정환
금성일렉트론 주식회사
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Application filed by 문정환, 금성일렉트론 주식회사 filed Critical 문정환
Priority to KR1019920008102A priority Critical patent/KR100269595B1/en
Publication of KR930024095A publication Critical patent/KR930024095A/en
Application granted granted Critical
Publication of KR100269595B1 publication Critical patent/KR100269595B1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268

Abstract

본발명은 (1) 하층의 전도성 물질과 도전층을 분리하기 위해 격리층으로서 BPSG 를 다수층으로 데포지션하는 단계, (2) 하층의 전도성 물질과 Metal이 연결될 곳에 접촉창을 형성하기 위해 포토레지스트(PR)를 이용하여 마스크를 형성하는 단계.(3)PR 마스크를 이용하여 BPSG를 이방성 건식식각으로 약간의 하부 BPSG만 남기고 식각하는 단계, (4)PR를 제거하고, 접촉창 아래에 남아 있는 BPSG를 충분히 제거할 만큼 종방향 및 횡방향으로 건식식각하는 단계를 포함하여 이루어진다. 더 구체적으로는, 하층의 전도성 물질과 도전층을 분리하기 위한 BPSG층을 BPSG의 보론 및 인의 농도를 조절하여 위에 있는 BPSG층의 식각비율이 아래에 있는 층에 비해 빠르게 한 것이다.The present invention is directed to (1) depositing BPSG in multiple layers as an isolation layer to separate the conductive material and conductive layer of the lower layer, and (2) photoresist to form a contact window where the conductive material and metal of the lower layer are to be connected. (PR) forming a mask; (3) etching the BPSG using an PR mask with anisotropic dry etching, leaving only a small amount of the lower BPSG, (4) removing the PR and remaining under the contact window. And dry etching in the longitudinal and transverse directions to sufficiently remove the BPSG. More specifically, the BPSG layer for separating the conductive material and the conductive layer in the lower layer is adjusted to the concentration of boron and phosphorus in the BPSG to make the etch rate of the upper BPSG layer faster than the lower layer.

Description

프로파일을 개선한 콘택홀의 제조방법Manufacturing method of contact hole with improved profile

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명의 설명하기위한 단면도.2 is a cross-sectional view for explaining the present invention.

Claims (2)

반도체소자의 콘택홀 제조방법에 있어서, (1) 하층의 전도성 물질과 도전층을 분리하기 위해 격리층으로서 BPSG를 다수층으로 데포지션하는 단계, (2) 하층의 전도성 물질과 Metal이 연결될 곳에 접촉창을 형성하기 위해 포토레지스트(PR)를 이용하여 마스크를 형성하는 단계, (3) PR 마스크를 이용하여 BPSG를 이방성 건식식각으로 약간의 하부 BPSG만 남기고 식각하는 단계, (4) PR를 제거하고, 접촉창 아래에 남아 있는 BPSG를 충분히 제거할 만큼 종방향 및 횡방향으로 건식식각하는 단계를 포함하여 이루어지는 프로파일을 개선한 콘택홀의 제조방법.A method for manufacturing a contact hole in a semiconductor device, comprising: (1) depositing BPSG in multiple layers as an isolation layer to separate a conductive material and a conductive layer of a lower layer, and (2) contacting a place where a conductive material and a metal of a lower layer are to be connected. Forming a mask using photoresist (PR) to form a window, (3) etching the BPSG with anisotropic dry etching using a PR mask, leaving only a small amount of the lower BPSG, (4) removing the PR And dry etching in the longitudinal and transverse directions to sufficiently remove the BPSG remaining under the contact window. 제1항에 있어서, 제(1)단계에서 하층의 전도성 물질과 도전층을 분리하기 위한 BPSG층을 BPSG의 보론 및 인의 농도를 조절하여 위에 있는 BPSG층의 식각비율이 아래에 있는 층에 비해 빠르게 한 것이 특징인 프로파일을 개선한 콘택홀의 제조방법.The method of claim 1, wherein in step (1) the BPSG layer for separating the conductive material and the conductive layer of the lower layer by adjusting the concentration of boron and phosphorus of the BPSG faster than the etch rate of the upper BPSG layer than the lower layer The manufacturing method of the contact hole which improved the profile characterized by one. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019920008102A 1992-05-14 1992-05-14 Method of forming contact hole with improved profile KR100269595B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019920008102A KR100269595B1 (en) 1992-05-14 1992-05-14 Method of forming contact hole with improved profile

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920008102A KR100269595B1 (en) 1992-05-14 1992-05-14 Method of forming contact hole with improved profile

Publications (2)

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KR930024095A true KR930024095A (en) 1993-12-21
KR100269595B1 KR100269595B1 (en) 2000-10-16

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KR1019920008102A KR100269595B1 (en) 1992-05-14 1992-05-14 Method of forming contact hole with improved profile

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100473157B1 (en) * 1997-12-31 2005-05-19 주식회사 하이닉스반도체 Contact hole formation method of semiconductor device
KR100477135B1 (en) * 1997-08-08 2005-06-29 삼성전자주식회사 Manufacturing method of semiconductor device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100671607B1 (en) * 2002-07-09 2007-01-18 주식회사 하이닉스반도체 Method for manufacturing flash memory

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58107461A (en) * 1981-12-21 1983-06-27 Chuetsu Gokin Chuko Kk Mold material for precipitation hardening type continuous casting
JPS6396922A (en) * 1986-10-13 1988-04-27 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
JPH01274419A (en) * 1988-04-27 1989-11-02 Matsushita Electron Corp Semiconductor device
JPH0277130A (en) * 1988-06-06 1990-03-16 Canon Inc Manufacture of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100477135B1 (en) * 1997-08-08 2005-06-29 삼성전자주식회사 Manufacturing method of semiconductor device
KR100473157B1 (en) * 1997-12-31 2005-05-19 주식회사 하이닉스반도체 Contact hole formation method of semiconductor device

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Publication number Publication date
KR100269595B1 (en) 2000-10-16

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