KR920013591A - 디램 셀 내 모스패트 제조방법 - Google Patents

디램 셀 내 모스패트 제조방법

Info

Publication number
KR920013591A
KR920013591A KR1019900020952A KR900020952A KR920013591A KR 920013591 A KR920013591 A KR 920013591A KR 1019900020952 A KR1019900020952 A KR 1019900020952A KR 900020952 A KR900020952 A KR 900020952A KR 920013591 A KR920013591 A KR 920013591A
Authority
KR
South Korea
Prior art keywords
dram cell
manufacturing mosfet
mosfet
manufacturing
dram
Prior art date
Application number
KR1019900020952A
Other languages
English (en)
Other versions
KR930008903B1 (ko
Inventor
하용안
Original Assignee
금성일렉트론 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 금성일렉트론 주식회사 filed Critical 금성일렉트론 주식회사
Priority to KR1019900020952A priority Critical patent/KR930008903B1/ko
Publication of KR920013591A publication Critical patent/KR920013591A/ko
Application granted granted Critical
Publication of KR930008903B1 publication Critical patent/KR930008903B1/ko

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66575Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H01L29/6659Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4916Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/09Manufacture or treatment with simultaneous manufacture of the peripheral circuit region and memory cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Semiconductor Memories (AREA)
KR1019900020952A 1990-12-18 1990-12-18 디램 셀 내 모스패트 제조방법 KR930008903B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019900020952A KR930008903B1 (ko) 1990-12-18 1990-12-18 디램 셀 내 모스패트 제조방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900020952A KR930008903B1 (ko) 1990-12-18 1990-12-18 디램 셀 내 모스패트 제조방법

Publications (2)

Publication Number Publication Date
KR920013591A true KR920013591A (ko) 1992-07-29
KR930008903B1 KR930008903B1 (ko) 1993-09-16

Family

ID=19307797

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900020952A KR930008903B1 (ko) 1990-12-18 1990-12-18 디램 셀 내 모스패트 제조방법

Country Status (1)

Country Link
KR (1) KR930008903B1 (ko)

Also Published As

Publication number Publication date
KR930008903B1 (ko) 1993-09-16

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Legal Events

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E902 Notification of reason for refusal
G160 Decision to publish patent application
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Payment date: 20020820

Year of fee payment: 10

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