KR920010799A - 와이어 본딩 방법 - Google Patents

와이어 본딩 방법 Download PDF

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Publication number
KR920010799A
KR920010799A KR1019900019248A KR900019248A KR920010799A KR 920010799 A KR920010799 A KR 920010799A KR 1019900019248 A KR1019900019248 A KR 1019900019248A KR 900019248 A KR900019248 A KR 900019248A KR 920010799 A KR920010799 A KR 920010799A
Authority
KR
South Korea
Prior art keywords
bonding
wire
lead
chip
wire bonding
Prior art date
Application number
KR1019900019248A
Other languages
English (en)
Other versions
KR940000745B1 (ko
Inventor
정관호
김강산
Original Assignee
정몽헌
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 정몽헌, 현대전자산업 주식회사 filed Critical 정몽헌
Priority to KR1019900019248A priority Critical patent/KR940000745B1/ko
Publication of KR920010799A publication Critical patent/KR920010799A/ko
Application granted granted Critical
Publication of KR940000745B1 publication Critical patent/KR940000745B1/ko

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/78—Apparatus for connecting with wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)

Abstract

내용 없음

Description

와이어 본딩 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명에 의한 와이어 본딩방법을 설명하기 위한 리드프레임의 일부 평면도.

Claims (1)

  1. 와이어 본더를 이용하여 다수의 리드와, 각 리드에 대응하는 칩의 표면을 골드와이어로 본딩하는 와이어 본딩방법에 있어서, 칩(100)과 대응 리드(27 또는 35)의 단부를 와이어 본딩하는 단계와, 상기 기본딩(27 또는 35) 단부에서 소정거리 이격된 리드(28 또는 36)의 칩(100)대응표면으로 와이어 본딩 이송중 본딩예정 리드(28 또는 36)표면 일정위치에 1차 볼본딩 및 2차 봉형태의 점본딩을 1회이상 실시한 뒤, 상기 침(100)의 본딩 예정리드(28 또는 36)대응표면과 본딩 예정리드(28 또는 36)단부를 와이어 본딩하는 단계 및 칩(100)표면과 이에 대응하는 또다른 리드(29)의 단부를 와이어 본딩하는 단계로 이루어지는 것을 특징으로 하는 와이어 본딩방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019900019248A 1990-11-27 1990-11-27 와이어 본딩방법 KR940000745B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019900019248A KR940000745B1 (ko) 1990-11-27 1990-11-27 와이어 본딩방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900019248A KR940000745B1 (ko) 1990-11-27 1990-11-27 와이어 본딩방법

Publications (2)

Publication Number Publication Date
KR920010799A true KR920010799A (ko) 1992-06-27
KR940000745B1 KR940000745B1 (ko) 1994-01-28

Family

ID=19306572

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900019248A KR940000745B1 (ko) 1990-11-27 1990-11-27 와이어 본딩방법

Country Status (1)

Country Link
KR (1) KR940000745B1 (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101446274B1 (ko) * 2008-10-30 2014-10-02 한미반도체 주식회사 반도체 패키지 제조장치용 가이드슈트

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101446274B1 (ko) * 2008-10-30 2014-10-02 한미반도체 주식회사 반도체 패키지 제조장치용 가이드슈트

Also Published As

Publication number Publication date
KR940000745B1 (ko) 1994-01-28

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