KR920008118B1 - Gate array device having macro cells for forming master and slave cells of master-slave f/f circuit - Google Patents

Gate array device having macro cells for forming master and slave cells of master-slave f/f circuit

Info

Publication number
KR920008118B1
KR920008118B1 KR8906409A KR890006409A KR920008118B1 KR 920008118 B1 KR920008118 B1 KR 920008118B1 KR 8906409 A KR8906409 A KR 8906409A KR 890006409 A KR890006409 A KR 890006409A KR 920008118 B1 KR920008118 B1 KR 920008118B1
Authority
KR
South Korea
Prior art keywords
slave
master
cells
circuit
gate array
Prior art date
Application number
KR8906409A
Other languages
English (en)
Other versions
KR900019121A (ko
Inventor
Masaya Tamamura
Shinji Emori
Yoshio Watanabe
Isao Shimotsuhama
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP63117636A external-priority patent/JP2578164B2/ja
Priority claimed from JP11763588A external-priority patent/JP2659552B2/ja
Priority claimed from JP63117637A external-priority patent/JPH01287947A/ja
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of KR900019121A publication Critical patent/KR900019121A/ko
Application granted granted Critical
Publication of KR920008118B1 publication Critical patent/KR920008118B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1733—Controllable logic circuits
    • H03K19/1735—Controllable logic circuits by wiring, e.g. uncommitted logic arrays
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/086—Emitter coupled logic
    • H03K19/0866—Stacked emitter coupled logic
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
    • H03K3/0372—Bistable circuits of the master-slave type
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/923—Active solid-state devices, e.g. transistors, solid-state diodes with means to optimize electrical conductor current carrying capacity, e.g. particular conductor aspect ratio

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
KR8906409A 1988-05-13 1989-05-13 Gate array device having macro cells for forming master and slave cells of master-slave f/f circuit KR920008118B1 (en)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
JP63-117636 1988-05-13
JP63-117635 1988-05-13
JP63-117637 1988-05-13
JP63117636A JP2578164B2 (ja) 1988-05-13 1988-05-13 ゲートアレイ装置
JP11763588A JP2659552B2 (ja) 1988-05-13 1988-05-13 ゲートアレイ回路装置
JP63117637A JPH01287947A (ja) 1988-05-13 1988-05-13 ゲートアレイｉｃ装置

Publications (2)

Publication Number Publication Date
KR900019121A KR900019121A (ko) 1990-12-24
KR920008118B1 true KR920008118B1 (en) 1992-09-22

Family

ID=27313421

Family Applications (1)

Application Number Title Priority Date Filing Date
KR8906409A KR920008118B1 (en) 1988-05-13 1989-05-13 Gate array device having macro cells for forming master and slave cells of master-slave f/f circuit

Country Status (3)

Country Link
US (1) US4933576A (ko)
EP (1) EP0342131A3 (ko)
KR (1) KR920008118B1 (ko)

Families Citing this family (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5367208A (en) 1986-09-19 1994-11-22 Actel Corporation Reconfigurable programmable interconnect architecture
JP2509696B2 (ja) * 1989-04-26 1996-06-26 株式会社東芝 ゲ―トアレ―半導体集積回路装置
FR2653952A1 (fr) * 1989-10-31 1991-05-03 Thomson Composants Microondes Circuit integre logique prediffuse comportant au moins un amplificateur.
US5003204A (en) * 1989-12-19 1991-03-26 Bull Hn Information Systems Inc. Edge triggered D-type flip-flop scan latch cell with recirculation capability
US5272101A (en) * 1990-04-12 1993-12-21 Actel Corporation Electrically programmable antifuse and fabrication processes
US5614756A (en) * 1990-04-12 1997-03-25 Actel Corporation Metal-to-metal antifuse with conductive
US5552627A (en) * 1990-04-12 1996-09-03 Actel Corporation Electrically programmable antifuse incorporating dielectric and amorphous silicon interlayers
US5543656A (en) * 1990-04-12 1996-08-06 Actel Corporation Metal to metal antifuse
US5541441A (en) * 1994-10-06 1996-07-30 Actel Corporation Metal to metal antifuse
US5381035A (en) * 1992-09-23 1995-01-10 Chen; Wenn-Jei Metal-to-metal antifuse including etch stop layer
US5132571A (en) * 1990-08-01 1992-07-21 Actel Corporation Programmable interconnect architecture having interconnects disposed above function modules
US6171512B1 (en) 1991-02-15 2001-01-09 Canon Kabushiki Kaisha Etching solution for etching porous silicon, etching method using the etching solution and method of preparing semiconductor member using the etching solution
US5313119A (en) * 1991-03-18 1994-05-17 Crosspoint Solutions, Inc. Field programmable gate array
EP0558176A1 (en) * 1992-02-26 1993-09-01 Actel Corporation Metal-to-metal antifuse with improved diffusion barrier layer
EP0592078A1 (en) * 1992-09-23 1994-04-13 Actel Corporation Antifuse element and fabrication method
JPH06125067A (ja) * 1992-10-12 1994-05-06 Mitsubishi Electric Corp 半導体集積回路及びその設計方法
US5308795A (en) * 1992-11-04 1994-05-03 Actel Corporation Above via metal-to-metal antifuse
US5373169A (en) * 1992-12-17 1994-12-13 Actel Corporation Low-temperature process metal-to-metal antifuse employing silicon link
US5581111A (en) * 1993-07-07 1996-12-03 Actel Corporation Dielectric-polysilicon-dielectric antifuse for field programmable logic applications
US5449947A (en) * 1993-07-07 1995-09-12 Actel Corporation Read-disturb tolerant metal-to-metal antifuse and fabrication method
US5498895A (en) * 1993-07-07 1996-03-12 Actel Corporation Process ESD protection devices for use with antifuses
US5369054A (en) * 1993-07-07 1994-11-29 Actel Corporation Circuits for ESD protection of metal-to-metal antifuses during processing
US5856234A (en) * 1993-09-14 1999-01-05 Actel Corporation Method of fabricating an antifuse
US5485031A (en) * 1993-11-22 1996-01-16 Actel Corporation Antifuse structure suitable for VLSI application
US5633189A (en) * 1994-08-01 1997-05-27 Actel Corporation Method of making metal to metal antifuse
US5465055A (en) * 1994-10-19 1995-11-07 Crosspoint Solutions, Inc. RAM-logic tile for field programmable gate arrays
US5629636A (en) * 1994-10-19 1997-05-13 Crosspoint Solutions, Inc. Ram-logic tile for field programmable gate arrays
US5592016A (en) * 1995-04-14 1997-01-07 Actel Corporation Antifuse with improved antifuse material
KR100252447B1 (ko) * 1995-06-02 2000-04-15 아르므 엠. 무센 융기된텅스텐플러그앤티퓨즈및제조공정
US5986322A (en) * 1995-06-06 1999-11-16 Mccollum; John L. Reduced leakage antifuse structure
US5741720A (en) * 1995-10-04 1998-04-21 Actel Corporation Method of programming an improved metal-to-metal via-type antifuse
JP3676656B2 (ja) * 2000-07-24 2005-07-27 Ｎｅｃエレクトロニクス株式会社 半導体集積回路及びその動作方法
JP5724408B2 (ja) * 2011-01-27 2015-05-27 富士通セミコンダクター株式会社 半導体装置

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4207556A (en) * 1976-12-14 1980-06-10 Nippon Telegraph And Telephone Public Corporation Programmable logic array arrangement
JPS60953B2 (ja) * 1977-12-30 1985-01-11 富士通株式会社 半導体集積回路装置
DE3276284D1 (en) * 1981-09-10 1987-06-11 Fujitsu Ltd Semiconductor integrated circuit comprising a semiconductor substrate and interconnecting layers
JPS5890758A (ja) * 1981-11-25 1983-05-30 Mitsubishi Electric Corp 相補形集積回路装置
GB2122417B (en) * 1982-06-01 1985-10-09 Standard Telephones Cables Ltd Integrated circuits
JPS5969948A (ja) * 1982-10-15 1984-04-20 Fujitsu Ltd マスタ−スライス型半導体集積回路
US4593205A (en) * 1983-07-01 1986-06-03 Motorola, Inc. Macrocell array having an on-chip clock generator
JPS6017932A (ja) * 1983-07-09 1985-01-29 Fujitsu Ltd ゲ−ト・アレイ
US4864381A (en) * 1986-06-23 1989-09-05 Harris Corporation Hierarchical variable die size gate array architecture
US4760289A (en) * 1986-08-04 1988-07-26 International Business Machines Corporation Two-level differential cascode current switch masterslice
JP2570796B2 (ja) * 1987-03-27 1997-01-16 住友化学工業株式会社 ４−ヒドロキシ−２−シクロペンテノン誘導体の製造法
JPH0815210B2 (ja) * 1987-06-04 1996-02-14 日本電気株式会社 マスタスライス方式集積回路

Also Published As

Publication number Publication date
KR900019121A (ko) 1990-12-24
EP0342131A2 (en) 1989-11-15
EP0342131A3 (en) 1991-08-07
US4933576A (en) 1990-06-12

Similar Documents

Publication Publication Date Title
KR920008118B1 (en) Gate array device having macro cells for forming master and slave cells of master-slave f/f circuit
GB2211991B (en) Electrical isolation of regions within semiconductor bodies
GB2050053B (en) Photovoltaic semiconductor devices and methods of making same
GB2208802B (en) Female external urinal device
FR2547498B1 (fr) Comprimes de naproxen et de naproxen sodique a liberation controlee
IL84443A (en) Vaginal tampon
PT73716B (en) Quilted diaper and sanitary napkin products
GB2071412B (en) Arrangement of zones in a semiconductor device
JPS54134935A (en) System for reducing number of pins in memory device
KR920004333B1 (en) Master-slave flip-flop circuit
EP0225075A3 (en) Master slave latch circuit
EP0282082A3 (en) Basic cell of gate array device
DE3062608D1 (en) Semiconductor memory device and method of making same
JPS5689491A (en) Master slave device
GB2206050B (en) Male incontinence device
EP0292011A3 (en) Input circuit of charge transfer device
PT85601A (pt) Dispositivo para aplicacao de cremes vaginais
JPS55148555A (en) Sanitary napkin
JPS55124300A (en) Method of and device for manufacturing electronic part series
DE2967661D1 (en) Recessed circuit module and method of making
JPS56155571A (en) Charge transfer device and method of manufacturing same
GB8805619D0 (en) Structures suitable for prison cells
KR880000511U (ko) 순차 이송 다이의 재료 이송 장치
NO833872L (no) Svangerskapshindrende vaginale tabletter
IE850338L (en) Waterproof encasement and panty for sanitary

Legal Events

Date Code Title Description
A201 Request for examination
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20030915

Year of fee payment: 12

LAPS Lapse due to unpaid annual fee