KR910001086A - 기판상에 다결정층을 제조하는 방법 - Google Patents
기판상에 다결정층을 제조하는 방법 Download PDFInfo
- Publication number
- KR910001086A KR910001086A KR1019900009694A KR900009694A KR910001086A KR 910001086 A KR910001086 A KR 910001086A KR 1019900009694 A KR1019900009694 A KR 1019900009694A KR 900009694 A KR900009694 A KR 900009694A KR 910001086 A KR910001086 A KR 910001086A
- Authority
- KR
- South Korea
- Prior art keywords
- temperature
- amorphous silicon
- silicon layer
- dopant
- layer
- Prior art date
Links
- 239000000758 substrate Substances 0.000 title claims description 8
- 238000004519 manufacturing process Methods 0.000 title claims 3
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 14
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 6
- 238000002513 implantation Methods 0.000 claims description 3
- 229920005591 polysilicon Polymers 0.000 claims description 3
- 238000000034 method Methods 0.000 claims 14
- 238000010438 heat treatment Methods 0.000 claims 10
- 239000002019 doping agent Substances 0.000 claims 8
- 238000000151 deposition Methods 0.000 claims 5
- 230000003213 activating effect Effects 0.000 claims 3
- 230000008021 deposition Effects 0.000 claims 3
- 238000005229 chemical vapour deposition Methods 0.000 claims 2
- 238000002425 crystallisation Methods 0.000 claims 2
- 230000008025 crystallization Effects 0.000 claims 2
- 230000001105 regulatory effect Effects 0.000 claims 2
- 238000005496 tempering Methods 0.000 claims 2
- 238000000137 annealing Methods 0.000 claims 1
- 238000011065 in-situ storage Methods 0.000 claims 1
- 238000004544 sputter deposition Methods 0.000 claims 1
Classifications
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/58—After-treatment
- C23C14/5806—Thermal treatment
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/24—Deposition of silicon only
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
- C23C14/14—Metallic material, boron or silicon
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/58—After-treatment
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/58—After-treatment
- C23C14/584—Non-reactive treatment
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/56—After-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/20—Resistors
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Power Engineering (AREA)
- General Chemical & Material Sciences (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Inorganic Chemistry (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Thermal Sciences (AREA)
- Recrystallisation Techniques (AREA)
- Physical Vapour Deposition (AREA)
- Chemical Vapour Deposition (AREA)
Abstract
내용 없음.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 비정질 실리콘층을 가진 기판을 도시한 단면도.
제2도는 다결정 실리콘층을 가진 기판을 도시한 단면도.
제3도는 여러가지로 처리된 다실리콘에 대한 임프랜테이션 선량에 따른 층저항부의 그래프.
Claims (16)
- 기판상에 다결정 실리콘층을 제조하는 방법에 있어서, 기판상에 비정질 실리콘층을 증착시키는 단계 ; 비정질 실리콘에 대한 결정화온도 보다 낮은 온도인 초기 온도로 비정질 실리콘층을 가진 상기 기판을 가열시키는 단계 ; 상기 초기온도에서 열평형을 이루는 단계 ; 및 상기 비정질 실리콘을 가진 상기 기판을 상기 초기온도로 부터 상기 비정질 실리콘이 본질적으로 완전히 결정화하여 다결정이 되도록 상기 비정질 실리콘의 결정화온도보다 더 높은 목적온도까지 조절가열하는 단계로 구성됨을 특징으로 하는 기판상에 다결정 실리콘층을 제조하기 위한 방법.
- 제1항에 있어서, 상기 기판을 상기 목적 온도에서 충분히 템퍼링시키는 단계를 더 포함함을 특징으로 하는 방법.
- 제2항에 있어서, 상기 목적 온도에서의 상기 충분한 템퍼링단계가 적어도 15분 동안 행해짐을 특징으로 하는 방법.
- 제1항에 있어서, 상기 비정질 실리콘층에 대한 상기 증착단계는 약 560℃ 내지 600℃의 온도범위 에서의 화학증착법(CVD)을 이용하고 상기 초기 온도는 약 500℃ 내지 550℃의 온도범위인 것을 특징으로 하는 방법.
- 제1항에 있어서, 상기 비정질 실리콘층에 대한 상기 증착단계가 스퍼터링에 의한 것임을 특징으로 하는 방법.
- 제1항에 있어서, 상기 목적온도가 약 700℃ 내지 8000℃의 온도범위인 것을 특징으로 하는 방법.
- 제1항에 있어서, 상기 초기온도에서 상기 목적온도까지의 상기 조절 가열단계는 분당 단지 10℃의 온도 변화로 행하여짐을 특징으로 하는 방법.
- 제1항에 있어서, 상기 초기온도에서 상기 목적온도까지의 상기 조절 가열단계는 초당 적어도 100℃의 온도 변화로 이용하는 빠른 어닐링에 의해 행해짐을 특징으로 하는 방법.
- 제1항에 있어서, 상기 증착단계 후 도핑제의 임프랜테이션에 의해 상기 비정질 실리콘층을 도핑시키는 단계를 더 포함함을 특징으로 하는 방법.
- 제1항에 있어서, 도핑제의 임프랜테이션에 의해 상기 다결정층을 도핑시키는 단계를 더 포함함을 특징으로 하는 방법.
- 제1항에 있어서, 상기 증착단계 중 원위치의 상기 비정질 실리콘층을 도핑시키는 단계를 더 포함함을 특징으로 하는 방법.
- 제9항에 있어서, 상기 비정질 실리콘층이 상기 조절 가열 단계로 상기 다결정층으로 변형한 후 상기 도핑제를 고온으로 가열함으로서 상기 도핑제를 활성화시키는 단계를 더 포함함을 특징으로 하는 방법.
- 제10항에 있어서, 상기 비정질 실리콘층이 상기 조절 가열 단계로 상기 다결정층으로 변형한 후 상기 도핑제를 고온으로 가열함으로써 상기 도핑제를 활성화시키는 단계를 더 포함함을 특징으로 하는 방법.
- 제11항에 있어서, 상기 비정질 실리콘층이 상기 조절 가열 단계로 상기 다결정층으로 변형한 후 상기 도핑제를 고온으로 가열함으로서 상기 도핑제를 활성화시키는 단계를 더 포함함을 특징으로 하는 방법.
- 제1항에 있어서, 상기 다실리콘층이 집적회로상의 다실리콘 저항층임을 특징으로 하는 방법.
- ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE3921627.6 | 1989-06-30 | ||
DE3921627.3 | 1989-06-30 | ||
DE3921627 | 1989-06-30 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR910001086A true KR910001086A (ko) | 1991-01-30 |
KR100217147B1 KR100217147B1 (ko) | 1999-09-01 |
Family
ID=6384072
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019900009694A KR100217147B1 (ko) | 1989-06-30 | 1990-06-29 | 기판 상에 다결정 층을 형성하는 방법 |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP0405451B1 (ko) |
JP (1) | JP3059195B2 (ko) |
KR (1) | KR100217147B1 (ko) |
DE (1) | DE59003200D1 (ko) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6294219B1 (en) * | 1998-03-03 | 2001-09-25 | Applied Komatsu Technology, Inc. | Method of annealing large area glass substrates |
US7914619B2 (en) * | 2008-11-03 | 2011-03-29 | International Business Machines Corporation | Thick epitaxial silicon by grain reorientation annealing and applications thereof |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4634605A (en) * | 1984-05-23 | 1987-01-06 | Wiesmann Harold J | Method for the indirect deposition of amorphous silicon and polycrystalline silicone and alloys thereof |
JPS61101410A (ja) * | 1984-10-24 | 1986-05-20 | Hiroshi Ishizuka | 多結晶珪素の製造法及びそのための装置 |
GB2191510A (en) * | 1986-04-16 | 1987-12-16 | Gen Electric Plc | Depositing doped polysilicon films |
-
1990
- 1990-06-26 EP EP90112137A patent/EP0405451B1/de not_active Expired - Lifetime
- 1990-06-26 DE DE90112137T patent/DE59003200D1/de not_active Expired - Lifetime
- 1990-06-27 JP JP2172522A patent/JP3059195B2/ja not_active Expired - Fee Related
- 1990-06-29 KR KR1019900009694A patent/KR100217147B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
EP0405451A1 (de) | 1991-01-02 |
JPH0347967A (ja) | 1991-02-28 |
KR100217147B1 (ko) | 1999-09-01 |
EP0405451B1 (de) | 1993-10-27 |
DE59003200D1 (de) | 1993-12-02 |
JP3059195B2 (ja) | 2000-07-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4379020A (en) | Polycrystalline semiconductor processing | |
CN100399125C (zh) | 具有薄膜晶体管的器件 | |
US4853076A (en) | Semiconductor thin films | |
KR930018657A (ko) | 반도체 소자의 제조방법 | |
KR930003243A (ko) | (111) 결정방향을 가지는 질화티타늄 방벽층을 형성시키는 방법 | |
JPH0325951B2 (ko) | ||
TWI266427B (en) | Field-effect transistor and method of manufacturing same | |
US5164338A (en) | Method of manufacturing a polycrystalline semiconductor resistance layer of silicon on a silicon body and silicon pressure sensor having such a resistance layer | |
KR910001086A (ko) | 기판상에 다결정층을 제조하는 방법 | |
KR960008499B1 (ko) | 레이저 처리방법 및 레이저 처리장치 | |
RU2113034C1 (ru) | Полупроводниковое устройство, обладающее двухслойной силицидной структурой и способы его изготовления /варианты/ | |
JP2746606B2 (ja) | 大粒子多結晶質膜の製造方法 | |
GB2167899A (en) | Method of manufacturing thin film transistors | |
US5821157A (en) | Argon amorphizing polysilicon layer fabrication | |
KR930010093B1 (ko) | 반도체박막의 형성방법 | |
KR20020027775A (ko) | 인이 도핑된 비정질 막의 금속 유도 결정화 방법 | |
US4984046A (en) | Silicon pressure sensor having a resistance layer of polycrystalline semicondutor | |
EP0073603A2 (en) | Polycrystalline thin-film transistor,integrated circuit including such transistors and a display device including such a circuit | |
US3007819A (en) | Method of treating semiconductor material | |
JPH03292719A (ja) | シリコン半導体層の形成方法 | |
KR960026967A (ko) | 다결정 박막 트랜지스터 및 그 제조방법 | |
KR19980021639A (ko) | 비정질 실리콘 박막의 결정화 방법 | |
JP3153921B2 (ja) | 半導体装置の製造方法 | |
KR980005608A (ko) | 저저항의 폴리실리콘층 제조방법 | |
GB2308233A (en) | Gate electrode formation |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
AMND | Amendment | ||
E601 | Decision to refuse application | ||
J201 | Request for trial against refusal decision | ||
B701 | Decision to grant | ||
GRNT | Written decision to grant | ||
O035 | Opposition [patent]: request for opposition | ||
O132 | Decision on opposition [patent] | ||
O074 | Maintenance of registration after opposition [patent]: final registration of opposition | ||
G170 | Publication of correction | ||
FPAY | Annual fee payment |
Payment date: 20120525 Year of fee payment: 14 |
|
FPAY | Annual fee payment |
Payment date: 20130523 Year of fee payment: 15 |
|
EXPY | Expiration of term |