KR900001774B1 - 바이어스 전압 발생기를 포함하는 반도체 메모리 회로 - Google Patents

바이어스 전압 발생기를 포함하는 반도체 메모리 회로 Download PDF

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Publication number
KR900001774B1
KR900001774B1 KR1019860006702A KR860006702A KR900001774B1 KR 900001774 B1 KR900001774 B1 KR 900001774B1 KR 1019860006702 A KR1019860006702 A KR 1019860006702A KR 860006702 A KR860006702 A KR 860006702A KR 900001774 B1 KR900001774 B1 KR 900001774B1
Authority
KR
South Korea
Prior art keywords
bias voltage
fet
fets
semiconductor memory
voltage generator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
KR1019860006702A
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English (en)
Korean (ko)
Other versions
KR870002596A (ko
Inventor
히데끼 아라가와
히로미 가와시마
Original Assignee
후지쓰가부시끼가이샤
야마모도 다꾸마
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 후지쓰가부시끼가이샤, 야마모도 다꾸마 filed Critical 후지쓰가부시끼가이샤
Publication of KR870002596A publication Critical patent/KR870002596A/ko
Application granted granted Critical
Publication of KR900001774B1 publication Critical patent/KR900001774B1/ko
Expired legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is DC
    • G05F3/10—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/24—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
KR1019860006702A 1985-08-16 1986-08-14 바이어스 전압 발생기를 포함하는 반도체 메모리 회로 Expired KR900001774B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP60179441A JPS6240697A (ja) 1985-08-16 1985-08-16 半導体記憶装置
JP179441 1985-08-16
JP60-179441 1985-08-16

Publications (2)

Publication Number Publication Date
KR870002596A KR870002596A (ko) 1987-03-31
KR900001774B1 true KR900001774B1 (ko) 1990-03-24

Family

ID=16065913

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019860006702A Expired KR900001774B1 (ko) 1985-08-16 1986-08-14 바이어스 전압 발생기를 포함하는 반도체 메모리 회로

Country Status (5)

Country Link
US (1) US4817055A (enExample)
EP (1) EP0213503B1 (enExample)
JP (1) JPS6240697A (enExample)
KR (1) KR900001774B1 (enExample)
DE (1) DE3680728D1 (enExample)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3743930A1 (de) * 1987-12-23 1989-07-06 Siemens Ag Integrierte schaltung mit "latch-up"-schutzschaltung in komplementaerer mos-schaltungstechnik
JPS6441519A (en) * 1987-08-07 1989-02-13 Mitsubishi Electric Corp Semiconductor integrated circuit
JPH0666443B2 (ja) * 1988-07-07 1994-08-24 株式会社東芝 半導体メモリセルおよび半導体メモリ
KR920000962B1 (ko) * 1989-05-26 1992-01-31 삼성전자 주식회사 반도체 메모리 장치의 데이터 출력단 전압레벨 조절회로
US4975879A (en) * 1989-07-17 1990-12-04 Advanced Micro Devices, Inc. Biasing scheme for FIFO memories
US5179297A (en) * 1990-10-22 1993-01-12 Gould Inc. CMOS self-adjusting bias generator for high voltage drivers
US5257226A (en) * 1991-12-17 1993-10-26 Sgs-Thomson Microelectronics, Inc. Integrated circuit with self-biased differential data lines
JPH05274876A (ja) * 1992-03-30 1993-10-22 Mitsubishi Electric Corp 半導体記憶装置
JPH06223568A (ja) * 1993-01-29 1994-08-12 Mitsubishi Electric Corp 中間電位発生装置
EP0639886B1 (en) * 1993-08-18 1997-03-12 STMicroelectronics S.r.l. A voltage step-up circuit with regulated output voltage
US5907255A (en) * 1997-03-25 1999-05-25 Cypress Semiconductor Dynamic voltage reference which compensates for process variations
US6072723A (en) * 1999-05-06 2000-06-06 Intel Corporation Method and apparatus for providing redundancy in non-volatile memory devices
US6512705B1 (en) * 2001-11-21 2003-01-28 Micron Technology, Inc. Method and apparatus for standby power reduction in semiconductor devices

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS525254A (en) * 1975-07-02 1977-01-14 Hitachi Ltd High voltage resistance mis switching circuit
US4068140A (en) * 1976-12-27 1978-01-10 Texas Instruments Incorporated MOS source follower circuit
US4195356A (en) * 1978-11-16 1980-03-25 Electronic Memories And Magnetics Corporation Sense line termination circuit for semiconductor memory systems
JPS5619676A (en) * 1979-07-26 1981-02-24 Fujitsu Ltd Semiconductor device
JPS56111180A (en) * 1980-02-06 1981-09-02 Toshiba Corp Semiconductor device
IE55327B1 (en) * 1981-12-29 1990-08-15 Fujitsu Ltd Nonvolatile semiconductor memory circuit
JPS58151124A (ja) * 1982-03-04 1983-09-08 Ricoh Co Ltd レベル変換回路
US4609833A (en) * 1983-08-12 1986-09-02 Thomson Components-Mostek Corporation Simple NMOS voltage reference circuit
US4791613A (en) * 1983-09-21 1988-12-13 Inmos Corporation Bit line and column circuitry used in a semiconductor memory

Also Published As

Publication number Publication date
JPS6240697A (ja) 1987-02-21
EP0213503A2 (en) 1987-03-11
EP0213503B1 (en) 1991-08-07
EP0213503A3 (en) 1989-01-18
KR870002596A (ko) 1987-03-31
US4817055A (en) 1989-03-28
DE3680728D1 (de) 1991-09-12
JPH0350359B2 (enExample) 1991-08-01

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