KR890005843A - 반도체 장치의 다결정 실리콘 형성방법 - Google Patents
반도체 장치의 다결정 실리콘 형성방법 Download PDFInfo
- Publication number
- KR890005843A KR890005843A KR870010934A KR870010934A KR890005843A KR 890005843 A KR890005843 A KR 890005843A KR 870010934 A KR870010934 A KR 870010934A KR 870010934 A KR870010934 A KR 870010934A KR 890005843 A KR890005843 A KR 890005843A
- Authority
- KR
- South Korea
- Prior art keywords
- temperature
- polycrystalline silicon
- reaction tube
- semiconductor device
- formation method
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims 6
- 229910021420 polycrystalline silicon Inorganic materials 0.000 title claims 5
- 239000004065 semiconductor Substances 0.000 title claims 5
- 230000015572 biosynthetic process Effects 0.000 title 1
- 238000006243 chemical reaction Methods 0.000 claims 7
- 239000000758 substrate Substances 0.000 claims 3
- 239000007789 gas Substances 0.000 claims 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 1
- 238000007599 discharging Methods 0.000 claims 1
- 239000012299 nitrogen atmosphere Substances 0.000 claims 1
- 230000003647 oxidation Effects 0.000 claims 1
- 238000007254 oxidation reaction Methods 0.000 claims 1
- 229910052710 silicon Inorganic materials 0.000 claims 1
- 239000010703 silicon Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Semiconductor Memories (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 스태틱램의 셀 구조도.
Claims (2)
- 반도체 기판상에 형성된 소정의 제1다결정 실리콘층과 접속하는 제2다결정 실리콘층을 형성하는 방법에 있어서, 열산화를 방지하는 제1온도에서 반도체기판을 반응관내에 삽입하고 반응관을 진공상태로 하는 제1공정과, 진공상태의 반응관내의 질소 분위기 개스를 주입함과 동시에 반응관내의 온도를 제1온도에서 다결정 실리콘이 형성될 제2온도로 상승하는 제2공정과, 제2온도에서 다결정 실리콘층을 형성하는 제3공정과, 반응관내의 개스를 배출함과 동시에 반응관내의 온도를 제2온도에서 제1온도로 내려주는 제4공정과, 제1온도상태에서 반도체 기판을 반응관에서 노출시키는 제5공정으로 이루어짐을 특징으로 하는 반도체장치의 다결정 실리콘 형성방법.
- 제1항에 있어서, 상기 제1공정의 제1온도가 450℃이고 상기 제2공정의 제2온도가 620℃임을 특징으로 하는 반도체장치의 다결정 실리콘 형성방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019870010934A KR900001064B1 (ko) | 1987-09-30 | 1987-09-30 | 반도체 장치의 다결정 실리콘 형성방법 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019870010934A KR900001064B1 (ko) | 1987-09-30 | 1987-09-30 | 반도체 장치의 다결정 실리콘 형성방법 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR890005843A true KR890005843A (ko) | 1989-05-17 |
| KR900001064B1 KR900001064B1 (ko) | 1990-02-26 |
Family
ID=19264900
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019870010934A KR900001064B1 (ko) | 1987-09-30 | 1987-09-30 | 반도체 장치의 다결정 실리콘 형성방법 |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR900001064B1 (ko) |
-
1987
- 1987-09-30 KR KR1019870010934A patent/KR900001064B1/ko not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR900001064B1 (ko) | 1990-02-26 |
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| Date | Code | Title | Description |
|---|---|---|---|
| A201 | Request for examination | ||
| N231 | Notification of change of applicant | ||
| G160 | Decision to publish patent application | ||
| E701 | Decision to grant or registration of patent right | ||
| GRNT | Written decision to grant | ||
| FPAY | Annual fee payment |
Payment date: 20050110 Year of fee payment: 16 |
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| LAPS | Lapse due to unpaid annual fee |