KR890003270A - 회로 형성법 - Google Patents
회로 형성법 Download PDFInfo
- Publication number
- KR890003270A KR890003270A KR1019880008500A KR880008500A KR890003270A KR 890003270 A KR890003270 A KR 890003270A KR 1019880008500 A KR1019880008500 A KR 1019880008500A KR 880008500 A KR880008500 A KR 880008500A KR 890003270 A KR890003270 A KR 890003270A
- Authority
- KR
- South Korea
- Prior art keywords
- metal layer
- forming method
- circuit forming
- plating
- circuit
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/382—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
- H05K3/384—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal by plating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/427—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0302—Properties and characteristics in general
- H05K2201/0317—Thin film conductor layer; Thin film passive component
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0341—Intermediate metal, e.g. before reinforcing of conductors by plating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0347—Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0315—Oxidising metal
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
- H05K2203/072—Electroless plating, e.g. finish plating or initial plating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
- H05K2203/0723—Electroplating, e.g. finish plating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
- H05K2203/1157—Using means for chemical reduction
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/382—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
- H05K3/385—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal by conversion of the surface of the metal, e.g. by oxidation, whether or not followed by reaction or removal of the converted layer
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1A도 내지 제1F도는 본 발명의 1실시예에 있어서의 회로 형성법의 각 공정을 설명하는 단면도.
Claims (18)
- 표면에 제1금속층을 갖는 절연판의 회로 형성 소망부분이외를 도금 레지스트로 마스크하고 회로 형성 소망부분에만 패턴 도금을 하여 회로를 형성하는 방법에 있어서, 이 제1금속층상에 이 패턴 도금의 금속보다도 이온화 경향이 큰 금속 또는 귀금속을 제2금속층으로서 형성한후, 상기 도금 레지스트로 마스크하고 상기 패턴 도금을 하는 것을 특징으로 하는 회로 형성방법.
- 제1항에 있어서, 이 제1금속층 및 이 패턴 도금의 금속이 동인 회로 형성 방법.
- 제1항에 있어서, 상기 제2금속층이 귀금속 원소로부터 선택한 적어도 1원소로 이루어진 회로 형성방법.
- 제1항에 있어서, 상기 제2금속층이 알루미늄, 아연, 주석, 크롬, 철, 니켈 및 코발트로 이루어진 군에서 선택된 적어도 1원소를 함유하는 금속으로 이루어진 회로 형성방법.
- 제1항에 있어서, 상기 제2금속층의 두게가 1㎛이하인 것을 특징으로 하는 회로 형성방법.
- 제1항에 있어서, 상기 제2그목층이 도금에 의해 형성된 것을 특징으로 하는 회로 형성방법.
- 제1항에 있어서, 이 패턴 도금이 화학 도금인 회로 형성방법.
- 제1항에 있어서, 상기 제2금속층 혹은 이 제2금속층의 하지로 되는 상기 제1금속층의 표면을 조화(粗化)하는 것을 특징으로 하는 회로 형성방법.
- 제2항에 있어서, 상기 제1금속층인 동층 표면을 산화하고 다시 환원시킴으로써 조화하는 것을 특징으로 하는 회로 형성방법.
- 제9항에 있어서, 산화처리액이 아염소산염을 함유하는 용액이며 또한 환원 처리가 전기적 또는 아민보란 용액등의 처리액으로 화학적으로 행하여 지는 것을 특징으로 하는 회로 형성방법.
- 제1항에 있어서, 도금 레지스트가 감광성 도금 레지스트인 것을 특징으로 하는 회로 형성방법.
- 제2항에 있어서, 제2금속층의 하지로 되는 동층의 위에 다시 동박층을 형성하여 제1금속층으로 하는 것을 특징으로 하는 회로 형성방법.
- 제12항에 있어서, 전기 또는 화학 도금에 의해 이동박층을 형성하는 것을 특징으로 하는 회로 형성방법.
- 제1항에 있어서, 패턴, 도금을 함에 앞서서 패턴 도금될 노출부분인 제2금속층을 제거하는 것을 특징으로 하는 회로 형성방법.
- 제1항에 있어서, 제2금속층을 형성하는 공정보다 앞의 공정에서 패턴 도금을 위하여 표면의 활성화를 하는 것을 특징으로 하는 회로 형성방법.
- 제1항에 있어서, 상기 제2금속층이 금 또는 백금인 회로 형성방법.
- 제1항에 있어서, 상기 제1금속층은 도금 레지스트 형성전에 회로 패턴의 형상을 가지며, 패턴 도금에 의해 더욱 필요로 하는 회로부분을 형성하는 회로 형성방법.
- 제1항에 있어서, 상기 패턴 도금 완료후 도금 레지스트와 불필요한 금속층을 제거하는 공정을 갖는 회로 형성방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62168638A JP2550081B2 (ja) | 1987-07-08 | 1987-07-08 | 回路形成法 |
JP62-168638 | 1987-07-08 | ||
JP87-168638 | 1987-07-08 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR890003270A true KR890003270A (ko) | 1989-04-13 |
KR910000079B1 KR910000079B1 (ko) | 1991-01-19 |
Family
ID=15871750
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019880008500A KR910000079B1 (ko) | 1987-07-08 | 1988-07-08 | 회로 형성법 |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP0298422B1 (ko) |
JP (1) | JP2550081B2 (ko) |
KR (1) | KR910000079B1 (ko) |
DE (1) | DE3850176T2 (ko) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2664246B2 (ja) * | 1989-05-29 | 1997-10-15 | 株式会社日立製作所 | プリント基板の製造方法 |
JP2644951B2 (ja) * | 1991-09-20 | 1997-08-25 | 株式会社日立製作所 | 導体回路の形成方法 |
US5294291A (en) * | 1991-09-20 | 1994-03-15 | Hitachi, Ltd. | Process for the formation of a conductive circuit pattern |
DE69535768D1 (de) * | 1994-12-01 | 2008-07-24 | Ibiden Co Ltd | Mehrschichtige leiterplatte und verfahren für deren herstellung |
US6117300A (en) * | 1996-05-01 | 2000-09-12 | Honeywell International Inc. | Method for forming conductive traces and printed circuits made thereby |
JP3728572B2 (ja) * | 1996-10-31 | 2005-12-21 | 株式会社日立製作所 | 配線基板の製造方法 |
CN100546439C (zh) * | 2008-04-30 | 2009-09-30 | 李东明 | 印刷电路板掩膜孔铜加厚电镀工艺 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2009018B1 (de) * | 1970-02-26 | 1971-04-15 | Krause W | Verfahren zur Herstellung von gedruck ten Schaltunge |
JPS5662393A (en) * | 1979-10-26 | 1981-05-28 | Nippon Electric Co | Method of forming high density wering pattern |
JPS5730319A (en) * | 1980-07-31 | 1982-02-18 | Fujitsu Ltd | Automatic manufacturing equipment of integrated circuit device |
JPS5750489A (en) * | 1980-09-11 | 1982-03-24 | Nippon Electric Co | Method of producing hybrid circuit board |
US4606788A (en) * | 1984-04-12 | 1986-08-19 | Moran Peter L | Methods of and apparatus for forming conductive patterns on a substrate |
JPS6148831A (ja) * | 1984-08-10 | 1986-03-10 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | 光硬化性構造体 |
JPS63283097A (ja) * | 1987-05-14 | 1988-11-18 | Hitachi Plant Eng & Constr Co Ltd | パタ−ン形成法 |
-
1987
- 1987-07-08 JP JP62168638A patent/JP2550081B2/ja not_active Expired - Lifetime
-
1988
- 1988-07-05 DE DE3850176T patent/DE3850176T2/de not_active Expired - Fee Related
- 1988-07-05 EP EP88110710A patent/EP0298422B1/en not_active Expired - Lifetime
- 1988-07-08 KR KR1019880008500A patent/KR910000079B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
EP0298422A3 (en) | 1990-10-31 |
EP0298422A2 (en) | 1989-01-11 |
JPS6413794A (en) | 1989-01-18 |
DE3850176D1 (de) | 1994-07-21 |
JP2550081B2 (ja) | 1996-10-30 |
EP0298422B1 (en) | 1994-06-15 |
DE3850176T2 (de) | 1994-12-01 |
KR910000079B1 (ko) | 1991-01-19 |
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