KR880011907A - 반도체장치에서 배선층의 형성방법 - Google Patents
반도체장치에서 배선층의 형성방법 Download PDFInfo
- Publication number
- KR880011907A KR880011907A KR1019880003121A KR880003121A KR880011907A KR 880011907 A KR880011907 A KR 880011907A KR 1019880003121 A KR1019880003121 A KR 1019880003121A KR 880003121 A KR880003121 A KR 880003121A KR 880011907 A KR880011907 A KR 880011907A
- Authority
- KR
- South Korea
- Prior art keywords
- wiring layer
- semiconductor device
- film
- aluminum
- forming
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims description 8
- 239000004065 semiconductor Substances 0.000 title claims 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 6
- 229910052782 aluminium Inorganic materials 0.000 claims description 6
- 229910000838 Al alloy Inorganic materials 0.000 claims 5
- 238000000151 deposition Methods 0.000 claims 1
- 238000010438 heat treatment Methods 0.000 claims 1
- 230000001590 oxidative effect Effects 0.000 claims 1
- 239000000758 substrate Substances 0.000 claims 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/32051—Deposition of metallic or metal-silicide layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
- H01L21/76888—By rendering at least a portion of the conductor non conductive, e.g. oxidation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 1실시예에 관한 배선층의 형성벙법을 도시해 놓은 공정도.
제2도는 본 발명의 1실시예에 관한 배선층의 형성방법으로 형성된 알루미늄막의 구조를 도시해 놓은 단면도.
Claims (4)
- 반도체 기판위에 알루미늄막 또는 알루미늄 합금막을 피착시켜주는 제1 공정과, 상기 피착된 알루미늄막 또는 알루미늄 합금막의 표면을 산화시키는 제2공정을 구비해서, 상기 제1 및 제2 공정을 연속해서 복수회 반복함에 의해 바라는 막두께의 배선층을 형성시킬 수 있는 것을 특징으로 하는 반도체장치에서 배선층의 형성방법.
- 제1항에 있어서, 상기 제2공정이 상기 제1공정에서 피착형성된 알루미늄막 또는 알루미늄 합금막을 대기중에 방치됨에 따라 행해지는 것을 특징으로 하는 반도체장치에서 배선층의 형성방법.
- 제1항에 있어서, 상기 제2 공정이 상기 제1공정에서 피착 형성된 알루미늄막 또는 알루미늄 합금막을 대기중에 방치된 다음 가열처리되도록 행해지는 것을 특징으로하는 반도체장치에서 배선층의 형성방법.
- 제1항에 있어서, 상기 제2공정이 상기 제1공정에서 피착 형성된 알루미늄막 도는 알루미늄 합금막을 깨끗한 물중에 방치됨에 따라 행해지는 것을 특징으로 하는 반도체장치에서 배선층의 형성방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62068253A JPS6413740A (en) | 1987-03-23 | 1987-03-23 | Formation of wiring layer in semiconductor device |
JP62-68253 | 1987-03-23 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR880011907A true KR880011907A (ko) | 1988-10-31 |
Family
ID=13368407
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019880003121A KR880011907A (ko) | 1987-03-23 | 1988-03-23 | 반도체장치에서 배선층의 형성방법 |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP0283953A1 (ko) |
JP (1) | JPS6413740A (ko) |
KR (1) | KR880011907A (ko) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2817590B2 (ja) * | 1993-09-24 | 1998-10-30 | 信越半導体株式会社 | 発光素子の製造方法 |
JPH07231015A (ja) * | 1994-02-17 | 1995-08-29 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
JP5181462B2 (ja) * | 2006-10-31 | 2013-04-10 | 富士ゼロックス株式会社 | 半導体素子及びその製造方法 |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5771131A (en) * | 1980-10-22 | 1982-05-01 | Mitsubishi Electric Corp | Formation of conductor for aluminum electrode |
US4302498A (en) * | 1980-10-28 | 1981-11-24 | Rca Corporation | Laminated conducting film on an integrated circuit substrate and method of forming the laminate |
-
1987
- 1987-03-23 JP JP62068253A patent/JPS6413740A/ja active Pending
-
1988
- 1988-03-18 EP EP88104353A patent/EP0283953A1/en not_active Withdrawn
- 1988-03-23 KR KR1019880003121A patent/KR880011907A/ko not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
EP0283953A1 (en) | 1988-09-28 |
JPS6413740A (en) | 1989-01-18 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
WITB | Written withdrawal of application |