KR20250160428A - 에칭 조성물, 에칭 조성물의 제조 방법, 에칭 방법, 반도체 디바이스의 제조 방법 및 게이트 올 어라운드형 트랜지스터의 제조 방법 - Google Patents
에칭 조성물, 에칭 조성물의 제조 방법, 에칭 방법, 반도체 디바이스의 제조 방법 및 게이트 올 어라운드형 트랜지스터의 제조 방법Info
- Publication number
- KR20250160428A KR20250160428A KR1020257026654A KR20257026654A KR20250160428A KR 20250160428 A KR20250160428 A KR 20250160428A KR 1020257026654 A KR1020257026654 A KR 1020257026654A KR 20257026654 A KR20257026654 A KR 20257026654A KR 20250160428 A KR20250160428 A KR 20250160428A
- Authority
- KR
- South Korea
- Prior art keywords
- etching
- etching composition
- silicon
- compound
- silicon germanium
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09K—MATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FOR ELSEWHERE
- C09K13/00—Etching, surface-brightening or pickling compositions
-
- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09K—MATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FOR ELSEWHERE
- C09K13/00—Etching, surface-brightening or pickling compositions
- C09K13/02—Etching, surface-brightening or pickling compositions containing an alkali metal hydroxide
-
- H01L21/30604—
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/014—Manufacture or treatment of FETs having zero-dimensional [0D] or one-dimensional [1D] channels, e.g. quantum wire FETs, single-electron transistors [SET] or Coulomb blockade transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/019—Manufacture or treatment of FETs having stacked nanowire, nanosheet or nanoribbon channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/019—Manufacture or treatment of FETs having stacked nanowire, nanosheet or nanoribbon channels
- H10D30/0191—Manufacture or treatment of FETs having stacked nanowire, nanosheet or nanoribbon channels forming stacked channels, e.g. changing their shapes or sizes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
- H10D30/43—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having one-dimensional [1D] charge carrier gas channels, e.g. quantum wire FETs or transistors having 1D quantum-confined channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/60—Wet etching
- H10P50/64—Wet etching of semiconductor materials
- H10P50/642—Chemical etching
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/69—Etching of wafers, substrates or parts of devices using masks for semiconductor materials
- H10P50/691—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Materials Engineering (AREA)
- Organic Chemistry (AREA)
- Weting (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JPJP-P-2023-040024 | 2023-03-14 | ||
| JP2023040024 | 2023-03-14 | ||
| PCT/JP2024/008999 WO2024190648A1 (ja) | 2023-03-14 | 2024-03-08 | エッチング組成物、エッチング組成物の製造方法、エッチング方法、半導体デバイスの製造方法及びゲートオールアラウンド型トランジスタの製造方法 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR20250160428A true KR20250160428A (ko) | 2025-11-13 |
Family
ID=92755724
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020257026654A Pending KR20250160428A (ko) | 2023-03-14 | 2024-03-08 | 에칭 조성물, 에칭 조성물의 제조 방법, 에칭 방법, 반도체 디바이스의 제조 방법 및 게이트 올 어라운드형 트랜지스터의 제조 방법 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20260008957A1 (https=) |
| JP (1) | JPWO2024190648A1 (https=) |
| KR (1) | KR20250160428A (https=) |
| TW (1) | TW202503893A (https=) |
| WO (1) | WO2024190648A1 (https=) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2022153658A (ja) | 2018-11-28 | 2022-10-12 | 本田技研工業株式会社 | 経路評価装置、経路評価方法および経路評価プログラム |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI480360B (zh) * | 2009-04-03 | 2015-04-11 | 杜邦股份有限公司 | 蝕刻劑組成物及方法 |
| US10934485B2 (en) * | 2017-08-25 | 2021-03-02 | Versum Materials Us, Llc | Etching solution for selectively removing silicon over silicon-germanium alloy from a silicon-germanium/ silicon stack during manufacture of a semiconductor device |
| CN116635986A (zh) * | 2021-01-12 | 2023-08-22 | 三菱化学株式会社 | 蚀刻组合物、蚀刻方法、半导体器件的制造方法和全环绕栅极型晶体管的制造方法 |
| WO2022172907A1 (ja) * | 2021-02-10 | 2022-08-18 | 株式会社トクヤマ | 基板の処理方法、および該処理方法を含むシリコンデバイスの製造方法 |
-
2024
- 2024-03-08 WO PCT/JP2024/008999 patent/WO2024190648A1/ja not_active Ceased
- 2024-03-08 KR KR1020257026654A patent/KR20250160428A/ko active Pending
- 2024-03-08 JP JP2025506790A patent/JPWO2024190648A1/ja active Pending
- 2024-03-14 TW TW113109366A patent/TW202503893A/zh unknown
-
2025
- 2025-09-10 US US19/325,340 patent/US20260008957A1/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2022153658A (ja) | 2018-11-28 | 2022-10-12 | 本田技研工業株式会社 | 経路評価装置、経路評価方法および経路評価プログラム |
Also Published As
| Publication number | Publication date |
|---|---|
| JPWO2024190648A1 (https=) | 2024-09-19 |
| TW202503893A (zh) | 2025-01-16 |
| WO2024190648A1 (ja) | 2024-09-19 |
| US20260008957A1 (en) | 2026-01-08 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PA0105 | International application |
St.27 status event code: A-0-1-A10-A15-nap-PA0105 |
|
| PG1501 | Laying open of application |
St.27 status event code: A-1-1-Q10-Q12-nap-PG1501 |
|
| Q12 | Application published |
Free format text: ST27 STATUS EVENT CODE: A-1-1-Q10-Q12-NAP-PG1501 (AS PROVIDED BY THE NATIONAL OFFICE) |
|
| P22-X000 | Classification modified |
St.27 status event code: A-2-2-P10-P22-nap-X000 |