TW202503893A - 蝕刻組合物、蝕刻組合物之製造方法、蝕刻方法、半導體裝置之製造方法及環繞式閘極型電晶體之製造方法 - Google Patents

蝕刻組合物、蝕刻組合物之製造方法、蝕刻方法、半導體裝置之製造方法及環繞式閘極型電晶體之製造方法 Download PDF

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Publication number
TW202503893A
TW202503893A TW113109366A TW113109366A TW202503893A TW 202503893 A TW202503893 A TW 202503893A TW 113109366 A TW113109366 A TW 113109366A TW 113109366 A TW113109366 A TW 113109366A TW 202503893 A TW202503893 A TW 202503893A
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Taiwan
Prior art keywords
etching composition
etching
silicon
compound
mol
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TW113109366A
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English (en)
Chinese (zh)
Inventor
白江宏之
笠井鉄夫
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日商三菱化學股份有限公司
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Publication of TW202503893A publication Critical patent/TW202503893A/zh

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    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09K—MATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FOR ELSEWHERE
    • C09K13/00—Etching, surface-brightening or pickling compositions
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09K—MATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FOR ELSEWHERE
    • C09K13/00—Etching, surface-brightening or pickling compositions
    • C09K13/02—Etching, surface-brightening or pickling compositions containing an alkali metal hydroxide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/014—Manufacture or treatment of FETs having zero-dimensional [0D] or one-dimensional [1D] channels, e.g. quantum wire FETs, single-electron transistors [SET] or Coulomb blockade transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/019—Manufacture or treatment of FETs having stacked nanowire, nanosheet or nanoribbon channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/019—Manufacture or treatment of FETs having stacked nanowire, nanosheet or nanoribbon channels
    • H10D30/0191—Manufacture or treatment of FETs having stacked nanowire, nanosheet or nanoribbon channels forming stacked channels, e.g. changing their shapes or sizes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/43—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having one-dimensional [1D] charge carrier gas channels, e.g. quantum wire FETs or transistors having 1D quantum-confined channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/60—Wet etching
    • H10P50/64—Wet etching of semiconductor materials
    • H10P50/642—Chemical etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/69—Etching of wafers, substrates or parts of devices using masks for semiconductor materials
    • H10P50/691—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Organic Chemistry (AREA)
  • Weting (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
TW113109366A 2023-03-14 2024-03-14 蝕刻組合物、蝕刻組合物之製造方法、蝕刻方法、半導體裝置之製造方法及環繞式閘極型電晶體之製造方法 TW202503893A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2023-040024 2023-03-14
JP2023040024 2023-03-14

Publications (1)

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TW202503893A true TW202503893A (zh) 2025-01-16

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TW113109366A TW202503893A (zh) 2023-03-14 2024-03-14 蝕刻組合物、蝕刻組合物之製造方法、蝕刻方法、半導體裝置之製造方法及環繞式閘極型電晶體之製造方法

Country Status (5)

Country Link
US (1) US20260008957A1 (https=)
JP (1) JPWO2024190648A1 (https=)
KR (1) KR20250160428A (https=)
TW (1) TW202503893A (https=)
WO (1) WO2024190648A1 (https=)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI480360B (zh) * 2009-04-03 2015-04-11 杜邦股份有限公司 蝕刻劑組成物及方法
US10934485B2 (en) * 2017-08-25 2021-03-02 Versum Materials Us, Llc Etching solution for selectively removing silicon over silicon-germanium alloy from a silicon-germanium/ silicon stack during manufacture of a semiconductor device
WO2020110215A1 (ja) 2018-11-28 2020-06-04 本田技研工業株式会社 経路評価装置、経路評価システム、経路評価方法および経路評価プログラム
CN116635986A (zh) * 2021-01-12 2023-08-22 三菱化学株式会社 蚀刻组合物、蚀刻方法、半导体器件的制造方法和全环绕栅极型晶体管的制造方法
WO2022172907A1 (ja) * 2021-02-10 2022-08-18 株式会社トクヤマ 基板の処理方法、および該処理方法を含むシリコンデバイスの製造方法

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JPWO2024190648A1 (https=) 2024-09-19
KR20250160428A (ko) 2025-11-13
WO2024190648A1 (ja) 2024-09-19
US20260008957A1 (en) 2026-01-08

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