KR20240108500A - 스티프너 부착 배선 기판 - Google Patents

스티프너 부착 배선 기판 Download PDF

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Publication number
KR20240108500A
KR20240108500A KR1020247020396A KR20247020396A KR20240108500A KR 20240108500 A KR20240108500 A KR 20240108500A KR 1020247020396 A KR1020247020396 A KR 1020247020396A KR 20247020396 A KR20247020396 A KR 20247020396A KR 20240108500 A KR20240108500 A KR 20240108500A
Authority
KR
South Korea
Prior art keywords
stiffener
wiring board
thermal expansion
layer
insulating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1020247020396A
Other languages
English (en)
Korean (ko)
Inventor
스구루 카도와키
쇼헤이 오니마루
Original Assignee
교세라 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 교세라 가부시키가이샤 filed Critical 교세라 가부시키가이샤
Publication of KR20240108500A publication Critical patent/KR20240108500A/ko
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H01L23/147—
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69—Insulating materials thereof
    • H10W70/698—Semiconductor materials that are electrically insulating, e.g. undoped silicon
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/06—Thermal details
    • H05K2201/068—Thermal details wherein the coefficient of thermal expansion is important
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10439—Position of a single component
    • H05K2201/10462—Flat component oriented parallel to the PCB surface
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10734—Ball grid array [BGA]; Bump grid array
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Structure Of Printed Boards (AREA)
KR1020247020396A 2021-12-28 2022-12-23 스티프너 부착 배선 기판 Withdrawn KR20240108500A (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2021214992 2021-12-28
JPJP-P-2021-214992 2021-12-28
PCT/JP2022/047631 WO2023127725A1 (ja) 2021-12-28 2022-12-23 スティフナ付き配線基板

Publications (1)

Publication Number Publication Date
KR20240108500A true KR20240108500A (ko) 2024-07-09

Family

ID=86999232

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020247020396A Withdrawn KR20240108500A (ko) 2021-12-28 2022-12-23 스티프너 부착 배선 기판

Country Status (6)

Country Link
US (1) US20250106984A1 (https=)
JP (1) JP7784446B2 (https=)
KR (1) KR20240108500A (https=)
CN (1) CN118414891A (https=)
TW (1) TWI854415B (https=)
WO (1) WO2023127725A1 (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2025243527A1 (ja) * 2024-05-24 2025-11-27 株式会社レゾナック 半導体装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020162417A1 (ja) 2019-02-04 2020-08-13 株式会社ソニー・インタラクティブエンタテインメント 電子機器、半導体装置、絶縁シート、及び半導体装置の製造方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3367554B2 (ja) * 1999-10-13 2003-01-14 日本電気株式会社 フリップチップパッケージ
US6472762B1 (en) * 2001-08-31 2002-10-29 Lsi Logic Corporation Enhanced laminate flipchip package using a high CTE heatspreader
JP2004356569A (ja) * 2003-05-30 2004-12-16 Shinko Electric Ind Co Ltd 半導体装置用パッケージ
JP4885425B2 (ja) 2004-01-28 2012-02-29 京セラ株式会社 半導体素子収納パッケージ
JP4599891B2 (ja) 2004-05-28 2010-12-15 凸版印刷株式会社 半導体装置用基板並びに半導体装置
WO2006087769A1 (ja) * 2005-02-15 2006-08-24 Fujitsu Limited パッケージ実装モジュールおよびパッケージ基板モジュール
JP5284235B2 (ja) * 2008-09-29 2013-09-11 日本特殊陶業株式会社 半導体パッケージ
JP5350829B2 (ja) 2009-02-16 2013-11-27 日本特殊陶業株式会社 補強材付き配線基板の製造方法、補強材付き配線基板用の配線基板
JP5132801B1 (ja) * 2011-07-14 2013-01-30 株式会社東芝 テレビジョン受像機、及び電子機器
US10636746B2 (en) * 2018-02-26 2020-04-28 International Business Machines Corporation Method of forming an electronic package
JP7351107B2 (ja) 2019-06-06 2023-09-27 凸版印刷株式会社 配線基板及び配線基板の製造方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020162417A1 (ja) 2019-02-04 2020-08-13 株式会社ソニー・インタラクティブエンタテインメント 電子機器、半導体装置、絶縁シート、及び半導体装置の製造方法

Also Published As

Publication number Publication date
TW202335541A (zh) 2023-09-01
US20250106984A1 (en) 2025-03-27
JP7784446B2 (ja) 2025-12-11
WO2023127725A1 (ja) 2023-07-06
CN118414891A (zh) 2024-07-30
TWI854415B (zh) 2024-09-01
JPWO2023127725A1 (https=) 2023-07-06

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