KR20210002138A - 확장부를 갖는 채널 구조체를 포함하는 3차원 플래시 메모리 소자 - Google Patents

확장부를 갖는 채널 구조체를 포함하는 3차원 플래시 메모리 소자 Download PDF

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KR20210002138A
KR20210002138A KR1020190073628A KR20190073628A KR20210002138A KR 20210002138 A KR20210002138 A KR 20210002138A KR 1020190073628 A KR1020190073628 A KR 1020190073628A KR 20190073628 A KR20190073628 A KR 20190073628A KR 20210002138 A KR20210002138 A KR 20210002138A
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South Korea
Prior art keywords
insulating layer
channel structure
cell
dummy channel
interlayer insulating
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KR1020190073628A
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English (en)
Korean (ko)
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KR102689647B1 (ko
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천지성
Original Assignee
삼성전자주식회사
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Priority to KR1020190073628A priority Critical patent/KR102689647B1/ko
Priority to US16/589,206 priority patent/US11189631B2/en
Priority to CN201911353740.2A priority patent/CN112117282A/zh
Publication of KR20210002138A publication Critical patent/KR20210002138A/ko
Priority to US17/532,271 priority patent/US11678489B2/en
Application granted granted Critical
Publication of KR102689647B1 publication Critical patent/KR102689647B1/ko

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    • H01L27/11582—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5226—Via connections in a multilevel interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Geometry or layout of the interconnection structure
    • H01L23/5283—Cross-sectional geometry
    • H01L27/11568—
    • H01L27/11575—
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H01L29/4011—Multistep manufacturing processes for data storage electrodes
    • H01L29/40117—Multistep manufacturing processes for data storage electrodes the electrodes comprising a charge-trapping insulator
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B41/27—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/50—EEPROM devices comprising charge-trapping gate insulators characterised by the boundary region between the core and peripheral circuit regions

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Geometry (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
KR1020190073628A 2019-06-20 2019-06-20 확장부를 갖는 채널 구조체를 포함하는 3차원 플래시 메모리 소자 KR102689647B1 (ko)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1020190073628A KR102689647B1 (ko) 2019-06-20 2019-06-20 확장부를 갖는 채널 구조체를 포함하는 3차원 플래시 메모리 소자
US16/589,206 US11189631B2 (en) 2019-06-20 2019-10-01 Three-dimensional flash memory device including channel structures having enlarged portions
CN201911353740.2A CN112117282A (zh) 2019-06-20 2019-12-25 包括具有扩大部分的沟道结构的三维闪存器件
US17/532,271 US11678489B2 (en) 2019-06-20 2021-11-22 Three-dimensional flash memory device including channel structures having enlarged portions

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020190073628A KR102689647B1 (ko) 2019-06-20 2019-06-20 확장부를 갖는 채널 구조체를 포함하는 3차원 플래시 메모리 소자

Publications (2)

Publication Number Publication Date
KR20210002138A true KR20210002138A (ko) 2021-01-07
KR102689647B1 KR102689647B1 (ko) 2024-07-30

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KR1020190073628A KR102689647B1 (ko) 2019-06-20 2019-06-20 확장부를 갖는 채널 구조체를 포함하는 3차원 플래시 메모리 소자

Country Status (3)

Country Link
US (2) US11189631B2 (zh)
KR (1) KR102689647B1 (zh)
CN (1) CN112117282A (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
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KR20220117690A (ko) * 2021-02-17 2022-08-24 한양대학교 산학협력단 개선된 스택 연결 부위를 갖는 3차원 플래시 메모리 및 그 제조 방법
KR20220154868A (ko) * 2021-05-14 2022-11-22 한양대학교 산학협력단 연결부를 포함하는 3차원 플래시 메모리 및 그 제조 방법

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US11393672B2 (en) * 2020-02-12 2022-07-19 Micron Technology, Inc. Methods of forming microelectronic devices including an interdeck region between deck structures
US11552100B2 (en) 2020-08-05 2023-01-10 Sandisk Technologies Llc Three-dimensional memory device including a composite semiconductor channel and a horizontal source contact layer and method of making the same
US11600634B2 (en) * 2020-08-05 2023-03-07 Sandisk Technologies Llc Three-dimensional memory device including a composite semiconductor channel and a horizontal source contact layer and method of making the same
KR20220071553A (ko) 2020-11-24 2022-05-31 에스케이하이닉스 주식회사 반도체 장치 및 반도체 장치의 제조 방법
CN112701123B (zh) * 2020-12-25 2022-05-10 长江存储科技有限责任公司 半导体器件及其制备方法

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US20190280000A1 (en) * 2018-03-07 2019-09-12 Sandisk Technologies Llc Multi-tier memory device with rounded top part of joint structure and methods of making the same
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US9230987B2 (en) 2014-02-20 2016-01-05 Sandisk Technologies Inc. Multilevel memory stack structure and methods of manufacturing the same
US9691781B1 (en) 2015-12-04 2017-06-27 Sandisk Technologies Llc Vertical resistor in 3D memory device with two-tier stack
US9576967B1 (en) 2016-06-30 2017-02-21 Sandisk Technologies Llc Method of suppressing epitaxial growth in support openings and three-dimensional memory device containing non-epitaxial support pillars in the support openings
US9960181B1 (en) * 2017-04-17 2018-05-01 Sandisk Technologies Llc Three-dimensional memory device having contact via structures in overlapped terrace region and method of making thereof
US10114590B1 (en) 2017-05-31 2018-10-30 Sandisk Technologies Llc Methods for three-dimensional nonvolatile memory that include multi-portion word lines
JP7118172B2 (ja) * 2018-07-27 2022-08-15 長江存儲科技有限責任公司 マルチスタック３次元メモリデバイスおよびその作製方法
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KR20180095499A (ko) * 2015-12-22 2018-08-27 샌디스크 테크놀로지스 엘엘씨 3차원 메모리 디바이스를 위한 관통-메모리-레벨 비아 구조물들
US20180151497A1 (en) * 2016-11-28 2018-05-31 Sandisk Technologies Llc Three-dimensional array device having a metal containing barrier and method of making thereof
US20190280000A1 (en) * 2018-03-07 2019-09-12 Sandisk Technologies Llc Multi-tier memory device with rounded top part of joint structure and methods of making the same
US10672780B1 (en) * 2019-02-25 2020-06-02 Sandisk Technologies Llc Three-dimensional memory device having dual configuration support pillar structures and methods for making the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20220117690A (ko) * 2021-02-17 2022-08-24 한양대학교 산학협력단 개선된 스택 연결 부위를 갖는 3차원 플래시 메모리 및 그 제조 방법
KR20220154868A (ko) * 2021-05-14 2022-11-22 한양대학교 산학협력단 연결부를 포함하는 3차원 플래시 메모리 및 그 제조 방법

Also Published As

Publication number Publication date
US20200402995A1 (en) 2020-12-24
US20220085068A1 (en) 2022-03-17
KR102689647B1 (ko) 2024-07-30
US11678489B2 (en) 2023-06-13
CN112117282A (zh) 2020-12-22
US11189631B2 (en) 2021-11-30

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