KR20120052284A - Multilayered wiring board and method for manufacturing multilayered wiring board - Google Patents

Abstract

In the production of multi-layer wiring board for use in mounting of electronic parts it had a multilayer wiring technology is used for performing the interlayer connection by using the conductive bumps, such as conventional, B ² it. However, there has been a problem that short circuits between the multilayer wirings occur due to the warpage of the substrate, or a connection failure occurs between the conductive bumps and the wirings. For this reason, an insulating film was formed by coating the insulating varnish containing an insulating filler. Even when the substrate is warped, it is possible to maintain the insulation between the multilayer wirings, to improve the stability of the wiring connection, and to improve the production yield.

Description

MULTILAYERED WIRING BOARD AND METHOD FOR MANUFACTURING MULTILAYERED WIRING BOARD}

The present invention relates to a multilayer wiring board and a method for manufacturing the multilayer wiring board for mounting electronic components. In particular, the present invention relates to a method for manufacturing a multilayer wiring board capable of high-density wiring having vias made of conductive bumps.

Patent Document 1: Japanese Patent No. 3167840

Patent Document 2: Japanese Patent Application Laid-Open No. 2007-13208

Patent Document 3: Japanese Patent Application Laid-Open No. 2006-183072

Patent Document 4: Japanese Patent Application Laid-Open No. 2002-353617

In recent years, with the reduction in size, speed, and multifunctionality of electronic devices, the demand for high-density mounting has also increased for wiring boards mounted on electronic devices. In order to respond to this demand, development of a multilayer wiring board is in progress. In this multilayer wiring board, electronic components are mounted by alternately stacking a plurality of insulating substrates and a plurality of conductive patterns.

As a typical manufacturing technique of multilayer wiring boards, ALIVH of Matsushita electronic parts and B ² it of Toshiba and Dinihon printing are known.

Any layer interstitial via hole structure multi layered printed wiring board (ALIVH) is a technique for forming interlayer connection holes in an insulating substrate and filling conductive material in the hole portions. First, a fine via hole is formed by irradiating a prepreg (insulating base material sheet used as a material of a wiring board) with a laser beam. Vias (interlayer connection portions) are formed by filling the formed via holes with a conductive paste. Copper foil is laminated and heat-pressed on a prepreg. Moreover, a wiring board member is obtained by forming a conductive pattern by photolithography and etching. A multilayer wiring board is manufactured by laminating | stacking heat press this wiring board member.

In ALIVH, wiring or electronic components can be placed on the via holes. For this reason, the wiring length can be shortened and high-density mounting of electronic components is possible.

However, as the number of via holes increases, the processing time of laser light irradiation increases. For this reason, manufacturing cost becomes high and the adhesive strength with respect to the via of the copper foil adhered by laminated heat press is not high. For this reason, there exists a problem that open defects are easy to occur at the time of a drop test, and reliability is low.

In B ² it (Buried Bump Interconnection Technology), a conductive bump is formed in the shape of a mountain or an approximately conical shape on the conductor plate. Thereafter, the insulating prepreg base material is heat-softened. A bump is made to penetrate this insulating prepreg base material by a press. This forms a via made of conductive bumps. The technique related to B ² it is disclosed in Patent Document 1 and Patent Document 2.

In the technique disclosed in Patent Literature 1, a mountain-shaped conductor bump is made to penetrate the synthetic resin support along the thickness direction thereof. Thereafter, interlayer wiring is formed.

In the technique disclosed in Patent Literature 2, an uncured insulating material base material is disposed on a substantially conical conductor bump formed on a conductor plate. Thereafter, the substrate is pressed to penetrate the bumps. Furthermore, the conductor plate is patterned. Thereby, a board | substrate unit is produced. Several board | substrates are laminated | stacked, it pressurizes, and hardens | cures.

In B ² it, like ALIVH, wiring and electronic components can be arranged without forming a groove in the via hole. For this reason, the wiring length can be shortened and high density mounting is possible. Unlike the ALIVH, vias are collectively formed. For this reason, even if the number of via holes increases, the manufacturing cost does not increase. The conductive bumps are formed on the copper foil by printing before prepreg lamination. Accordingly, B ² it has the advantage of good adhesion of the bumps do for the copper foil.

On the other hand, B ² it has the following problems.

(1) A large pressure is applied to the conductive bumps and the prepreg having a high aspect ratio during the penetration of the conductive bumps and the laminated heat press for forming the multilayer wiring board. At present, the in-plane density of the vias is about 300,000 / m ² . In the future, the in-plane density of vias is expected to be about 1 million / m ² . In this case, extremely high pressure is applied to the conductive bumps and the prepreg. For this reason, the defective rate by breakage of an electroconductive bump and a prepreg becomes high. Therefore, it is difficult to realize high density in B ² it.

(2) In B ² it, mechanical strength is required for the conductive bumps. For this reason, it is necessary to make the outer diameter into 100 micrometers or more. In order to realize high-density mounting, refinement | miniaturization of a conductive bump is advanced so that the bottom diameter of a conductive bump may be 30 micrometers-50 micrometers. However, in B ² it, the aspect ratio of bumps is high, and there is a limit in thinning prepreg. For this reason, refinement | miniaturization is difficult.

(3) The conductive bumps do not penetrate the prepreg unless the aspect ratio (height / outer diameter) of the conductive bumps is 0.8 to 1.0 or more. In addition, there is a limit to thinning the glass cloth-impregnated insulating resin base material, which is a general material of prepreg (~ 30 µm ^t or more). In addition, in order to improve the penetration characteristics of the conductive bumps, the conductive bump height about three times the thickness of the prepreg is required. Therefore, if the above-described penetrating aspect ratio is secured, a limit (min. 72 to 90 µm) occurs in miniaturization of the bottom diameter of the conductive bumps. In addition, an electroconductive bump will not penetrate a prepreg unless the thickness of a prepreg and the temperature of a press process are adjusted suitably. Accordingly, B ² it in the form of electrically conductive bumps, through lamination process, and smaller the margin of the heat pressing process, such as production conditions. For this reason, there exists a problem that a yield is low.

(4) Development of a conductive paste capable of printing and forming a high aspect conductive bump having a fine outer diameter is extremely difficult.

(5) There is also a problem in the step of allowing the sheet to penetrate the bump by heating and softening the prepreg sheet made of the insulating resin in the pre-cured state and pressing the projection conductive bump. That is, the said prepreg sheet is a structure obtained by weaving a glass cloth base material longitudinally and horizontally with a fiber filament bundle. For this reason, the resistance difference of penetration is large between the case where a conductive bump corresponds to the intersection part of a filament bundle, and the case where it corresponds between a filament bundle and a filament bundle. The larger the resistance, the more the fracture residue of the insulating resin and / or the glass cloth is generated at the interface between the insulating resin prepreg sheet and the conductive bumps. The crushed remainder of these insulating resins and / or glass cloths causes an increase in contact resistance value or poor conduction upon lamination and pressurization of the conductive bumps and the conductor layers of the wiring board in the subsequent steps. For this reason, the shredding residue reduced the yield of the wiring board.

14 (a) to 14 (d) are cross-sectional views and perspective views showing a process procedure showing a method for manufacturing a multilayer wiring board member of a B ² it method in which a bump penetrates a conventional prepreg sheet. First, a substantially conical conductive bump 502 is formed on the first conductive foil 501 by a printing process of the conductive paste. This yields an intermediate (Fig. 14 (a)). Next, this intermediate object is made to face the prepreg sheet 503 which is insulating resin of a state before hardening (FIG. 14 (b)). Subsequently, under heating, the prepreg sheet 503 is heated to just before dissolution and softened. The tip end of the conductive bump 502 is projected from the prepreg sheet 503 (Fig. 14 (c)). Next, the second conductive foil 505 is pasted onto the prepreg sheet 503 on which the tip of the conductive bump 502 protrudes (FIG. 14 (d)). Fig. 14E is a horizontal sectional view of the upper portion of the conductive bump 502, which is a multilayer wiring board member fabricated according to this method. It is observed that the fracture residue 508 of the glass fiber base material contained in the prepreg sheet remains in the bump surface 507. A multilayer wiring board is formed by laminating | stacking and pressing the several multilayer wiring board member produced by such a method. In the method for manufacturing the conventional multilayer wiring board member B ² it manner of debris waste it is left in the bump surface. For this reason, there existed a problem that the electrical connection defect of an interlayer wiring was easy to produce.

On the other hand, Patent Document 4 does not use a method such as through-B ² it, there is a prior art is disclosed for forming a via made of a conductive bump. In this technique, an insulating resin composition is applied to the conductor bump group formed on the first metal foil by the curtain coater method. Moreover, a 2nd metal foil is piled up on it and pressed. In addition to the curtain coater method as a method of apply | coating an insulating resin composition, the method of coating on a conductor bump by making a spray method and an insulating resin composition into a thermosoftening film form is described. In the method disclosed in Patent Document 4, no mechanical pressure is applied to the conductor bumps. Therefore, it is possible to avoid the problem of the above-described B ² it. In this method, however, the high-viscosity insulating resin is applied onto the conductor bumps as a liquid in the curtain coater method and in the form of droplets in the spray method. For this reason, there exists a problem that insulating resin adheres easily to the front-end | tip part of a conductor bump, or the incidence rate of the defective contact of a conductor bump and a 2nd metal foil is high. In addition, when a film of a thermosoftening film is formed on a conductor bump, the tip of the conductor bump is not exposed. For this reason, there also exists a problem that an interlayer connection cannot be formed.

Moreover, the conventional manufacturing method of a multilayer wiring board has a problem that the connection defect generate | occur | produces between multilayer wirings by the bending of a core board | substrate. 8 (b) and 8 (c) are cross-sectional views showing connection failures between wirings generated by a conventional multilayer manufacturing method. In FIG. 8B, a first core substrate 213 and a second core substrate 208 having wirings formed on the surface thereof are laminated so that the wiring surfaces thereof face each other with the insulating resin layer 211 interposed therebetween. have. A portion of the wiring 212 and a portion of the wiring 209 are electrically connected by the conductive bumps 210. In the case where there is a large warp in the core substrate, for example, as shown in FIG. 8 (b), when there is a warp that is convex in the central portion, the wiring layers to be separated by the insulating resin layer 211 are brought into contact with each other. A wiring short has occurred. On the other hand, as shown in Fig. 8C, when the wiring 215 and the wiring 218 are insulated by the insulating resin layer 217 without being in contact with each other, the conductive bumps 216 of the peripheral portion to be electrically connected to each other are shown. ) And wires facing each other do not contact, and wiring open occurs. In the conventional manufacturing method of a multilayer wiring board, the wiring connection defect by the bending of a board | substrate generate | occur | produces. For this reason, there existed a problem that manufacturing yield of a multilayer wiring board cannot be made high enough.

An object of the present invention is to provide a member for a multilayer wiring board and a method for producing the multilayer wiring board. According to this member, the multilayer wiring board can be made finer, higher in density and thinner in thickness, and the interlayer insulation of the multilayer wiring board is also improved. Moreover, according to this manufacturing method, the wiring board with high connection reliability by the interlayer fine electroconductive bump can be supplied, Furthermore, manufacturing yield is high and manufacturing cost is also low.

This invention (1) consists of the conductive bump group formed between the 1st conductor layer and the 2nd conductor layer, and the insulating layer formed around the said conductive bump group, and containing the insulating filler for short circuit prevention. It is a multilayer wiring board.

This invention (2) consists of the conductive bump group formed between the 1st conductor layer and the 2nd conductor layer, and the insulating layer formed around the said conductive bump group, and containing an insulating filler, The said insulating filler An average particle diameter of the multilayer wiring board is 20% or more and 100% or less of the average height of the conductive bump group after the lamination heat press.

This invention (3) is a layer formed by hardening | curing after reducing a film thickness by volatilizing a solvent on the conditions which do not substantially harden-cure resin of the insulating resin compound liquid containing an insulating filler. The multilayer wiring board of the said invention (1) or said invention (2) characterized by the above-mentioned.

The invention (4) is the invention (1) to the invention (3) wherein the insulating filler is one or a plurality of materials selected from silica, silicon carbide, alumina, aluminum nitride, zirconia beads, glass beads, and acrylic beads. ) Is a multilayer wiring board.

This invention (5) is the multilayer wiring board of the said invention (1)-the invention (4) characterized by the addition amount with respect to the said insulating resin compound liquid of the said insulating filler being 1 mmol% or more and 30 mmol% or less.

The present invention (6) is that the insulating resin blend is a blend using an epoxy resin, bismaleimide triazine resin, polyimide resin, acrylic resin, phenol resin, oligophenylene ether resin, polyether resin and melamine resin. The multilayer wiring board of the said invention (1) thru | or said invention (5) characterized by the above-mentioned.

This invention (7) is a multilayer wiring board of the said invention (1)-the invention (6) characterized by the height h2 of the said electroconductive bump group and the thickness t3 of the said insulating layer having a relationship of h2 = t3.

The invention (8) is the invention (1) to the above, wherein the resin composition constituting the conductive bump group is made of a material obtained by adding a thermoplastic resin to a thermosetting resin at a mixing ratio of 10 wt% or more and 30 wt% or less. It is a multilayer wiring board of the said invention (7).

The present invention (9) comprises at least a step of forming a projection-shaped conductive bump group on a conductor layer, and applying an insulating resin mixture containing an insulating filler and a volatile solvent on the conductor layer and on the conductive bump group. After forming a flowable film, volatilizing the volatile solvent and reducing the thickness of the flowable film, forming an insulating uncured film and laminating a conductor layer or a core substrate on the insulating uncured film, It is a manufacturing method of the multilayer wiring board containing the process of forming an insulating layer by hardening | curing the said insulating uncured film.

The present invention (10) provides a fluid coating by applying a step of forming a projection-shaped conductive bump group on at least a first core substrate, and applying an insulating resin mixture containing an insulating filler and a volatile solvent on the conductive bump group. Forming an insulating uncured film by volatilizing the volatile solvent and reducing the fluid coating film, and laminating a conductor layer or a second core substrate on the insulating uncured film. Then, it is a manufacturing method of the multilayer wiring board containing the process of forming an insulating layer by hardening | curing the said insulating uncured film.

The present invention (11) comprises at least a step of forming a projection-shaped conductive bump group on a first core substrate, and applying an insulating resin mixture containing an insulating filler and a volatile solvent on a conductor layer or a second core substrate. A process of forming a flowable film, volatilizing the volatile solvent, and reducing the thickness of the flowable film to form an insulating non-hardened film, and a conductor having the first core substrate and the insulating uncured film formed thereon. It is a manufacturing method of a multilayer wiring board including the process of laminating and heat-pressing a layer or a 2nd core board | substrate.

In the present invention (12), a step of forming a fluid coating film by applying an insulating resin blend containing an insulating filler and a volatile solvent on at least a first conductor layer disposed on a first core substrate, and the volatile solvent Volatilizing and reducing the thickness of the fluid coating film to form an insulating uncured film, forming a bumpy conductive bump group on the second conductor layer or the second core substrate, and It is a manufacturing method of the multilayer wiring board containing the process of laminating and heat-pressing the core substrate of 1 and the said insulating layer.

This invention (13) forms a fluidic film by forming a conductive bump group on a 1st conductor layer, apply | coating the insulating resin compound liquid containing an insulating filler and a volatile solvent, and volatilizing the said volatile solvent. And forming one or more multilayer wiring board members formed by forming the insulating uncured coating by reducing the flowable film thickness, and then laminating and thermally pressing the multilayer wiring board members on a core substrate and the multilayer It is a manufacturing method of the multilayer wiring board which forms a multilayer wiring board by repeating the process containing forming a 2nd conductor layer once or several times on the wiring board member.

This invention (14) forms a fluidic film by forming a conductive bump group on a 1st conductor layer, apply | coating the insulating resin compound liquid containing an insulating filler and a volatile solvent, and volatilizing the said volatile solvent. And one or more multilayer wiring board members formed by reducing the flowable film to form an insulating uncured coating, and then laminating and heat-pressing one or a plurality of the multilayer wiring board members on a core substrate at a time. By forming a multilayer wiring board, it is a manufacturing method of a multilayer wiring board.

This invention (15) is a manufacturing method of the multilayer wiring board of the said invention (9)-said invention (14) whose content of the nonvolatile component in the said insulating resin compound liquid is 10 weight%-80 weight%.

This invention (16) is the manufacturing method of the multilayer wiring board of the said invention (9) thru | or the said invention (15) characterized by the drying / solidification temperature of the said insulating layer being 60 degreeC or more and 160 degrees C or less.

The invention (17) to the above invention, wherein the resin composition constituting the conductive bump group is made of a material in which a thermoplastic resin is added to a thermosetting resin in a mixing ratio of 10 wt% or more and 30 wt% or less. It is a manufacturing method of the multilayer wiring board of invention (16).

The invention (18) is the invention (9) to the invention (17), wherein the temperature of the laminated hot press is equal to or less than the temperature at which the curing reaction of the insulating resin starts, and more than the temperature at which the thermal melting viscosity of the insulating resin decreases. It is a manufacturing method of a multilayer wiring board.

The effect of this invention is shown below.

1.Comparison with B ² it

There is no conductive bump through process. For this reason, no mechanical pressure is applied to the member. therefore,

Since the insulating layer can be made thin, the height of the conductive bumps can be reduced. Further, even if the aspect ratio of the conductive bumps is small, vias can be formed. As a result, the size of the conductive bumps can be reduced. As a result, it becomes possible to manufacture the high density multilayer wiring board which has a conductive bump which has an outer diameter of 30-50 micrometers. In the future, the present invention can cope with a conductive bump density of 1 million pieces / m ² .

It is not necessary to increase the aspect ratio of the conductive bumps. For this reason, it is possible to form a conductive bump even if a special conductive paste is not used or the paste coating step for forming the conductive bump is not repeated many times. Therefore, it is possible to reduce material cost and manufacturing cost.

The defective rate by damage of an electroconductive bump, wiring, and an insulating film reduces.

The margin of manufacturing conditions is widened. For this reason, even if the aspect-ratio of electroconductive bumps needed in order to form favorable interlayer connection is small, manufacture yield improves.

2. Comparison with ALIVH

In the present invention, no laser drilling technique is used. For this reason, the shape nonuniformity of a hole part can be excluded. The geometrical nonuniformity by the laser drilling method causes poor adhesion between the hole portion and the via conductive agent in the manufacturing process. This poor adhesion causes liquid or moisture to penetrate into the wiring board, which causes one of various defects. In contrast, according to the manufacturing method of the present invention, the interface between the conductive bumps and the insulating film is formed by applying a low viscosity fluid resin around the conductive bumps. Therefore, the adhesion between the conductive bumps corresponding to the vias and the insulating film and the reliability of the wiring board are extremely high.

This is a method of collectively manufacturing a plurality of vias. For this reason, manufacturing cost does not increase even if the number of vias increases.

3. Comparison with through hole plating method

The present invention is suitable for miniaturization because of high space utilization efficiency of vias. The structure of this invention is a structure which fills an interlayer connection hole with a conductive member. For this reason, it is highly suitable for mounting devices with high heat dissipation effect and high heat generation, such as a high speed CPU. Since no dent occurs, it is possible to form wiring and other vias even over the vias. It is also possible to mount components on surface vias. Therefore, it is possible to improve the mounting density.

4. Differences from the method of applying the insulating resin composition by the curtain coater method

The production method of the present invention is a method of exposing a conductive bump by reducing the film thickness of a film by forming a film by applying a resin compound having a relatively low concentration. For this reason, insulating resin does not remain in a conductive bump front-end | tip part. Therefore, it is possible to form a reliable interlayer connection and to reduce via resistance.

5. In the present invention, vias can be formed even when the top surface shape of the conductive bumps is a gentle arc having a central angle of 180 ° or less. Unlike the conductive bumps having a small area of the head portion used in the conventional method, the cross-sectional area of the vias is large. In addition, the residual amount of the insulating material in the contact portion between the via and the wiring can be reduced. For this reason, the contact area of a via and wiring can be taken large. Thus, it is possible to reduce via resistance.

6. In this invention, a multilayer wiring board is manufactured by laminating | stacking the wiring board member provided with an insulating uncured film. Because of this,

The adhesion strength between the insulating film and the conductive pattern is increased. For this reason, wiring becomes difficult to peel off.

The adhesive strength between adjacent insulating films becomes high. For this reason, it becomes possible to manufacture a firm multilayer wiring board.

The insulating film is flexible. For this reason, unevenness | corrugation exists in a base, and since the coating property is favorable, the surface becomes flat.

The adhesion strength between the conductive bumps and the wirings in contact therewith is increased. For this reason, it is possible to reduce via resistance.

7. By combining the thick film process and the etching process of the conductive thin film, it is possible to reduce the manufacturing cost of the high density multilayer wiring board.

8. A multilayer wiring board with high mounting density can be provided. Therefore, it contributes to miniaturization and multifunctionality of electronic devices.

9. An insulating film is formed by an insulating material having a low dielectric constant and low dielectric loss. For this reason, the mounting wiring board excellent in the electrical signal propagation characteristic can be manufactured. In particular, when the OPE system of ADFLEMA (Namix Co., Ltd.) shown in Claim 17 is used, a dielectric constant and dielectric loss tangent become low. For this reason, the mounting wiring board excellent in the electrical signal propagation characteristic can be manufactured. Moreover, since there is much content of a solvent, a thin insulating film can be formed easily.

10. Wiring and conductive bumps are formed using highly conductive wiring materials. For this reason, the mounting wiring board which is excellent in the electric signal propagation characteristic can be manufactured even if the temperature of heat processing is made low, the wiring film thickness is made thin, and the wiring width is thinned.

11. A multilayer wiring board can be manufactured by batch lamination. For this reason, compared with the method of manufacturing a multilayer wiring board by sequential lamination | stacking, it is possible to reduce the number of manufacturing processes. Therefore, it is possible to reduce manufacturing cost. In addition, the thermal history applied to the wiring board member is small. For this reason, the reliability of a member and the multilayer wiring board formed by these members becomes high.

12. The insulating filler is dispersed in the insulating coating material. Thereby, the wiring connection defective rate, such as a short and an opening resulting from the curvature of a core board | substrate, can be reduced. Therefore, it is possible to improve manufacture yield.

(A)-(d) is sectional drawing of the process sequence which shows the 1st specific example which concerns on embodiment of the manufacturing method of the multilayer wiring board member of this invention.
FIG.2 (a)-(d) are sectional drawing of the process sequence which shows the 2nd specific example which concerns on embodiment of the manufacturing method of the multilayer wiring board member of this invention.
Fig. 3 (a) to (f) are cross-sectional views showing the steps of the third specific example according to the embodiment of the method for producing a multilayer wiring board member of the present invention.
4 (a) to (i) are cross-sectional views showing the steps of the first specific example according to the embodiment of the method for producing a multilayer wiring board of the present invention.
FIG. 5: (a)-(d) is sectional drawing of the process sequence which shows the 2nd specific example which concerns on embodiment of the manufacturing method of the multilayer wiring board of this invention.
FIG. 6: (a) and (b) is sectional drawing of the process sequence which shows 3rd specific example which concerns on embodiment of the manufacturing method of the multilayer wiring board of this invention.
FIG. 7: (a)-(d) is sectional drawing explaining the undercoat process or the top coat process which concerns on embodiment of the manufacturing method of the multilayer wiring board member of this invention, respectively.
8A to 8C are cross-sectional views for comparing a method for manufacturing a multilayer wiring board of the present invention with a method for manufacturing a conventional multilayer wiring board.
9 is a graph showing the dependence of conduction stability on filler presence or absence.
(A)-(c) is a graph which shows the dependence on the filler diameter of the conduction by electroconductive bump. (d) to (f) are graphs showing the conductivity of the conductive bumps and the dependence on the amount of filler added.
11 (a) and (b) are graphs showing the dependence of the film thickness (height) of the conductive bumps or the resistance value on the amount of the thermoplastic resin added to the conductive bumps.
Fig. 12 (a) to (c) are diagrams for explaining the definition of the size parameter according to the multilayer wiring board member of the present invention.
13 is a plan view and a sectional view of a test pattern for via resistance measurement.
14A to 14D are cross sectional views and a perspective view showing a process procedure for manufacturing a conventional multilayer wiring board. (e) is a horizontal sectional view of the upper part of a conductive bump of the conventional multilayer wiring board.
BRIEF DESCRIPTION OF THE DRAWINGS
1,11,21: conductive foil
2,12,22,42: conductive bump
3,13,23,26,43: fluid coating
5,15,27,45: insulating uncured film
4,14,24,44: insulating filler
25: Insulation hardened film which does not reach full hardening
41: support substrate
51,53,57,58,59,60: multilayer wiring board member
52: core substrate
55,61: conductive foil
54,62: Resist Pattern
56,63: wiring
66: multilayer wiring board
71,79: conductive foil
72,73,74,76,77,78: multilayer wiring board member
75: core substrate
80: insulating filler
81,82: Multilayer Wiring Board Member
83: wiring
84: resist pattern
85: wiring board
91, 95,96,100: Core substrate
92,97: insulating uncured film
93,98: insulating filler
94,99: conductive bumps
121,123,125,127,129.133: multilayer wiring board member
122,126,131, 137: core substrate
124,128,134,140: conductive foil
130, 132, 135, 139: conductive bumps
136,138 Insulation uncured film
201,207,208,213,214,219: core wiring board
202,206,209,212,215,218: Wiring
204,211,217: insulating resin layer
205: insulating filler
203,210,216: conductive bumps
221; Conductive bump
222 fluid coating
223: insulating uncured film
231,232 measuring terminal
233: second layer wiring
234: first layer wiring
235: Via
236: insulating film
501,505: conductive foil
502: conductive bump
503,506; Prepreg sheet
508: breaking debris
507: conductive bump surface

EMBODIMENT OF THE INVENTION Hereinafter, the best form of this invention is demonstrated.

(Multilayer wiring board member, multilayer wiring board, composite multilayer wiring board)

In manufacture of a multilayer wiring board, a multilayer wiring board member (wiring board member or simply wiring board member) which is a component which comprises a multilayer wiring board is formed. Thereafter, a plurality of such multilayer wiring board members are laminated and pressed under heating to form a multilayer wiring board. In particular, the multilayer wiring board obtained by laminating | stacking the surface circuit layer containing the multilayer wiring board member with high conductive bump density manufactured by the technique of this invention, and the core substrate with low conductive bump density is called a composite multilayer wiring board. Or the composite multilayer wiring board containing a core board | substrate may only be called a multilayer wiring board in some cases. The core substrate is responsible for the physical rigidity. In addition, circuits such as power supply wiring and ground wiring that are not so fine are formed in the core substrate. Fine wirings are formed on the surface circuit layer of the core substrate. By manufacturing the multilayer wiring board member which comprises a surface circuit layer using the technique of this invention, the composite multilayer wiring board with high mounting density can be formed by combining the thick film process with low manufacturing cost and the etching process of the conductive thin film which can be microfabricated. Can be.

(Batch lamination, sequential lamination, core / core lamination)

A method called batch lamination is a method of manufacturing a multilayer wiring board by forming a multilayer wiring board member with wiring and then laminating and thermally pressing a plurality of multilayer wiring board members at once, or a plurality of multilayer wiring board members and a core substrate at once. It is a method of manufacturing a composite multilayer wiring board by laminating heat press. On the other hand, in the method called sequential lamination, the multilayer wiring board member with or without wiring is formed, and electroconductive foil is stuck on it. After the wirings are formed by etching, the following steps are repeated in which the next multilayer wiring board member is placed thereon and the laminated heat press is performed. Thereby, a multilayer wiring board or a composite multilayer wiring board is manufactured.

Since the batch lamination can reduce the number of steps, it is possible to reduce the manufacturing cost. Moreover, there is little thermal history applied to a wiring board member. For this reason, there exists an advantage that the reliability of a member and the multilayer wiring board formed by these members is high. In the conventional B ² it was difficult to carry out a batch lamination. In the technique of the present invention, the multilayer wiring board can be easily manufactured by batch lamination.

On the other hand, the sequential lamination has the advantage that alignment by wiring patterns is unnecessary, and only the alignment of the conductive bumps needs to be performed. However, every time the multilayer wiring board member is laminated, it is necessary to perform etching or lamination heat press. For this reason, the number of processes increases. Thereby, manufacturing cost is expensive and thermal history increases. For this reason, there exists a problem that the reliability of a member becomes low.

In the core / core lamination, one insulating film is disposed between the core substrate and the core substrate. Then, the conductive bumps are electrically connected between the core substrates.

The method for manufacturing a multilayer wiring board according to the present invention includes batch lamination, sequential lamination and core / core lamination as a modification of the embodiment.

(Method of manufacturing member for wiring board)

In the manufacturing method of the wiring board member which concerns on embodiment of this invention, protrusion-shaped conductive bumps, such as a truncated cone shape or a substantially columnar shape, are used as an interlayer connection member. Moreover, the insulating resin compound liquid is apply | coated on and around the conductive bump (conductive bump group) formed in high density on the support member. Thereby, a fluid film is formed. Thereafter, the solvent is volatilized under conditions in which the resin of the insulating resin mixture is not substantially cured, thereby solidifying the fluid coating film and reducing the film thickness. This fluid film is made into an insulating film.

It has been conventionally considered that if the multilayer wiring board member is laminated and pressed without exposing the conductive bumps, electrical connection between the layers cannot be realized. However, the inventors of the present application have found that exposing the conductive bumps is not essential. In other words, the inventors of the present application laminate the insulating resin that electrically separates the wiring board in a state of uncured coating, and heat press it to produce a multilayer wiring board or a composite multilayer wiring board, and according to this method, the electrical connection between layers. We found for the first time that it is feasible with high stability. It was also confirmed that the electrical connection reliability of the multilayer wiring board or the composite multilayer wiring board manufactured by this method was good. In the multilayer wiring board according to the present invention, the number of steps increases when the conductive bumps are exposed. However, similarly to the case where the conductive bumps are not exposed, it is possible to cope with high-density packaging. Compared with the case where the conductive bumps are exposed, the conduction stability between wirings is further improved. When exposing the conductive bumps, the film thickness of the insulating film is reduced by evaporating at least a part of the solvent of the flowable film. Thereby, the process of protruding the front-end | tip part of the said conductive bump over the said insulating film is added. Simply applying a thin insulating resin compound onto the conductive bumps leaves the resin compound at the tip of the conductive bumps. If the solvent is evaporated after applying the resin compound solution thicker than the height of the conductive bumps, the conductive bumps can be exposed with good reproducibility.

In addition, in this specification, the insulating film before application | coating of a resin compound liquid, but before film thickness reduction is called a fluid coating film. On the other hand, the insulating film after the reduction in the film thickness and before the start of the curing reaction is called an insulating uncured film. This distinguishes both.

In the present invention, unlike the manufacturing method in which the tip of the conductive bump protrudes on the insulating film by penetration such as B ² it, in the step of forming the insulating film around the conductive bump, mechanical pressure is applied to the conductive bump and the insulating film. I do not lose. Therefore, the present invention can cope with the higher density of the conductive bumps in terms of mechanical durability of the insulating coating. In addition, it is possible to reduce the diameter of the bottom surface of the conductive bumps. It is also possible to reduce the aspect ratio of the conductive bumps. For this reason, the design margin of electroconductive bump shape and the margin of manufacturing conditions can be taken large. Therefore, the manufacturing yield of a multilayer wiring board improves.

Here, the multilayer wiring board member of the present invention is characterized by being an insulating uncured film obtained by casting the resin dissolved in the solvent around the bump group to sufficiently wet the conductive bump periphery and then drying / solidifying it. For this reason, it has a close contact structure with electroconductive bump and resin. On the other hand, the conventional, for example, an insulating resin in the B ² it is a solid sheet that evaporation of the solvent commonly called B-stage. In B ² it, the solid sheet is softened by heat to allow the conductive bump to penetrate the sheet. In this method, penetration is perforation by forcible failure. For this reason, a gap may arise around a bump. For this reason, compared with this invention, the adhesive reliability of electroconductive bump and resin is inferior.

(Dispersion of insulating filler)

In order to solve the problem of the interlayer wiring connection defect caused by the bending of the substrate described above, the inventors of the present application have found that it is extremely effective to disperse the insulating filler in the interlayer insulating film of the multilayer substrate.

A multilayer wiring board according to the present invention includes an insulating layer including an electrically conductive bump group formed between a first conductor layer and a second conductor layer and an insulating filler for stabilizing conduction formed around the electrically conductive bump group. It is characterized by. Moreover, it is preferable that the average particle diameter of an insulating filler is 20% or more and 100% or less of the average height of the conductive bump group after lamination | stacking heat press.

Fig. 8A is a sectional view of a multilayer wiring board according to the present invention. The core substrate 201 and the core substrate 207 are laminated via the insulating resin layer 204 in which the insulating filler 205 is dispersed. The wiring on the core substrate 201 side and the wiring on the core substrate 207 side are arranged to face each other. Some wiring regions are electrically connected through the conductive bumps 203. In the core substrate, for example, there is a large deflection of a shape protruding from the center portion. Therefore, the distance between core board | substrates is large in the core board | substrate peripheral part. For this reason, in order to realize the interlayer connection in a board | substrate periphery, a core board | substrate must be made close enough. When the insulating filler is not dispersed, as shown in Fig. 8B, the wiring in the center portion of the substrate is shorted. According to the manufacturing method which concerns on this invention, insulating fillers, such as a silica with few deformation | transformation with respect to pressurization, are disperse | distributed to the insulating resin layer 204. For this reason, as shown to Fig.8 (a), the short circuit of wiring hardly arises also in a board | substrate center part.

As described above, the multilayer wiring board according to the present invention is characterized by comprising an insulating layer including an insulating filler for preventing short circuits as a component. This insulating layer for preventing short circuits not only prevents short circuits between a plurality of conductors, but also does not affect conduction in the vertical direction by conductive bumps used for electrical contact between layers in a multilayer wiring board, and short circuit prevention. In order to secure the thickness of the insulating layer is used for the purpose.

(Thin Film Process and Thick Film Process)

In general, processing techniques used in the manufacture of multilayer wiring boards are classified into thin film processes and thick film processes.

The thin film process is a processing technique centered on a vacuum process or a wet process. As a film formation technique used for a thin film process, vapor deposition, sputtering, CVD, PVD, plating, etc. are mentioned. Moreover, as a pattern formation technique, techniques, such as photolithography and dry etching, are mentioned. Regarding a mounting wiring board called a wiring board or a printed wiring board, a thin film process such as a semiadditive method has been generally used for processing fine wiring / space widths of 50 µm / 50 µm or less. According to this process, processing of a fine pattern is possible. However, this process has a problem that the manufacturing cost is high.

In contrast, the thick film process is typically a processing technique centering on printing such as screen printing. The thick film process is a dry process and a process under air. The thick film process has a feature that the manufacturing cost can be reduced than the thin film process.

For example, in order to manufacture a multilayer wiring board with a high wiring density having a wiring width of 100 µm or less, it is necessary to simultaneously set the bottom diameter of the projected conductive bumps that are interlayer connection vias to 100 µm or less. However, in the manufacturing method which penetrates the prepreg sheet of insulating resin by a conductive bump which is a conventional method, the thickness of the prepreg of image development is 30 micrometers or more at least. In order to stably penetrate the thickness by the conductive bumps, it is necessary to make the height of the conductive bumps about three times or more the thickness of the prepreg. Therefore, in order to reduce the diameter of the conductive bumps, it is necessary to increase the aspect ratio of the conductive bumps, and it is extremely difficult to form fine conductive bumps of 100 mu m or less. Conventionally, in order to realize a high-density wiring board having a via diameter and wiring width of 100 µm or less, a thin film process (for example, formation of a fine wiring pattern according to the semi-additive method), which is generally expensive in manufacturing cost and manufacturing equipment investment, Formation of fine vias by the photo via method was used.

(Organic wiring board)

Generally, a multilayer wiring board is classified into an organic wiring board and an inorganic wiring board by a board | substrate material. This invention aims at the organic wiring board which uses an organic material as a material of an insulating substrate.

(Definition of Terms relating to Insulation Layer and Conductor Layer)

In this specification, the term regarding an insulating layer is defined as follows.

The liquid in which insulating resin was melt | dissolved in the solvent is called "insulating resin compound liquid." After apply | coating this insulating resin compound liquid on a member, the film | membrane obtained by volatilizing a solvent is called "insulating unhardened film." The film obtained by heating this insulating uncured film and curing the resin contained in the insulating uncured film is referred to as an 'insulating film'. The insulating film in the state laminated | stacked on a conductor layer or a core board | substrate is called "insulating layer."

The term "conductor layer" refers to a layer having high conductivity, such as a metal, and includes, for example, a conductor pattern layer, a planarization layer, and a conductor pad layer.

[Multilayer Wiring Board Member According to Embodiment of the Present Invention and Manufacturing Method Thereof]

(1st specific example of manufacturing method of a multilayer wiring board member)

1 (a) to 1 (d) are cross-sectional views showing the steps of the first embodiment according to the embodiment of the method for producing a multilayer wiring board member of the present invention. First, conductive foils 1, such as copper foil, are prepared (FIG. 1 (a)). Next, the conductive bumps 2 are formed at predetermined positions on the conductive foil 1 (FIG. 1B). It is preferable that the shape of the electroconductive bump 2 is a shape where the diameter of the front-end | tip part cross-section is smaller than the diameter of a bottom part, such as a truncated cone shape or a substantially cylindrical shape. The conductive bumps are formed by screen printing of the conductive paste, for example. As an electrically conductive paste used as the material of the electroconductive bump 2, the thing obtained by disperse | distributing metal grain (silver, gold, copper, a solder, etc.) in liquid resin, for example, and mixing a volatile solvent as needed is used. The conductive bumps are printed to have a predetermined shape and a predetermined height. If the required height cannot be obtained in one screen printing, the printing may be repeated while changing the shape of the mask as necessary. Next, the fluid coating film 3 is formed by apply | coating the insulating resin compound liquid which disperse | distributed the insulating filler 4 over and around the electroconductive bump 2 (FIG. 1 (c)). Next, the flowable film 3 is dried to evaporate the solvent. As a result, the insulating uncured film 5 is obtained. Thereby, the wiring board member used as a component of a multilayer wiring board is completed (FIG. 1 (d)). As shown in Fig. 1 (d), in the first specific example, the insulating uncured film 5 is thicker than the height of the conductive bumps 2. This indicates that in the step of FIG. 1 (d), it is not necessary to expose the conductive bumps.

(2nd specific example of manufacturing method of multilayer wiring board member)

FIG.2 (a)-(d) is sectional drawing of the process sequence which shows the 2nd specific example which concerns on embodiment of the manufacturing method of the multilayer wiring board member of this invention. First, conductive foils 11, such as copper foil, are prepared (FIG. 2 (a)). Next, the electroconductive bump 12 is formed in the predetermined position on the electroconductive foil 11 (FIG. 2 (b)). It is preferable to make the shape of the conductive bump 12 into a shape of a truncated tip, or a diameter of the tip end section smaller than the diameter of the bottom part such as a substantially cylindrical shape. The conductive bumps are formed by screen printing of the conductive paste, for example. As an electrically conductive paste used as the material of the electroconductive bump 12, the thing obtained by disperse | distributing metal grains (silver, gold, copper, a solder, etc.) in liquid resin, for example, and mixing a volatile solvent as needed is used. The conductive bumps are printed to have a predetermined shape and a predetermined height. If the required height is not obtained in one screen printing, the printing may be repeated while changing the shape of the mask as necessary. Next, the fluid coating film 13 is formed by apply | coating the insulating resin compound liquid which disperse | distributed the insulating filler 14 on and around the conductive bump 2 (FIG. 2 (c)). Subsequently, the volatile component contained in the fluid coating film 13 is evaporated by a predetermined amount, for example, by heating in a drying furnace. Thereby, the film thickness of the fluidized film 13 is reduced, and the insulating non-hardened film 15 is obtained. Thereby, the wiring board member used as a component of a multilayer wiring board is completed (FIG. 2 (d)). At this time, the film thickness of the flowable film 13 decreases, and as a result, the amount of volatile components contained in the insulating resin mixture and the heating conditions are adjusted so that the tip end of the conductive bump 12 is exposed.

(3rd specific example of manufacturing method of a multilayer wiring board member)

3 (a) to 3 (j) are cross-sectional views of a process sequence showing a third specific example of an embodiment of the method for manufacturing a multilayer wiring board of the present invention. First, conductive foils 21, such as copper foil, are prepared (FIG. 3 (a)). Next, the conductive bumps 22 are formed at predetermined positions on the conductive foils 21 (FIG. 3B). The shape of the conductive bumps 22 is preferably in the shape of a truncated cone, or the shape of the tip end section smaller than the diameter of the bottom, such as a substantially cylindrical shape. The conductive bumps are formed by screen printing of the conductive paste, for example. As an electrically conductive paste used as the material of the electroconductive bump 22, what was obtained by disperse | distributing metal grains (silver, gold, copper, a solder, etc.) in liquid resin, for example, and mixing a volatile solvent as needed is used. The conductive bumps are printed to have a predetermined shape and a predetermined height. If the required height cannot be obtained in one screen printing, the printing may be repeated while changing the shape of the mask as necessary. Next, the fluid coating film 23 is formed by apply | coating the insulating resin compound liquid which disperse | distributed the insulating filler 24 on and around the conductive bump 22 (FIG. 3 (c)). Subsequently, the volatile component contained in the fluid coating film 23 is evaporated by a predetermined amount, for example, by heating in a drying furnace. As a result, the film thickness of the flowable film 23 is reduced to obtain an insulating uncured film 25 (Fig. 3 (d)). At this time, the film thickness of the flowable film 23 decreases, and as a result, the amount of volatile components contained in the insulating resin mixture and the heating conditions are adjusted so that the tip portion of the conductive bump 22 is exposed. By the heating in the film thickness reducing step, the fluidity of the insulating uncured coating 23 changes. As a result, an insulating coating 25 is formed. Although the hardening reaction starts, the heating conditions of the insulating film 25 are adjusted to the extent which does not reach complete hardening. Thereby, handling of a wiring board at the time of forming a conductive pattern on a back surface becomes easy, without degrading adhesiveness at the time of laminating an insulating film. Next, the protective film 25 is formed by lamination on the insulating film 34 and the conductive bump 22 in which the film thickness was reduced (FIG. 3 (e)). The protective film 26 is made of an organic resin film (for example, krewrap, pylen, nylon, PET, PPT, or PI) recessed by the tip of the conductive bump 22. The protective film 25 is formed in order to protect the conductive bumps 22 from deformation and damage at the time of printing the conductive pattern on the back surface which is a subsequent step. Next, a resist pattern is formed on the electroconductive foil 21 of the back surface of the insulating film 25 by the photolithography method, for example. Next, the conductive foil 21 is etched by wet etching using the resist pattern as a mask. Thereby, the resist pattern is removed, the wiring 27 is formed, and the protective film 25 is peeled (FIG. 3 (g)). Subsequently, the insulating resin compound is applied onto and around the conductive bumps 22 to form a fluid coating 28 (FIG. 3 (h)). Subsequently, the volatile component contained in the fluid coating film 28 is evaporated by a predetermined amount, for example, by heating in a drying furnace. As a result, the film thickness of the flowable film 28 is reduced to obtain an insulating uncured film 29. Thereby, a wiring board member is completed (FIG. 3 (i)). The insulating coating 29 is an uncured coating. For this reason, the adhesiveness of the insulating film 29 and the member laminated | stacked so that it may contact the insulating film 29 improves.

[Detailed explanation on manufacturing method, materials, etc.]

EMBODIMENT OF THE INVENTION Hereinafter, the manufacturing method, material, etc. which are very suitable regarding the conductive bump, insulating film, and wiring which comprise the multilayer wiring board member which concern on embodiment of this invention are demonstrated in detail.

[Manufacturing method]

(Formation of conductive bumps)

1. Adjusting process of conductive paste

The electrically conductive paste used is adjusted by melt | dissolving or disperse | distributing a resin composition and electroconductive particle in a solvent.

2. Printing and drying / solidifying process of conductive paste

The conductive bumps are formed using screen printing, for example. That is, the conductive bumps are formed by printing the conductive paste on the wiring board or the supporting substrate using a predetermined mask. In order to form the conductive bumps having a predetermined height and aspect ratio, printing may be performed several times while using different masks as necessary.

(Formation of insulating film)

1. Preparation process of insulating resin mixture

The insulating resin compound is adjusted by dissolving or dispersing the thermosetting resin composition in a solvent. As the solvent, for example, an organic solvent is used. Examples of the organic solvent include ketone solvents and aromatic solvents. For example, methyl ethyl ketone and methyl isobutyl ketone are the former, and toluene and xylene are the latter.

At the same time, the insulating filler is dispersed in the solvent. It is preferable to disperse an insulating filler uniformly in a solvent. It is preferable that the addition amount of the insulating filler with respect to the insulating resin composition shall be 10 Pa% or more.

About the usage-amount of a solvent, in order to expose an electrically conductive bump suitably by evaporation of a solvent, it is preferable to adjust so that content of the volatile component in insulating resin compound liquid may become an appropriate range. For example, it is preferable to dilute resin with a solvent so that N.V. (content of a nonvolatile resin component) may be in the range of 10 weight%-80 weight%. Moreover, it is preferable to make the viscosity of an insulating resin compound liquid into the range of 100-600 mPa * S. If the viscosity is too small, a problem arises in that the resin compound can not be applied because the resin compound flows during the application of the resin compound. If the viscosity is too large, there arises a problem that the flatness of the coating surface is poor.

Epoxy resins and oligophenylene ether resins used for the production of an insulating coating of a multilayer wiring board according to the present invention are both solid at ordinary temperatures and resins exhibiting thermosoftening properties at temperatures up to about 100 ° C. The resin compound liquid (liquid) is obtained by melt | dissolving or disperse | distributing a solid material in powder or film form in a solvent, and heating as needed. After apply | coating a resin compound liquid to a board | substrate, it dries and returns to normal temperature. Thereby, a resin compound liquid changes to a film (solid). In the manufacture of the multilayer wiring board according to the present invention, in particular, it is preferable to use a combination of a solvent and a resin such that the drying / solidification temperature stays in the range of 60 ° C. or higher and 160 ° C. or lower.

2. Coating Process of Insulating Resin Mixture

An insulating film is formed by coating the obtained insulating resin compound on a support having conductive bumps. The coating method is not particularly limited. For example, it is preferable to use a doctor blade method, a curtain coater method, a microgravure method, and a slot die method. Moreover, in a coating process, it is preferable to coat an insulating film thicker than the height of an electroconductive bump. After coating thicker than the height of the conductive bumps, and reducing the thickness of the insulating film until it becomes thinner than the height of the conductive bumps, the conductive bumps can be uniformly exposed with good reproducibility.

3. Solvent evaporation process

The solvent evaporation process is not necessarily performed in producing the multilayer wiring board member according to the present invention. However, compared with the case where solvent evaporation is not performed, it is possible to obtain higher wiring connection stability. Specifically, the volatile components in the insulating film are evaporated by heating or naturally drying the coated insulating film. This reduces the film thickness of the insulating film. It is necessary to adjust the processing time with respect to predetermined temperature suitably according to the kind of solvent, exhaust wind speed of a dryer, air volume, etc. For example, the processing time for a predetermined temperature is set at about 80 to 120 ° C. and about 1 to 30 minutes.

(Laminated heat press)

In the case of batch lamination, a plurality of wiring board members and a core substrate are laminated while being aligned as necessary. Thereafter, these are pressed under heating to form a multilayer wiring board. On the other hand, in the case of sequential lamination, heat press is performed while laminating | stacking several wiring board members one by one with respect to a core board | substrate. It is preferable to set heating conditions to below the heat-resistant temperature of the thermosetting resin which comprises a multilayer wiring board, and to the temperature which this thermosetting resin fully hardens. The conditions of the hot press can be appropriately set. Although heating temperature is below the curing reaction start temperature of insulating resin, it is preferable to set it as the temperature above which a heat melting viscosity falls. Moreover, even if an insulating filler exists on an electroconductive bump, the conditions of a hot press are conditions in which a crack does not generate | occur | produce in an electroconductive bump in a laminated heat press process and can fully ensure an electrical connection. For example, this condition may be temperature 170-210 degreeC, and the actual pressure 5-15 kgf / cm <^2> . In this laminated heat press, the minimum melt viscosity of an uncured film can be made relatively high. For this reason, resin does not flow in a hot press. Therefore, the thickness of resin before and after hardening can be made substantially constant. Moreover, the uniformity of the thickness of resin after hardening can be made favorable.

[material]

(Conductive bump material)

As a resin composition which comprises an electrically conductive paste, it is preferable to use thermosetting resins, such as a phenol resin, an epoxy resin, and a melamine resin, for example. Since the thermosetting resin is fluid, it can be easily molded. Therefore, it is possible to make the thermosetting resin have mechanical strength by heat curing the thermosetting resin in a subsequent step.

As a solvent which melt | dissolves or disperses a resin composition, an organic solvent is used, for example. Examples of the organic solvent include aromatic solvents such as toluene, xylene, and ketone solvents. As a ketone solvent, methyl ethyl ketone and methyl isobutyl ketone are mentioned, for example. As electroconductive particle disperse | distributing in a resin compound liquid, it is preferable to use any of Ag, Cu, Au, and Ni, or what mixed at least 2 or more of them, or these compounds.

Moreover, as a material of the resin composition which comprises an electroconductive bump, it is preferable to use the material obtained by adding a thermoplastic resin to the said thermosetting resin by the mixing ratio of 10 weight% or more and 30 weight% or less. In the lamination heat press process of a multilayer wiring board, the effect which suppresses the crack generation in an electroconductive bump can be acquired.

(Insulating coating material)

In recent years, in order to transmit a large amount of information at high speed, the speed of the operating frequency of the electronic device is increasing every year. As for the multilayer wiring board mounted on the electronic device, it is required to use a material having a low dielectric constant and low dielectric loss as the material of the insulating coating constituting the wiring board.

In addition, with the miniaturization and thinning of electronic devices, thinning of wiring boards is required. Therefore, it is preferable that the material of an insulating film is a material which has high reproducibility and can form a thin insulating film. Moreover, in order to reduce manufacturing cost, even when using a thick film process, it is preferable to use the material which can be made thin.

As a material of the insulating member in the manufacture of the multilayer wiring board of the present invention, it is preferable to use a thermosetting resin having a low relative dielectric constant and a dielectric loss tangent. For example, an epoxy resin, a bismaleimide triazine resin, a polyimide resin, an acrylic resin , Phenol resin, oligophenylene ether resin, polyether resin, melamine resin is preferable.

As the material of the thermosetting resin, a material that satisfies either the relative dielectric constant after curing is in the range of 2.0 to 3.0 at 5 GHz, or the dielectric tangent is in the range of 0.001 to 0.005 at 5 GHz. It is preferable.

<Epoxy resin>

Moreover, as said thermosetting resin composition, the epoxy resin composition of international publication 2005/100435 can also be used suitably. Specifically, this epoxy resin composition esterifies at least a portion of a straight chain epoxy resin (A) having a weight average molecular weight of 1,500 to 70,000 having at least one hydroxyl group and at least two epoxy groups, and a phenolic hydroxyl group with a fatty acid. It contains the modified phenol novolak (B) obtained by making. Moreover, in this epoxy resin composition, content of the said modified phenol novolak (B) is 30-200 weight part with respect to 100 weight part of said linear epoxy resins (A). This epoxy resin composition is excellent in dielectric properties (for example, low dielectric constant and low dielectric loss tangent).

The weight average molecular weight of linear epoxy resin (A) is 1,500-70,000.

The number average molecular weight of the linear epoxy resin (A) is preferably 3,700 to 74,000, more preferably 5,500 to 26,000.

It is preferable that the epoxy equivalent of linear epoxy resin (A) is 5000 g / eq or more.

In addition, the weight average molecular weight and number average molecular weight in this specification are the values which used the analytical curve by standard polystyrene by the gel permeation chromatography method (GPC).

In especially preferable linear epoxy resin (A), a weight average molecular weight / number average molecular weight exists in the range of 2-3.

As a linear epoxy resin (A), the compound specifically, shown by following formula (1) is preferable, for example, and the compound shown by following formula (2) is more preferable.

[Tue 1]

In the formula, X and Y are each a single bond, a hydrocarbon group, -O group having 1 to 7 - CO- or a group represented of the following formula -, - S -, - SO ₂ -,. When there are several X and Y, these may be same or different.

[Tue 2]

Here, in said formula, R <^2> is a C1-C10 hydrocarbon group or halogen atom. When there are several R <^2> , these may be same or different. R <^3> is a hydrogen atom, a C1-C10 hydrocarbon group, or a halogen atom. q is an integer of 0-5.

In said formula (1)-(2), R <^1> and R <^4> is a C1-C10 hydrocarbon group or halogen atom, respectively. When there are several R <^1> and R <^4> , these may be same or different.

p and s are integers of 0-4, respectively. These may be same or different.

In said formula (1), n has shown the average value. This n is 25-500.

In said formula (2), t has shown the average value. This t is 10-250.

It is more preferable that linear epoxy resin (A) is a compound whose p in said Formula (1) is 0, ie, a compound represented by Formula (1 ').

[Tue 3]

In said formula, X and n are the same as X and n in said Formula (1), respectively.

The linear epoxy resin (A) described above may be used alone. Moreover, 2 or more types of linear epoxy resins (A) may be used together.

As a very suitable example of the modified phenol novolak (B) obtained by fatty acid esterifying at least a part of the phenolic hydroxy group, for example, a modified phenol novolak represented by the following formula (3) can be mentioned.

[Tue 4]

In said formula (3), R <^5> represents a C1-C5 alkyl group. R ⁵ is preferably a methyl group. Some R <^5> may be same or different.

R ⁶ represents an alkyl group having 1 to 5 carbon atoms, a phenyl group which may have a substituent, an aralkyl group which may have a substituent, an alkoxy group or a halogen atom. Some R <^6> may be same or different.

R ⁷ represents an alkyl group having 1 to 5 carbon atoms, a phenyl group which may have a substituent, an aralkyl group which may have a substituent, an alkoxy group or a halogen atom. Some R <^7> may be same or different.

g has shown the integer of 0-3. The plurality of g may be the same or different.

h represents the integer of 0-3. The plurality of h may be the same or different.

n: m is 1: 1 to 1.2: 1 and it is preferable that it is about 1: 1.

The sum of n and m can be 2-4, for example.

N and m in said Formula (3) are average values of a repeating unit. The order of repeating units is not limited. This order may be block or random.

As a preferable modified phenol novolak (B), the modified phenol novolak represented by following formula (3 ') is mentioned.

[Tue 5]

In the formula (3 '), R ^5, n and m are each the same as R ^5, n and m in the formula (3).

Especially preferable modified phenol novolak is acetylated phenol novolak whose R <^5> in the said Formula (3 ') is a methyl group.

Such modified phenol novolacs may be used alone. Moreover, you may use together 2 or more types of modified phenol novolaks.

It is preferable that content of the said (B) component is 30-200 weight part with respect to 100 weight part of said (A) component. If the content of the component (B) is within this range, the dielectric properties, film formability and curing reactivity are excellent. As for content of the said (B) component, it is more preferable that it is 50-180 weight part with respect to 100 weight part of said (A) component.

One of the preferable aspects in the said epoxy resin composition contains (C) isocyanate compound further. When there is a hydroxyl group in the epoxy resin, the hydroxyl group or the hydroxyl group generated when the epoxy resin is ring-opened reacts with the isocyanate group in the isocyanate compound. As a result, a urethane bond is formed. For this reason, the polymer crosslinking density after hardening rises, the mobility of a molecule | numerator falls further, and the hydroxyl group with large polarity reduces. For this reason, the dielectric constant can be made lower and the dielectric loss tangent can be made lower. Moreover, epoxy resins have a large intermolecular force. For this reason, when forming an epoxy resin, it is difficult to make film formation uniform. Moreover, even if an epoxy resin is formed into a film, film strength is weak and there exists a tendency for a crack to enter easily at the time of film formation. However, by blending an isocyanate compound, this drawback can be eliminated.

As said isocyanate compound, the compound which has two or more isocyanate groups is mentioned. For example, hexamethylene diisocyanate, diphenyl methane diisocyanate, tolylene diisocyanate, isophorone diisocyanate, dicyclohexyl methane diisocyanate, tetra methyl xylene diisocyanate, xylene diisocyanate, naphthalene diisocyanate, Trimethyl hexamethylene diisocyanate, tolidine diisocyanate, p-phenylene diisocyanate, cyclohexylene diisocyanate, dimer acid diisocyanate, hydroxylene diisocyanate, lysine diisocyanate, triphenyl methane triisocyanate, tri (isocyanate phenyl) tri Phosphate etc. are mentioned. These may be used alone. Moreover, you may use together 2 or more types of said isocyanate compounds.

Among these, it is preferable to use hexamethylene diisocyanate and diphenyl methane diisocyanate.

In addition, the isocyanate compound includes a prepolymer having an isocyanurate ring formed by a cyclization reaction. For example, the prepolymer containing the trimer of an isocyanate compound is also included.

It is preferable to use the said isocyanate compound especially in combination with the linear epoxy resin (A) mentioned above. In this case, in addition to the reaction between the hydroxyl group and the isocyanate group produced by the ring opening reaction of the epoxy resin, the hydroxyl group and the isocyanate group present in the linear epoxy resin (A) can react. For this reason, a larger effect can be obtained.

It is preferable that content of the said (C) component with respect to 100 weight part of said (A) component is 100-400 weight part, and, as for content of the said (C) component, it is more preferable that it is 300-350 weight part. If content of (C) component is this range, foaming at the time of hardening is suppressed. For this reason, it is easy to obtain a uniform film, it is hard to produce a crack after hardening, and it is excellent also in dielectric properties (for example, low dielectric constant, low dielectric loss tangent).

One of the preferred embodiments of the epoxy resin composition further contains (D) divinyl benzene. Inclusion of divinyl benzene contributes to the lowering of the dissolution temperature of the crosslinking component, the improvement of the fluidity during molding, the lowering of the curing temperature, and the improvement of compatibility.

It is preferable that content of the said (D) component is 40-180 weight part with respect to 100 weight part of said (A) component.

The epoxy resin composition may contain a curing accelerator as an optional component.

As a hardening accelerator, a well-known thing can be used as a hardening accelerator of an epoxy resin composition. As a hardening accelerator, phosphorus compounds, such as heterocyclic compound imidazole, such as 2-methyl imidazole and 2-ethyl-4-methyl imidazole, triphenyl phosphine, tetraphenyl phosphonium tetraphenyl borate, 2 Tertiary amines such as 4,6-tris (dimethylaminomethyl) phenol, benzyl dimethyl amine, BBUs such as 1,8-diazabicyclo (5,4,0) undecene and salts thereof, amines, Adduct-type accelerators which adducted polyazoles with epoxy, urea, an acid, etc. are mentioned.

It is preferable that content of the hardening accelerator with respect to 100 weight part of said (A) component is 1-10 weight part.

The epoxy resin composition may contain a polymerization initiator as an optional component.

As a polymerization initiator, a well-known polymerization initiator can be used. Examples of the polymerization initiator include benzoyl peroxide, azobis isobutylonitrile, t-butyl paoxy benzoate, 1,1,3,3-tetramethyl butyl peroxy-2-ethylhexanoate and the like. have.

It is preferable that content of a polymerization initiator is 1-10 weight part with respect to 100 weight part of said (A) component.

The said epoxy resin composition may contain additives, such as a tackifier, a flame retardant, an antifoamer, a flow regulator, and a dispersing aid, as needed.

Moreover, the said epoxy resin composition is a range which does not impair the objective of this invention, for the purpose of the improvement of an elastic modulus, the fall of an expansion coefficient, or a change of glass transition temperature (Tg value), etc., if necessary, (A) You may contain epoxy resins other than a component.

Examples of the epoxy resins other than the component (A) include bisphenol A type epoxy resins, bisphenol F type epoxy resins, alicyclic epoxy resins, and biphenyl epoxy resins. These may be used independently and may use 2 or more types of epoxy resin together.

Moreover, the said epoxy resin composition may contain well-known epoxy resin hardening | curing agents, such as phenol novolak, cresol novolak resin, and phenol polynuclear body which are not fatty-acid esterified in the range which does not impair the objective of this invention.

As a phenol polynuclear body, phenols, such as about 3-5 nucleus, are mentioned, for example.

The said epoxy resin composition can be manufactured by a well-known method. For example, in the presence or absence of a solvent, it is possible to mix (A) and (B) with a propeller stirrer, a Banbury mixer, a planetary mixer, a heating vacuum mixing kneader or the like.

For example, a resin component can be melt | dissolved in predetermined solvent concentration, a predetermined amount is put into the reaction pot heated at 25-60 degreeC, and atmospheric pressure mixing can be performed for 30 minutes-6 hours. After that, the mixture can be further stirred under vacuum (maximum 1 Torr) for 5 minutes to 60 minutes.

<OPE resin>

In addition, as the thermosetting resin composition, an oligophenylene ether resin compound can also be suitably used. Specifically, (A) component is oligophenylene ether which has a functional group in both terminal which is a thermosetting number average molecular weight 1000 or more and 3000 or less. The component (B) is a block copolymer comprising a hard segment block portion mainly composed of vinyl aromatic hydrocarbons and a soft segment block portion mainly composed of a conjugated diene, and further cured the solvent of the insulating resin mixture containing the solvent. And oligophenylene ether-based resin blends obtained by volatilizing so that no reaction occurs.

Here, in the said insulating resin compounding liquid, (B) component is 67-150 parts with respect to 100 parts of (A) component. Furthermore, the (B) component of the insulating uncured coating may include at least one thermoplastic elastomer selected from rubber and / or styrene-butadiene-styrene block copolymers, styrene-isoprene-styrene block copolymers, styrene-ethylene / butadiene-styrene copolymers to be.

Examples of the thermosetting resin used in the thermosetting resin composition include thermosetting oligophenylene ether resins or epoxy resins having functional groups such as styrene functional groups, vinyl groups, glycidyl groups, amino groups, hydroxyl groups, and carboxyl groups at both ends thereof. Can be mentioned. Among these, thermosetting oligophenylene ether resins or epoxy resins having styrene functional groups at both ends are preferable because they are excellent in dielectric properties (for example, low dielectric constant, low dielectric loss tangent), low water absorption, and coating film formation.

It is preferable that the said thermosetting resin composition is an oligo phenylene ether resin composition as described in the specification of Unexamined-Japanese-Patent No. 2006-215464 for which the applicant of this application filed previously. Specifically, For example, the thermosetting oligophenylene ether (A) which has a styrene functional group in both terminal of 100 weight part number average molecular weights 500-5000, and a repeating unit derived from a 50-250 weight part vinyl aromatic hydrocarbon monomer, and Since the thermosetting resin composition containing the block copolymer (B) containing a repeating unit derived from a conjugated diene monomer is excellent in dielectric properties (for example, low dielectric constant, low dielectric loss tangent), low elasticity and coating film formation, Very suitable.

As said thermosetting oligo phenylene ether (A), 2,2 ', 3,3', 5,5'-hexamethyl biphenyl-4,4'- diol as described, for example in Unexamined-Japanese-Patent No. 2006-28111. And reaction products of -2,6-dimethyl phenol polycondensates with chloromethyl styrene.

Such thermosetting oligo phenylene ether (A) can be manufactured by a well-known method. Moreover, a commercial item can also be used. For example, OPE-2st 2200 (made by Mitsubishi Gas Chemical Co., Ltd.) can be used suitably.

If the number average molecular weight exceeds 5,000, a thermosetting oligophenylene ether (A) will become difficult to melt | dissolve in a volatile solvent. On the other hand, when the number average molecular weight is less than 500, the crosslinking density becomes too high, which adversely affects the elastic modulus and the availability of the cured product. Therefore, the number average molecular weight of a thermosetting oligophenylene ether (A) is 500-5,000, and it is preferable that it is 1,000-3,000.

The block copolymer (B) is a block copolymer comprising a hard segment block portion mainly composed of vinyl aromatic hydrocarbons and a soft segment block portion mainly composed of conjugated dienes.

Examples of the block copolymer (B) include styrene-butadiene-styrene block copolymers, styrene-isoprene-styrene block copolymers, styrene-ethylene / butadiene-styrene block copolymers, and the like.

The block copolymer (B) can be produced by a known method. Moreover, a commercial item can also be used. For example, TR2003 (product of JSR Corporation) can be used suitably.

Content of the block copolymer (B) in the said thermosetting resin composition is 50-250 weight part with respect to 100 weight part of thermosetting oligophenylene ethers (A), It is preferable that it is 65-200 weight part, It is 80-150 weight It is more preferable to deny it. If content of a block copolymer (B) is this range, compatibility with a film formation ability and a thermosetting oligophenylene ether (A) will improve.

As a volatile solvent used for the said oligo phenylene ether resin composition, aromatic solvents, such as toluene and xylene, ketone solvents, such as methyl ethyl ketone and methyl isobutyl ketone, etc. are mentioned, for example. You may use these individually by 1 type. You may use together 2 or more types of volatile solvents.

Content of a volatile solvent may be suitably adjusted so that the viscosity of a composition may become the said range, and it is not specifically limited. It is preferable to be used so that a volatile solvent may be 15 to 45 weight%, and it is more preferable to use so that it may be 15 to 35 weight%. If the ratio of the resin component in a composition is this range, it will become easy to impregnate a fibrous base material. For this reason, bubbles can be reduced. In such a low concentration of the resin, the varnish deposition amount must be increased in order to obtain a desired resin adhesion amount in the conventional vertical impregnation apparatus. As a result, the impregnated resin sags when the substrate proceeds in the vertical direction. For this reason, uneven vertical stripes are formed, and therefore, unsightly resin stains are formed. In addition, although the solvent remains inside the coating film, a phenomenon occurs that only the surface is dried. For this reason, a uniform uncured state cannot be obtained.

The oligophenylene ether resin composition may contain additives such as an inorganic filler, a tackifier, a flame retardant, an antifoaming agent, a flow regulator, a film forming aid, and a dispersing aid within a range that does not impair the effects of the present invention.

In addition, the oligophenylene ether resin composition may contain a curing catalyst. The oligophenylene ether resin composition may be cured only by heating.

The manufacturing method of the said oligo phenylene ether resin composition is not specifically limited, A well-known manufacturing method may be sufficient. The said oligo phenylene ether resin composition can be manufactured by fully mixing each component mentioned above with a stirrer, for example.

<ADFLEMA>

As insulating resin, it is preferable to use ADFLEMA (NAMIX Co., Ltd. brand name), for example. ADFLEMA is a resin containing oligophenylene ether, which is one kind of OPE resin, and an styrene butadiene-based elastomer. ADFLEMA products are uncured films. However, the relative dielectric constant and dielectric loss tangent (epsilon) = 2.0-3.0 and dielectric loss tangent tan (delta) = 0.001-0.005 when it heat-sets are all small values. Because of this, ADFLEMA products have excellent high frequency characteristics. In addition, in ADFLEMA products, it is possible to form a thin film having a thickness of about 2 ~ 90㎛. ADFLEMA products also contain about 70% volatile solvents. For this reason, by coating and heating or drying, the film thickness of ADFLEMA products can be reduced, for example, by 70%. Accordingly, ADFLEMA products are well suited for the manufacture of multilayer wiring boards of the present invention which include the step of exposing conductive bumps by film thickness reduction.

<Fiber base material contained in insulating resin>

It is preferable that the insulating resin used for the member for multilayer wiring boards of this invention does not contain a fiber base material. In this case, since the insulating resin compounding liquid does not contain a fiber base material, it is possible to reduce the viscosity of the compounding liquid. For this reason, the coating | cover property to the periphery bumps and the surface of a board | substrate becomes high. Moreover, in the film thickness reduction process, the residue of the compounding liquid in the head part of an electroconductive bump can be reduced. On the other hand, when fiber base materials, such as glass fiber chopped, are mix | blended with an insulating resin compounding liquid, it is extremely difficult to obtain a uniform dispersion slurry. In addition, even if it has occurred, it is inevitable that, at the time of application, the formation of a bridge of fiber pumped on top of the conductive bumps. In addition, the introduction of a glass fiber substrate having poor dielectric properties is incompatible with the effect obtained by the present invention.

<Insulating filler>

The insulating filler used for the multilayer wiring board member of the present invention has high electrical insulation properties, is not deformed by laminated heat press, has a strength capable of maintaining the interlayer insulation of the multilayer wiring board, and is uniformly applied to the solvent. It is preferable that it is formed from the material to disperse. As the material of the insulating filler, for example, one or more materials selected from silica, silicon carbide, alumina, aluminum nitride, zirconia beads, glass beads, and acrylic beads are preferable.

It is preferable that an insulating filler is powder or particulate form. The average particle diameter of the insulating filler is 20% or more of the conductive bump height, preferably 100% or less, and preferably 50% or less of the bottom diameter of the conductive bumps.

(Wiring material)

Concerning the wiring of the multilayer wiring board, the conductive pattern may be formed by etching the conductive foil, or the conductive pattern may be formed by printing the conductive paste.

As a resin composition which comprises a electrically conductive paste, it is preferable to use thermosetting resins, such as a phenol resin, an epoxy resin, and a melamine resin, for example. The thermosetting resin has fluidity, can be easily molded, and can be made to have mechanical strength by heating and curing in a subsequent step.

As a solvent which melt | dissolves or disperses a resin composition, an organic solvent is used, for example. Examples of the organic solvent include aromatic solvents such as toluene, xylene, and ketone solvents. As a ketone solvent, methyl ethyl ketone and methyl isobutyl ketone are mentioned, for example. As electroconductive particle disperse | distributing in a resin compound liquid, it is preferable to use any of Ag, Cu, Au, and Ni, or what mixed at least 2 or more of them, or those compounds.

The electrically conductive paste disperse | distributes electroconductive particle (for example, any of Ag, Cu, Au, Ni, or what mixed at least 2 or more of them) in resin, for example, and mixes a volatile solvent further It can obtain by preparing what was made.

<Thermal Curing Conductive Paste>

In addition, a thermosetting conductive paste may be used as the wiring material. In this case, it is possible to form wiring with sufficiently low resistance even at low temperature heat treatment at 100 to 200 ° C. When using a thermosetting electrically conductive paste, it is preferable to make thickness of wiring into the range of 1-20 micrometers.

<Conductive Paste Containing Silver Fine Particles>

Moreover, you may use the electrically conductive paste disclosed by patent document 3 as a material of an electrically conductive paste. The electrically conductive paste (material) containing silver fine particles disclosed by patent document 3 mixes silver salt of carboxylic acid and an aliphatic amine in presence or absence of an organic solvent, adds a reducing agent, and reacts at reaction temperature of 20-80 degreeC. It is an electrically conductive paste collect | recovered from the reaction material obtained by making it.

Silver fine particles contained in a conductive paste,

(a) the average particle diameter of the primary particles is 40-350 nm,

(b) the crystallite diameter is 20-70 nm, and

(c) It is preferable that ratio of the average particle diameter with respect to a crystalline diameter is 1-5.

In addition, the silver fine particles contained in the conductive paste,

(a) the average particle diameter of primary particles is 50-80 nm,

(b) the crystallite diameter is 20-50 nm, and

(c) It is more preferable that ratio of the average particle diameter with respect to a crystalline diameter is 1-4.

This electrically conductive paste material shows sufficiently large electroconductivity also in the low temperature heat processing of 200 degrees C or less. This conductive paste material can be cured even at a low temperature below the heat resistant temperature of the organic wiring board, and can form a conductive pattern having a relatively low conductor resistance (about 10 × 10 ⁻⁵ Ω · cm or less) despite the low temperature curing. Therefore, it is possible to suppress or reduce the increase in the wiring delay even if the thickness of the wiring is reduced and the wiring width is made thin. Since the particle diameter is small, clogging is unlikely to occur even when screen-printing thin wires. The particle diameter of this electrically conductive paste material is large compared with the particle diameter of the electrically conductive paste (for example, electrically conductive paste containing nanoparticles) containing other electroconductive fine particles. For this reason, this electrically conductive paste material is suitable for forming the wiring of a film thickness of 1 micrometer-10 micrometers. Moreover, by using this electrically conductive paste material, it is possible to suppress material cost lower. When using the electrically conductive paste disclosed by patent document 3, it is preferable to make the thickness of wiring into 5 micrometers or less.

[Hardness degree]

(Hardening degree of conductive bump)

In the intermediate | middle stage of a manufacturing process, the hardening state of the conductive bump and insulating film which comprise a multilayer wiring board member can be selected from the following combinations.

(1) Conductive bumps: fully cured state, insulating film: uncured state

(2) Conductive bumps: intermediate state between uncured and complete curing, insulating film: uncured state

 Here, the "intermediate state between uncured and fully hardened" is a resin state which is hardened to some extent by appropriate heat treatment, but does not seem to have reached complete hardening.

Softened by the insulating film in the insulating film generally called B-stage curing state in the conventional technique column B ² it was and passing through the conductive bumps thereto. In this technique, vias are formed by penetration of conductive bumps. For this reason, an electroconductive bump requires the aspect ratio more than a predetermined value. In addition, the conductive bumps need to have a hardness of a predetermined value or more. For this reason, it was necessary to make electroconductive bump into a fully hardened state.

However, the technique of the present invention does not penetrate the conductive bumps. In this technique, an insulating coating is formed on the conductive bumps, the film thickness of the insulating coating is reduced, and an insulating uncured coating is formed. Thereafter, the conductive bumps and the second conductor layer or core substrate are bonded. For this reason, the hardness of an electroconductive bump does not need to be the hardness of the grade required for the penetration method. The hardness of the conductive bumps is sufficient if the shape can be maintained to some extent. The hardness of the conductive bumps can be arbitrarily set to a state between fully cured or uncured and fully cured. In addition, in the present invention, the insulating uncured coating is uncured, and strictly speaking, at least the surface of the insulating uncured coating is uncured. The hardness of each member can be controlled at any hardness by controlling the treatment temperature or the treatment time in a process such as drying or heating after printing or application. Optimum conditions, such as temperature and time, change with materials of a member. The optimum conditions for each specific material may be obtained by experiment or the like in advance.

Examples of the hardness of the specific conductive bumps are shown below.

In order to penetrate the prepreg, the conventional conductive bumps were required to be in a fully cured state at the stage of the penetrating process (temperature conditions of 80 ° C to 120 ° C). The hardness of the conductive bumps was required to be 35 to 40.

According to the technique of the present invention, when setting the conductive bump to an intermediate state between uncured and fully cured, for example, the conductive bump made of a material having a glass transition temperature between 110 and 140 ° C. is used, and the hardness is 15 to 30.

The effect of bringing the conductive bumps into an intermediate state between uncured and fully cured is as follows.

1. The adhesion between the conductive bumps and the wiring patterns in contact with the conductive bumps and the conductivity are superior to those in which the conductive bumps are completely cured. When the conductive bumps are not in a fully cured state, plastic deformation of the conductive bumps is likely to occur under predetermined heating conditions in the lamination press step. Therefore, the adhesiveness of the conductive bump and the wiring member in contact with the conductive bump is improved. At the same time, since the contact area becomes large, the via resistance is reduced and the reliability of the electrical connection is improved. At the same time, the binder component in the conductive paste forming the conductive bumps is compressed and pushed into the insulating uncured film. For this reason, the coupling | bonding of the electrically-conductive particle disperse | distributed in electrically conductive paste and the wiring member which contacts an electrically conductive bump becomes strong. For this reason, the conductive particles are densified. By the subsequent shrinkage, the conductive particles in the conductive bumps are rearranged, and as a result, the effect that the conductivity is further improved is obtained.

2. In the lamination press process, it becomes possible to form a multilayer wiring board with a press pressure much less than before. Therefore, the distortion which arises in a member becomes small. For this reason, the reliability of a member improves.

3. The production method of the present invention forms an insulating uncured coating by reducing the thickness of the insulating resin mixture. Thereafter, the conductive bumps and the second conductor layer or core substrate are bonded. For this reason, the force which seems to penetrate the prepreg like the conventional one is not applied to a conductive bump. Moreover, by setting the drying / solidification temperature condition of film thickness reduction to the range which does not affect the hardening state of an electroconductive bump, the shape immediately after printing in an electroconductive bump is stably maintained as it is.

4. In the case where the conductive bumps and the wiring pattern are brought into close contact with each other, the tip of the conductive bumps are plastically deformed smoothly.

The hardness of the said conductive bump was measured by the microhardness MXT50 (Matsuzawa Co., Ltd.) at the test temperature of 23 degreeC, test load 25Kgf, and load holding time of 15 second.

(Hardening degree of insulating film)

In the manufacturing method of the multilayer wiring board of this invention, in the intermediate process, the insulating film formed around an electroconductive bump becomes a state before hardening called "uncured." And in a hot press process, it is preferable to control heating conditions so that an insulating film may be in a state called "complete hardening" or "hardening."

The epoxy resin system or OPE resin system which is very suitable as a material of the insulating film in the multilayer wiring board member of this invention specifically refers to the material of Paragraph (0026) or (0027) of this specification of this specification. In the case where the insulating coating is an epoxy resin system, under the heating conditions in the range of 130 to 180 ° C. for 10 minutes to 1 hour, the insulating coating becomes a degree of curing between 'uncured' and 'fully cured'. In the case where the insulating coating is an oligophenylene ether resin system, under the heating conditions in the range of 130 to 200 ° C. for 10 minutes to 1 hour, the insulating coating becomes a degree of curing between 'uncured' and 'fully cured'. The insulating cured film of this state is called "insulating uncured film" in this specification. When heated at low temperature or short time rather than these heating conditions, an insulating film will be in an uncured state. When heated at high temperature or long time rather than these heating conditions, an insulating film will be in the state near | completely hardening. For example, in the case of an oligophenylene ether resin system, even if it is heating at 160 degreeC, if a heating time is about 5 minutes, hardening reaction will be inadequate. For this reason, the insulating film maintains a state near uncured.

When the insulating film is an uncured film, the adhesion strength between a member (for example, a conductive film such as a conductive pattern or an upper or lower insulating film) formed in contact with the insulating film is increased. The reason for this is that the insulating coating is a resin having a low molecular weight before crosslinking. Therefore, the insulating coating is in contact with each other in a state of thermal fluidity, and as a result, the wetting of the insulating coating against the adhesion partner is improved. Therefore, the effect that a wiring becomes difficult to peel and a wiring board becomes a firm thing arises. Moreover, since hardening degree becomes low, it is possible to fill the unevenness | corrugation by the mounting component of a base without gap. Also regarding the planarization of the wiring board surface, a high effect can be obtained.

On the other hand, the uncured coating is poor in mechanical strength. For this reason, when forming a conductive pattern on a film by printing, for example, there exists a possibility that handling may become difficult. In such a case, it is preferable to heat the film on the side forming the conductive pattern under appropriate conditions and to change the film into a completely cured state, and further to laminate an uncured film thereon. By laminating an uncured film and a fully cured film, the adhesiveness and flatness can be improved. Moreover, workability in an electroconductive pattern processing process can be improved.

For example, in the epoxy system of the present invention, the heating fluidity is excessive depending on the application. For this reason, in the previous step, it may be preferable to press-laminate after raising the fluid viscosity (after prebaking) by advancing heat curing slightly.

[Shape, size parameter of member]

(Definition of size parameter)

12 (a) to 12 (c) are diagrams for defining definitions of size parameters according to the multilayer wiring board member of the present invention.

FIG. 12A is a cross-sectional view of the multilayer wiring board member obtained by forming the fluid coating film 222 on the conductive bump 221 by coating. 12B and 12C are cross-sectional views of the multilayer wiring board member obtained by forming the insulating uncured film 223 by reducing the thickness of the fluid coating film 222. In the exposure of the conductive bumps, typically, the head of the conductive bumps is completely exposed as shown in FIG. 12 (b). However, in the worst case, as shown in Fig. 12C, an insulating film remains on a part of the head of the conductive bumps.

Here, t1 is the thickness of the flowable film 222. t2 is the thickness of the insulating uncured film 223. h1 is the thickness of the conductive bump 221. A1 is the bottom diameter (bottom diameter) of the conductive bumps. θ1 is the center angle of the upper end surface of the conductive bump 71. In the worst case shown in Fig. 12C, Sb1 is the bottom area of the bump, and Se1 is the exposed area of the conductive bump 221 in the head of the conductive bump. The exposed area ratio of the conductive bumps to the floor area is defined as Se1 / Sb1 × 100 (%).

 Although not shown, the height of the conductive bumps after the lamination heat press is defined as h2 and the thickness of the insulating layer after the lamination heat press is t3. t3 is preferably 5 µm or more.

(Shape of conductive bump)

It is preferable that the shape of the conductive bumps be a shape whose diameter of the tip end section is smaller than the diameter of the bottom part. This shape is preferably, for example, conical, approximately truncated, or mountainous. The top face shape of the conductive bumps is preferably a gentle arc having a center angle θ1 of 180 degrees or less. Here, the cross section of the tip end portion of the conductive bump is a cross section in the horizontal direction of the conductive bump when the conductive bump tip is disposed above. An upper end surface of the conductive bump is a cross section in the vertical direction of the conductive bump. In the manufacturing method of the multilayer wiring board of this invention, since an electroconductive bump does not need to penetrate a prepreg, it does not need to be a pointed shape. By making the tip of the conductive bump a gentle arc, it is possible to increase the cross-sectional area of the via and to reduce the via resistance.

When the upper end surface of the conductive bump is a circular arc having a center angle of more than 180 degrees, the tip portion of the conductive bump is formed in a recessed shape. For this reason, the insulating uncured resin remains in the groove portion. For this reason, inconveniences such as poor connection of vias and increase in via resistance occur. In the multilayer wiring board member of this invention, the upper end surface of a conductive bump is a gentle arc shape which has a center angle of 180 degrees or less. For this reason, the insulating uncured resin does not remain at the tip of the conductive bumps. Therefore, it is effective to secure connection of vias and to reduce via resistance. In addition, the tip of the conductive bump is not sharp. For this reason, even when a batch lamination hot press is performed, the via tip portion is not broken or folded. Therefore, it is possible to realize reliable electrical connection between the via and the upper conductive member.

(Exposure of conductive bumps)

When the insulating resin compound is applied and the film thickness is reduced by heating or drying, at the boundary between the insulating uncured film and the conductive bumps, as shown in FIG. Matter may remain. When the ratio of the portion of the upper surface of the conductive bumps to which the conductive bumps are not covered by the residue of the insulating material or the like is represented by the exposed area ratio to the bottom area of the conductive bumps, the exposure area ratio is 20 by using the technique of the present invention. Can be more than%. Since the cross sectional area of the via can be substantially increased, it is effective in reducing the via resistance.

[Multilayer wiring board concerning embodiment of this invention and its manufacturing method]

Below, the specific example of the method of manufacturing a multilayer wiring board using a wiring board member and a core board | substrate is demonstrated using FIGS. 4-6. The manufacturing method of the multilayer wiring board which concerns on this invention is a method of using a conductive foil, an insulating substrate, or a multilayer wiring board member instead of a core board | substrate in the manufacturing method of the multilayer wiring board board demonstrated here.

(1st specific example of manufacturing method of a multilayer wiring board)

In the 1st specific example, the manufacturing method of the multilayer wiring board of a laminated system is demonstrated one by one using FIG.4 (a)-(i). The example using the printed multilayer wiring board manufactured by the plating through-hole system as a core substrate is shown. First, the multilayer wiring board member 51 manufactured on each of the upper and lower surfaces of the core substrate 52 by the second embodiment (Fig. 2) of the method for manufacturing the multilayer wiring board member according to the present invention. And 53 are aligned (Fig. 4 (a)), and lamination heat press is performed. Thereby, the insulating film of the multilayer wiring board member which was an insulating uncured film is made into a cured film (FIG. 4 (b)). Next, the resist pattern 54 is formed on the multilayer wiring board members 51 and 53 by the photolithography method (FIG. 4 (c)). Next, the wet foil is used to etch the conductive foil 55 using the resist pattern 54 as a mask. Then, the resist pattern 54 is removed. Thereby, the wiring 56 is formed (FIG. 4 (d)). Next, the multilayer wiring board member 57 manufactured by the 2nd specific example (FIG. 2) of the manufacturing method of the multilayer wiring board member which concerns on this invention on the upper surface of the multilayer wiring boards 51, 53, and the wiring 56. As shown in FIG. ) And (58) are aligned (Fig. 4 (e)), and lamination heat press is performed. Thereby, the insulating film of the multilayer wiring board member which was an insulating uncured film is made into a cured film (FIG. 4 (f)). Next, on the multilayer wiring board members 59 and 60, the resist pattern 62 is formed by the photolithography method (FIG. 4 (g)). Next, the wet foil is used to etch the conductive foil 61 using the resist pattern 62 as a mask. Then, the resist pattern 62 is removed. Thereby, the wiring 63 is formed, and as a result, the multilayer wiring board 66 is completed (FIG. 4 (h)).

In the method for manufacturing a composite multilayer wiring board substrate of a sequential lamination method shown in FIG. 4, using a substrate member produced using the manufacturing method shown in FIGS. 1 and 3 as a multilayer wiring board, or as a core substrate. Needless to say, it is possible to use a printed multilayer wiring board connected between layers by conductive bumps.

(2nd specific example of manufacturing method of multilayer wiring board)

In a 2nd specific example, the manufacturing method of the multilayer wiring board of a batch lamination system is demonstrated using FIG. 5 (a)-(d). The example using the printed multilayer wiring board manufactured using electroconductive bump as a core substrate is shown.

In general, the mounting density of the core substrate produced by the plated through-hole method is low. For this reason, it is also possible to use a substrate produced by a conventional method such as B ² it. First, the photolithography is performed on the multilayer wiring board member manufactured on the upper and lower surfaces of the core substrate 75 by the third specific example (FIG. 3) of the method for manufacturing the multilayer wiring board member according to the present invention. 1st specific example of the manufacturing method of the multilayer wiring board member 74,73,76 and 77 and the multilayer wiring board member which concerns on this invention in which the wiring pattern was formed by the lithographic method and the etching (FIG. 1). The multilayer wiring board member manufactured by the above is aligned (Fig. 5 (a)). Subsequently, lamination | stacking heat press is performed and the insulating film of the multilayer wiring board member which was an insulating unhardened film is made into a cured film (FIG. 5 (b)). Next, the resist pattern 84 is formed on the electroconductive foil 71 by the photolithography method (FIG. 5 (c)). By wet etching, the conductive foil 71 is etched using the resist pattern 84 as a mask. Then, the resist pattern 84 is removed. As a result, a wiring 83 is formed (Fig. 5 (d)). As a result, the multilayer wiring board 85 is completed.

In the manufacturing method of the multilayer wiring board board | substrate of the batch-lamination system shown in FIG. 5, using the board | substrate member produced using the manufacturing method shown to FIG. 1 and FIG. It goes without saying that it is possible to use a printed multilayer wiring board manufactured by a through-hole method.

(3rd specific example and 4th specific example of the manufacturing method of a multilayer wiring board)

In the 3rd and 4th specific example, the manufacturing method of the multilayer wiring board of a core / core laminated system is demonstrated using FIG. 6 (a) and (b). The example using the printed multilayer wiring board manufactured using electroconductive bump as a core substrate is shown.

In 3rd specific example, the conductive bump 94 is formed in the upper surface of the core board | substrate 95 initially. Then, the insulating resin compound liquid in which the insulating filler 93 was disperse | distributed is apply | coated on and around the conductive bump 94. FIG. As a result, a flowable film is formed. The solvent is evaporated by drying this fluid coating film. As a result, the insulating uncured film 92 is formed. Subsequently, the core substrate 91 is aligned (Fig. 6 (a)), and lamination heat press is performed. Thereby, the insulating film of the multilayer wiring board member which was an insulating uncured film becomes a cured film. As a result, a multilayer wiring board is completed.

In the 4th specific example, the conductive bump 99 is formed in the upper surface of the core substrate 100 initially. The insulating resin compounding liquid in which the insulating filler 98 was disperse | distributed is applied to the upper surface of the other core board | substrate 96. FIG. As a result, a flowable film is formed. The solvent is evaporated by drying this fluid coating film. As a result, the insulating uncured coating 97 is formed. Subsequently, the core substrate 96 and the conductive bumps 99 are aligned with each other (Fig. 6 (b)) to perform a laminated heat press. Thereby, the insulating film of the multilayer wiring board member which was an insulating uncured film becomes a cured film. As a result, a multilayer wiring board is completed.

It goes without saying that it is possible to use a printed multilayer wiring board manufactured by the plated through-hole method as the core substrate in the core / core laminated system multilayer wiring board substrate manufacturing method shown in FIG. 6.

[The top method and the bottom method]

In the process of manufacturing a multilayer wiring board, the method of arrange | positioning an insulating resin layer and electroconductive bump before lamination | stacking heat press includes the top coat method and the bottom coat method.

7 (a) and 7 (b) are cross-sectional views of the multilayer wiring board before lamination in the case of performing the undercoating method. The undercoat method is a method of coating an insulating compounding solution on the side of the conductive bumps. In FIG. 7A, a diagram in which a multilayer wiring board member having conductive bumps and an insulating material are arranged so as to face the core substrate 122 is shown. In FIG. 7B, the conductive foils 124 and 128 are disposed on the multilayer wiring member having the conductive bumps and the insulating material formed on the core substrate 126.

7 (c) and 7 (d) are cross-sectional views of the multilayer wiring board before lamination in the case of performing the top coat method. The top coat method is a method of coating an insulating compound on the side opposite to the side of the conductive bump to be processed. In FIG. 7C, an insulating resin mixture containing an insulating filler and a volatile solvent is formed on the conductor layer facing the first core substrate 131 or the second core substrate on which the conductive bumps 130 and 132 are formed. Applying a liquid to form a liquid uncured film, volatilizing the volatile insulating property, and reducing the film thickness to form an insulating uncured film, and the first core substrate and the insulating property. The conductor layer or the 2nd conductor layer of the 1st core wiring board in which the said conductive bump was formed, and the said insulating uncured film were formed by the process of laminating and heat-pressing the conductor layer or the 2nd core substrate in which the uncured film was formed. The manufacturing method of the multilayer wiring board which forms the electrical connection with the conductor layer of the core substrate of this at the said conductive bump is shown. In FIG.7 (d), the process of forming a fluid film by apply | coating the insulating resin compound liquid containing an insulating filler and a volatile solvent on the 1st conductor layer arrange | positioned on a 1st core board | substrate, and volatilizing the said volatile solvent is carried out. Forming the insulating uncured film by forming the insulating film and reducing the thickness of the flowable film; forming a bumpy conductive bump group on the second conductor layer or the second core substrate; The process of laminating and heat-pressing a core board | substrate and the said insulating layer, and the conductor layer of the 1st core wiring board in which the said insulating uncured film was formed, and the conductor layer or the conductor of the 2nd core board | substrate with which the said conductive bump were formed. The manufacturing method of the multilayer wiring board which forms the electrical connection with a layer in the said conductive bump is shown.

In the manufacturing method of the multilayer wiring board member shown to FIGS. (1)-(3), and the manufacturing method of the multilayer wiring board shown to FIGS. (4)-(6), the process sequence sectional drawing in the case of the undercoating method was demonstrated. However, it goes without saying that the superior effect similar to that in the case of applying the undercoating method can also be obtained even when the multilayer wiring board member and the multilayer wiring board are manufactured by the top coat method.

[Measurement method of via resistance]

The electrical resistance of vias of multilayer wiring boards formed by techniques such as conductive bumps is generally measured using a test pattern called a daisy chain. 13 (a) and 13 (b) are a plan view and a sectional view of a test pattern for measuring via resistance. The test pattern is constituted by the first layer wiring 234, the via 235, the second layer wiring 233, the measurement terminals 231, and 232. The first layer wiring 234 is wiring formed on the lower surface of the insulating film 236. The second layer wiring 233 is a wiring formed on the upper surface of the insulating film 236. A plurality of vias 235 are formed between the measuring terminal 231 and the measuring terminal 232 to form a wiring pattern of the first layer wiring 233. And via a wiring pattern of the second layer wiring 234. The via resistance measures a current flowing through the test pattern and applying a predetermined voltage to the measurement terminal 231 and the measurement terminal 232. Specifically, the wiring resistance is subtracted from the resistance between the terminals, and the result is divided by the number of vias to calculate the via resistance per one. This is extremely low compared to a typical electronic component, which is why it is necessary to prepare a pattern in which several vias are connected in series in order to calculate the via resistance with high accuracy. The pattern obtained by arranging the vias in series is used.If there is data of the intrinsic resistance of the wiring material or the sheet resistance of the wiring in advance, the wiring resistance can be calculated theoretically based on the size of the wiring. By measuring a plurality of patterns having different numbers, it is possible to independently measure the via resistance and the wiring resistance.

Hereinafter, this invention is demonstrated in detail using an Example and a comparative example. In addition, this invention is not limited to this Example.

[Filler dependency of conduction stability]

In order to investigate the influence of the insulating filler dispersed in the insulating resin on the conductive stability between the layers of the multilayer wiring board, the electrical resistance of the pattern for the conductive test formed on the substrate was measured.

(9) is a graph which shows the dependency of the electrical resistance of a daisy chain with or without an insulating filler. The graph on the left is a graph when there is no insulating filler. The graph on the right is a graph with an insulating filler. Silica (D50 = 10 µm Φ was used as the insulating filler. The applied pressure of the laminated heat press was 50 to 500 kgf / cm ^2. The horizontal axis of the graph indicates the number of extraction electrodes for measuring the connection resistance of the daisy chain. This number corresponds to the difference of the measurement positions in the substrate, as shown in these graphs, it can be seen that in the absence of the insulating filler, the dispersion state of the interlayer connection resistance in the substrate is large and the conduction stability is low. In the case of the insulating filler, it is understood that the dispersion state of the interlayer connection resistance in the substrate is small and the conduction stability is high.

As a result of evaluating while changing the mixing ratio of the insulating filler in insulating resin, it turned out that it is preferable that the mixing ratio of an insulating filler is 1 mol% or more and 50 mol% or less. It was found that this mixing ratio was further preferably 1 mol% or more and 30 mol% or less. In consideration of the low connection resistance, this mixing ratio was more suitably 1 mol% or more and 20 mol% or less.

10 (a) to 10 (f) are graphs showing the electrical resistance of the conductive bumps on the vertical axis and the position on the substrate on the horizontal axis. (A), (b), (c) respectively respond | correspond to the case where the diameter of an insulating filler is 0-4 micrometer (phi), 5-20 micrometer (phi), and 25-50 micrometer (phi). The amount of the insulating filler added to the insulating layer material is 10 mmol%. The bottom average diameter of the conductive bumps after the lamination press is 100 µm, and the average height is 20 µm.

As can be seen from these figures, when the diameter of the insulating filler is smaller than 20% of the height of the conductive bumps, the insulating filler is too small, so that short circuits tend to occur between the wirings and the insulating filler is likely to remain on the conductive bumps. The problem of losing is caused. For this reason, conduction stability becomes low. When the diameter of the insulating filler is 20% or more and 100% or less of the height of the conductive bumps, problems such as shorting and opening between wirings are less likely to occur. For this reason, conduction stability becomes high. If the diameter of the insulating filler is larger than 100% of the height of the conductive bumps, the insulating filler is too large, so that a gap occurs between the conductive bumps and the wiring to be connected thereto. For this reason, conduction stability becomes low.

10 (d), 10 (e) and 10 (f) respectively correspond to cases where the amount of the insulating filler added to the insulating material is 0% ol%, 25-30% ol%, 1-20% ol%, and 10-15% ol%. . When the amount of the insulating filler added is 0% ol%, the conductivity is dispersed and the absolute value of the resistance is also increased to 10? Or more under the influence of the warpage of the substrate. On the other hand, when the addition amount is 25 kol% or more, the absolute value and dispersion of the electrical resistance are improved as compared with the case where the addition amount is 0 kol%. When the addition amount is 30 mmol%, the conductivity due to the conductive bumps is 10 Ω or less. It can be seen that this value is a level without problems in use of the multilayer wiring board (Fig. 10 (d)). On the other hand, when the amount of insulating filler is 1-20% by weight, the warp tends to be further improved. The absolute value and dispersion of the electrical resistance are further reduced significantly. It is understood that when the amount of the insulating filler is 10 -15 Pa%, the electrical resistance is 100 mΩ or less, and the deviation is extremely small.

[Conductivity Bump Height Dependency of Conduction Stability]

The dependency on the conductive bump shape and the size of the conduction stability between the wirings of the two layers connected with the conductive bumps was evaluated. In the insulating layer, an insulating filler having a particle size of D50 and about 10 μmΦ was dispersed. The thickness of the insulating layer was about 10 micrometers. The electroconductive bumps prepared as evaluation samples were six types, namely, three types of 50 micrometers (phi), 80 micrometers (phi), and 100 micrometers (phi), a high thing, and a low thing. The conductive bump height was stably higher than the thickness of the insulating layer in the sample having the bottom diameter of the conductive bumps of 80 µm or 100 µm. In addition, even in a sample having a conductive bump bottom diameter of 50 µm, the conductive bump height was stably higher than the thickness of the insulating layer in the sample having a high height of the conductive bump. However, the sample of which the conductive bump bottom surface diameter was 50 micrometer (phi) and the height of the conductive bump was low was large in dispersion of the height of the conductive bump. Moreover, the conductive bump higher than the thickness of the insulating layer and the low conductive bump were mixed.

As a result of evaluating the conduction stability of these samples, a sample having a high or low conductive bump with a bottom diameter of 80 μm or 100 μm and a sample having a high conductive bump with a bottom diameter of 50 μm In this case, good conduction stability was obtained. In contrast, good conduction stability could not be obtained in a sample having a bottom diameter of 50 µm and a low height of the conductive bumps.

[Conductivity Bump Height Dependency of Conduction Stability]

11A and 11B are graphs of the dependence of the film thickness (height) of the conductive bumps and the resistance values on the amount of the thermoplastic resin added in the conductive bumps, respectively. 11 (a) and (b), as the amount of thermoplastic resin added increases, the film thickness of the conductive bumps after the lamination heat press becomes thin, the conductive bumps spread in the horizontal direction (XY direction), and the conductive bumps It was found that the resistance decreased and stabilized. However, in consideration of the line / space of the wiring pattern, the enlargement of the transverse direction of the conductive bumps increases, and there is a concern that a short circuit occurs in the XY direction, for example, by a high-temperature, high-humidity bias test at 85 ° C., 85%, or 50 V, for example. There is. Therefore, it was found that the addition amount of the thermoplastic resin to the conductive bump material is more preferably 10 wt% or more and 30 wt% or less.

[Evaluation of Exposure of Bump with Epoxy Resin]

By applying an epoxy resin to the insulating compounding solution, a sample for evaluation of the exposure of the conductive bumps was prepared. In preparation and evaluation of a sample, the insulating resin compound liquid containing an epoxy resin was apply | coated on the support substrate in which the conductive bump was formed, and it dried. Thereafter, the change in the film thickness was measured, and the appearance of the conductive bumps was observed.

(Adjustment of conductive paste)

The electrically conductive paste was adjusted by mix | blending a resin component, an electroconductive component, and a solvent on condition of the following.

Resin component:

Biphenyl type liquid epoxy resin: 2-10 weight%

Epoxy / phenol: 1-10 weight%

Biphenyl type epoxy resin: 5 weight% or less

Additive: 5 wt% or less

Electroconductive component: Ag powder (Scale-shaped powder weight: spherical powder weight = 1: 1) was mix | blended 80 weight% or more.

Solvent: Methyl ethyl ketone was added and the viscosity was adjusted.

(Adjustment of Insulating Resin Mixture)

The insulating resin compounding solution was adjusted by mix | blending a resin component and a solvent on condition of the following.

Resin component (epoxy resin):

(A) YX695BH30 (trademark made by Japan Epoxy Resin Co., Ltd.): 100 parts by weight

(B) Epicure DC808 (trademark made in Japan Epoxy Resin Co., Ltd.): 154 parts by weight

(C) Colonate 2507 (brand name made by Nippon Polyurethane Industry Co., Ltd.): 312 parts by weight

(D) 2E4MZ (imidazole type crosslinking catalyst, the Shikoku Chemical Co., Ltd. brand name): 9. 6 parts by weight

DVB-960 (made by Shinil Iron Chemical Co., Ltd.): 98. 6 parts by weight

Fur octa O (brand made by Nippon Oil Holding Co., Ltd.): 9. 6 parts by weight

(E) insulating filler silica D50 = 10㎛Φ 10VOL%

Solvent: Methyl ethyl ketone was added and the viscosity was adjusted.

(Formation of conductive bumps)

On the support substrate which consists of PET, the electrically conductive paste was apply | coated by screen printing. As a result, protrusion-shaped conductive bumps were formed. The diameter of the bottom surface of the electroconductive bump was 80 micrometers-110 micrometers, and height was 25 micrometers-40 micrometers.

(Application and Drying of Insulating Resin Mixture)

The insulating resin compound liquid was apply | coated by the doctor blade method on the support substrate in which the electroconductive bump was formed. Application conditions were clearance 50 micrometers-100 micrometers, and application | coating speed 1 m / min. This formed the insulating film of 30 micrometers-100 micrometers in thickness. Then, after measuring the thickness of an insulating film, the sample was put into the drying furnace. The sample was dried at 100 ° C. for 3 minutes. As a result, the solvent of the coating film was evaporated to reduce the thickness of the insulating uncured coating film.

After drying the sample, the thickness of the insulating film was measured. In addition, the exposed state of the conductive bumps was observed.

(Measurement of dielectric properties)

The dielectric properties of the produced epoxy resins were measured.

Dielectric properties after curing

Dielectric constant 2.71 / 1 GHz, 2.68 / 5 GHz

The dielectric tangent was 0.019 / 1 GHz and 0.0098 / 5 GHz.

[Evaluation of the Exposure of Conductive Bumps Applying OPE Resin]

By applying OPE resin to the insulating coating, a sample for evaluation of the exposure of the conductive bumps was prepared. In preparation and evaluation of a sample, the insulating resin compound liquid containing OPE resin was apply | coated on the support substrate in which the conductive bump was formed, and this was dried. Thereafter, the change in the film thickness was measured, and the appearance of the conductive bumps was observed.

(Adjustment of conductive paste)

The electrically conductive paste was adjusted by mix | blending a resin component, an electroconductive component, and a solvent on condition of the following.

Resin component:

Biphenyl type liquid epoxy resin: 2-10 weight%

Epoxy / phenol: 1-10 weight%

Biphenyl type epoxy resin: 5 weight% or less

Additive: 5 wt% or less

Electroconductive component: Ag powder (scalar powder weight: spherical powder weight = 1: 1) was mix | blended 80 weight% or more.

Solvent: Methyl ethyl ketone was added and the viscosity was adjusted.

(Adjustment of Insulating Resin Mixture)

The insulating resin compounding liquid was adjusted by mix | blending a resin component and a solvent on condition of the following.

Resin component (OPE resin):

(A) OPE-2st2200 (Mitsubishi Gas Chemical Co., Ltd. brand name): 5-40 weight%

(B) TR2003 (JSR Co., Ltd. brand name): 5-40 weight%

Solvent: Toluene: 20-90 wt%

(C) insulating filler silica D50 = 10㎛φ 10VOL%

(Formation of conductive bumps)

On the support substrate which consists of PET, the electrically conductive paste was apply | coated by screen printing. As a result, protrusion-shaped conductive bumps were formed. The diameter of the bottom surface of the electroconductive bump was 80 micrometers-110 micrometers, and height was 16 micrometers-40 micrometers.

(Application and Drying of Insulating Resin Mixture)

The insulating resin compound liquid was apply | coated by the doctor blade method on the support substrate in which the electroconductive bump was formed. Coating conditions were 20 micrometers-100 micrometers of clearance, and 1 m / min of coating speeds. As a result, an insulating coating having a thickness of 20 μm to 100 μm was formed. Then, after measuring the thickness of an insulating film, the sample was put into the drying furnace. The sample was dried at 100 ° C. for 3 minutes. Thereby, the solvent of a coating film was evaporated and the thickness of the insulating film was reduced.

After drying the sample, the thickness of the insulating coating was measured. In addition, the exposed state of the conductive bumps was observed.

(Measurement of dielectric properties)

The dielectric properties of the manufactured OPE resin were measured.

Dielectric properties after curing

Dielectric constant 2.40 / 5 GHz

The dielectric loss tangent was 0.0019 / 5 GHz.

As mentioned above, this invention relates to the multilayer wiring board corresponding to high density mounting. In particular, according to the present invention, it is possible to improve the stability of the interlayer connection, and a high yield and low cost multilayer wiring board and a manufacturing method thereof are provided. The present invention greatly contributes to the field of electronics.

Claims (18)

A multilayer wiring board comprising a conductive bump group formed between a first conductor layer and a second conductor layer and an insulating layer formed around the conductive bump group and including an insulating filler for preventing short circuits. The conductive bump group formed between the 1st conductor layer and the 2nd conductor layer, and the insulating layer formed around the said conductive bump group and containing an insulating filler, The average particle diameter of the said insulating filler is a lamination heat 20% or more and 100% or less of the average height of the conductive bump group after pressing. The film thickness is reduced by volatilizing a solvent in the conditions in which the said insulating layer does not substantially harden resin of the insulating resin compound liquid containing an insulating filler. It is a layer formed by hardening | curing after that, The multilayer wiring board characterized by the above-mentioned. 4. The multilayer according to any one of claims 1 to 3, wherein the insulating filler is one or a plurality of materials selected from silica, silicon carbide, alumina, aluminum nitride, zirconia beads, glass beads, and acrylic beads. Wiring board. The multilayer wiring board according to any one of claims 1 to 4, wherein the amount of the insulating filler added to the insulating resin blend is 1% by mol or more and 30% by mol or less. The said insulating resin compound is an epoxy resin, bismaleimide triazine resin, a polyimide resin, an acrylic resin, a phenol resin, an oligophenylene ether resin, and a polyether resin in any one of Claims 1-5. And a compound solution using melamine resin. The multilayer wiring board according to any one of claims 1 to 6, wherein the height h2 of the conductive bump group and the thickness t3 of the insulating layer have a relationship of h2 = t3. 8. The resin composition according to any one of claims 1 to 7, wherein the resin composition constituting the conductive bump group is made of a material obtained by adding a thermoplastic resin to a thermosetting resin at a mixing ratio of 10 wt% or more and 30 wt% or less. A multilayer wiring board, characterized in that. At least a step of forming a projected conductive bump group on the conductor layer,
Forming a fluid coating film by applying an insulating resin blend containing an insulating filler and a volatile solvent on the conductor layer and the conductive bump group;
Volatilizing the volatile solvent and reducing the thickness of the flowable film, thereby forming an insulating uncured film;
And laminating a conductor layer or a core substrate on the insulating uncured coating, and then curing the insulating uncured coating to form an insulating layer. Forming a bumpy conductive bump group on at least the first core substrate;
Forming a fluid coating film by applying an insulating resin mixture containing an insulating filler and a volatile solvent onto the conductive bump group;
Volatilizing the volatile solvent and reducing the flowable film to form an insulating uncured coating, and after laminating a conductor layer or a second core substrate on the insulating uncured coating, the insulating uncured coating The manufacturing method of the multilayer wiring board containing the process of forming an insulating layer by hardening reaction. At least a step of forming a protrusion-shaped conductive bump group on the first core substrate;
Forming a flowable film by applying an insulating resin blend containing an insulating filler and a volatile solvent on the conductor layer or the second core substrate;
Volatilizing the volatile solvent and reducing the thickness of the flowable film to form an insulating uncured film;
A method of manufacturing a multilayer wiring board, comprising a step of laminating and thermally pressing a conductor layer or a second core substrate on which the first core substrate and the insulating uncured film are formed. Forming a fluid coating film by applying an insulating resin compounding solution containing an insulating filler and a volatile solvent on at least the first conductor layer disposed on the first core substrate;
Volatilizing the volatile solvent and reducing the thickness of the flowable film, thereby forming an insulating uncured film;
Forming a projected conductive bump group on the second conductor layer or the second core substrate;
A method of manufacturing a multilayer wiring board, comprising the step of laminating and heat pressing the first core substrate and the insulating layer. Forming a conductive bump group on the first conductor layer, applying an insulating resin compound containing an insulating filler and a volatile solvent to form a fluid coating, volatilizing the volatile solvent and filming the fluid coating One or more multilayer wiring board members formed by forming an insulating uncured film by reducing the thickness are formed.
The multilayer wiring board is formed by repeating the process of laminating and heat-pressing the said multilayer wiring board member on a core board | substrate, and forming a 2nd conductor layer on the said multilayer wiring board member once or several times. The manufacturing method of the multilayer wiring board. Forming a conductive bump group on the first conductor layer, applying an insulating resin compound containing an insulating filler and a volatile solvent to form a fluid coating, volatilizing the volatile solvent and filming the fluid coating By reducing, one or more members for multilayer wiring boards formed by forming an insulating uncured film are formed.
A method for manufacturing a multilayer wiring board, wherein a multilayer wiring board is formed by laminating and heat-pressing one or a plurality of the multilayer wiring board members on a core substrate. The manufacturing method of the multilayer wiring board in any one of Claims 9-14 whose content of the nonvolatile component in the said insulating resin compound liquid is 10 weight%-80 weight%. The manufacturing method of the multilayer wiring board of any one of Claims 9-15 whose drying / solidification temperature of the said insulating layer is 60 degreeC or more and 160 degrees C or less. 17. The resin composition according to any one of claims 9 to 16, wherein the resin composition constituting the conductive bump group is made of a material obtained by adding a thermoplastic resin to a thermosetting resin in a mixing ratio of 10 wt% or more and 30 wt% or less. The manufacturing method of the multilayer wiring board. The multilayer wiring board according to any one of claims 9 to 17, wherein the temperature of the laminated heat press is equal to or lower than the temperature at which the curing reaction of the insulating resin starts, and is equal to or higher than the temperature at which the thermal melting viscosity of the insulating resin decreases. Manufacturing method.

Images