CN114390777B - Method for designing ground via hole of multilayer printed circuit board and multilayer printed circuit board - Google Patents
Method for designing ground via hole of multilayer printed circuit board and multilayer printed circuit board Download PDFInfo
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- CN114390777B CN114390777B CN202011130079.1A CN202011130079A CN114390777B CN 114390777 B CN114390777 B CN 114390777B CN 202011130079 A CN202011130079 A CN 202011130079A CN 114390777 B CN114390777 B CN 114390777B
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
Abstract
A design method of ground via hole of a multi-layer printed circuit board is executed by a processing device, the multi-layer printed circuit board is provided with a signal via hole with an input/output section and an open stub, the method comprises: obtaining lamination information corresponding to the multilayer printed circuit board and comprising the thickness of each circuit layer from a first list; acquiring setting information including a signal layer information and a fundamental frequency and phase velocity of a transmitted high-frequency signal corresponding to the signal via from the second list; obtaining a separation distance according to the fundamental wave frequency and the phase velocity; acquiring the lengths of the input/output section and the open circuit stub according to the signal layer changing information and the thickness of each circuit layer; and obtaining the ground via length according to the input/output segment length, the open stub length, the fundamental wave frequency and the phase velocity.
Description
[ field of technology ]
The present invention relates to a method and apparatus, and more particularly, to a method for designing ground vias of a multi-layer printed circuit board and a multi-layer printed circuit board.
[ background Art ]
Referring to fig. 1, a conventional multi-layer printed circuit board 10 typically utilizes a via (via) 101 (i.e., a signal via) to connect wires L1, L2 between different circuit boards (layers). Generally, the communication post 101 may be a through hole (through hole), a Blind hole (blank hole), or a Buried hole (Buried hole), but the cost for manufacturing the communication post is high, so the communication post 101 is usually manufactured in the through hole manner as shown in fig. 1.
In this case, if the two wires L1, L2 to be connected to the via 101 are not located in a first external circuit layer La1 and a second external circuit layer La2 in the multi-layer printed circuit board 10, respectively, an open stub 1011 is necessarily left on the via 101 made of the via. When a high-frequency signal S1 transmitted by the wire L1 is transmitted to the wire L2 through the connection post 101, a part of the high-frequency signal S1 is transmitted to the open stub 1011 of the connection post 101 and then reflected back to the wires L1 and L2, so as to cause signal interference, and the signal quality of the high-frequency signal S1 output by the wire L2 is reduced. Therefore, to solve this problem, a via 102 (i.e., a ground via) penetrating from the first outer circuit layer La1 to the second outer circuit layer La2 and being grounded is correspondingly disposed beside each of the conventional via posts 101, so as to provide a reflow path for a portion of the high frequency signal S1 transmitted to the open stub 1011, thereby avoiding signal attenuation caused by the lack of the reflow path for a portion of the high frequency signal S1.
However, the parasitic capacitance of the via 101 and the parasitic capacitance of the via 102 generate a larger coupling capacitance (which is positively correlated with the length of the via 102), and this coupling capacitance causes a larger attenuation of the high frequency signal S1, so that the high frequency signal S1 output by the wire L2 has a smaller Eye Height (Eye Height) and a narrower Eye Width (Eye Width), i.e. the signal quality of the high frequency signal S1 output by the wire L2 is worse.
[ invention ]
The technical problem to be solved by the invention is to provide a design method of a ground via of a multilayer printed circuit board, which can overcome the defects of the prior art.
In order to solve the above technical problems, the present invention provides a method for designing a ground via of a multi-layer printed circuit board, which is executed by a processing device, the multi-layer printed circuit board is provided with at least one signal via, the at least one signal via has an input/output section and an open stub, the method comprises:
(A) Obtaining lamination information corresponding to the multi-layer printed circuit board from a first list, wherein the first list stores a plurality of lamination information corresponding to different multi-layer printed circuit boards respectively, and each lamination information comprises the thickness of each circuit layer;
(B) Obtaining a set information corresponding to the at least one signal through hole from a second list, wherein the second list stores a plurality of sets of set information corresponding to different signal through holes respectively, and each set information comprises a signal layer changing information corresponding to one of the at least one signal through hole and a basic wave frequency and a phase velocity of a high-frequency signal transmitted by the signal layer changing information;
(C) Obtaining a spacing distance according to the fundamental wave frequency and the phase velocity, wherein the spacing distance is the distance between a signal via end of one of the at least one signal via adjacent to the open stub and a ground via end of one of the ground vias adjacent to the open stub;
(D) Acquiring the lengths of the input/output section and the open stub of the at least one signal via according to the signal layer changing information and the thickness of each circuit layer; a kind of electronic device with high-pressure air-conditioning system
(E) And obtaining the length of the ground via hole according to the length of the input/output section, the length of the open stub section, the fundamental wave frequency and the phase velocity.
It is another object of the present invention to provide a multilayer printed circuit board that overcomes the shortcomings of the prior art.
The multi-layer printed circuit board comprises a first outer circuit layer, a second outer circuit layer, a plurality of inner circuit layers and at least one signal through hole.
The first external circuit layer is provided with at least one first wire for transmitting a high-frequency signal.
The inner circuit layers are disposed between the first and second outer circuit layers, one of the inner circuit layers is provided with at least one second wire for outputting the high frequency signal, and at least one of the inner circuit layers is a ground layer.
The at least one signal via penetrates from the first outer circuit layer to the second outer circuit layer and is coupled to the corresponding first and second wires, and the corresponding first wire is coupled to the corresponding second wire through the at least one signal via to transmit the high-frequency signal.
The at least one ground via penetrates from only one of the inner circuit layers to one of the rest of the inner circuit layers, the first outer circuit layer, and the second outer circuit layer, and one of the plurality of circuit layers penetrated by the at least one ground via is a ground layer.
Compared with the prior art, the design method of the ground via hole of the multilayer printed circuit board is utilized to ensure that the length of the at least one ground via hole is shorter than that of the existing ground via hole, so that the parasitic capacitance of the at least one signal via hole and the parasitic capacitance of the corresponding at least one ground via hole generate smaller coupling capacitance, and further, the attenuation of the coupling capacitance on the high-frequency signal is smaller, and the high-frequency signal output by the second lead wire has larger eye height.
[ description of the drawings ]
Other features and advantages of the present invention will become apparent from the following description of the embodiments with reference to the drawings, in which:
FIG. 1 is a schematic diagram illustrating a conventional multilayer printed circuit board;
FIG. 2 is a schematic diagram illustrating one embodiment of a multi-layer printed circuit board according to the present invention; a kind of electronic device with high-pressure air-conditioning system
FIG. 3 is a flow chart illustrating a method of designing a ground via of a multilayer printed circuit board according to the present invention.
[ detailed description ] of the invention
Referring to fig. 2, an embodiment of the multi-layered printed circuit board 20 of the present invention includes a first outer circuit layer 2, a second outer circuit layer 3, a plurality of inner circuit layers, at least one signal via, and at least one ground via. In the present embodiment, the multi-layered printed circuit board 20 includes four inner circuit layers 4 to 7, two signal vias 8, 8', and two ground vias 9, 9' respectively corresponding to the signal vias 8, 8', but is not limited thereto. In other embodiments, the multilayer printed circuit board 20 may include one signal via and one ground via, or more than two signal vias and more than two ground vias. Each ground via hole is arranged corresponding to a corresponding signal through hole.
The first outer circuit layer 2 is provided with at least one first conductor for transmitting a high frequency signal. In the present embodiment, the first external circuit layer 2 is provided with two first wires L11, L12, but is not limited thereto. The first wires L11, L12 are used for transmitting two high-frequency signals S11, S12, respectively. The high frequency signals S11, S12 constitute a differential signal.
The inner circuit layers 4-7 are arranged between the first and second outer circuit layers 2,3, one of the inner circuit layers 4-7 is provided with at least one second conductor for transmitting the high frequency signal, and at least one of the inner circuit layers 4-7 is a ground layer. In the present embodiment, the inner circuit layer 6 is provided with two second conductive lines L21 and L22, and the inner circuit layer 4 is exemplified by, but not limited to, a ground layer. The second wires L21, L22 are used to output the high frequency signals S11, S12, respectively.
Each of the signal vias 8, 8' extends from the first outer circuit layer 2 to the second outer circuit layer 3. The signal via 8 is coupled to the corresponding first and second wires L11, L21, and the signal via 8' is coupled to the corresponding first and second wires L12, L22. The first wires L11 are coupled to the corresponding second wires L21 through the signal vias 8 to transmit the high frequency signals S11, and the first wires L12 are coupled to the corresponding second wires L22 through the signal vias 8' to transmit the high frequency signals S12.
Each of the signal vias 8, 8' has an input-output section 81 for transmitting a corresponding one of the high-frequency signals S11, S12 and an open-circuit stub 82 which is not electrically connected to the input-output section 81 and cannot transmit signals. The input/output section 81 is formed between the corresponding first and second wires L11, L21 (or the first and second wires L12, L22). The open stub 82 is formed between the corresponding second conductive line L21 (or the second conductive line L22) and the second external circuit layer 3. In the signal via 8, a signal via end 83 of one of the signal vias 8 adjacent to the open stub 82 is spaced apart from a ground via end 91 of one of the ground vias 9 adjacent to the open stub 82 by a separation distance d. In the signal via 8', one of the signal vias 8' is spaced apart from one of the ground vias 9 'adjacent the signal via end 83' of the open stub 82 by the spacing distance d.
Each of the ground vias 9, 9 'penetrates from only one of the inner circuit layers 4 to 7 to one of the remaining inner circuit layers 4 to 7, the first outer circuit layer 2, and the second outer circuit layer 3, and one of the circuit layers penetrated by each of the ground vias 9, 9' is a ground layer. In the present embodiment, taking as an example that each of the ground vias 9, 9' penetrates from the inner circuit layer 5 to the first outer circuit layer 2, the inner circuit layer 4 of the plurality of circuit layers 2, 4, 5 penetrated by each of the ground vias 9, 9' is a ground layer, and each of the ground vias 9, 9' is a Blind hole (Blind hole), but is not limited thereto. In other embodiments, each of the ground vias 9, 9' may be a Buried hole, a ground via formed by a blind hole in combination with a Buried hole, or a drilled hole drilled via a backdrilling technique. The back drilling technique is well known to those skilled in the art and is not described herein for brevity.
In detail, the multi-layered printed circuit board 20 is manufactured by a back-end printed circuit board factory according to first to third lists of circuit board layouts and circuit settings related to a circuit diagram stored in a computer system by a processing device (not shown) by a circuit board layout person after the first to third lists are provided to the back-end printed circuit board factory. The first list stores a plurality of pieces of stacking information corresponding to different multi-layer printed circuit boards respectively, wherein each piece of stacking information comprises a total layer number of the circuit board, a thickness of each circuit layer and information required by the rest stacking. The second list stores a plurality of sets of setting information corresponding to different signal vias 8, 8', respectively, each set of setting information including a coordinate in which one of the signal vias 8, 8' is located on the multi-layer printed circuit board 20, a signal level change information (i.e., a basic wave frequency and a phase velocity of a high frequency signal received/outputted with respect to which layer one end of the corresponding one of the signal vias 8, 8 'receives/outputs a high frequency signal, for example, and from which layer the other end of the corresponding one of the signal vias 8, 8' receives/outputs the high frequency signal, for example). It should be noted that the first and second lists are default by the circuit board layout personnel and stored in the computer system by the processing device, and the third list is obtained by the processing device executing the design method of the ground via of the multi-layer printed circuit board of the present invention.
Referring further to fig. 3, the method for designing the ground vias of the multi-layer printed circuit board 20 of the present invention comprises the following steps.
In step 21, the processing device obtains a stacking information corresponding to the multi-layer printed circuit board 20 from the first list.
In step 22, the processing device obtains from the second list a set of information corresponding to each of the signal vias 8, 8' corresponding to the high frequency signal.
In step 23, the processing device obtains the separation distance d according to the fundamental frequency and the phase velocity of the high frequency signal S11 (or the high frequency signal S12) transmitted by the signal via 8 (or the signal via 8') corresponding to the high frequency signal.
In the present embodiment, the processing device obtains the distance d according to the following equations (1) and (2),
formula (1)
Formula (2)
Wherein the parameter f is the fundamental frequency of the high frequency signal S11 (or the high frequency signal S12), the parameterFor the phase velocity of the high-frequency signal S11 (or the high-frequency signal S12), parameter +.>For a wavelength of the high frequency signal S11 (or the high frequency signal S12), the parameter d is the spacing distance +.>
。
Furthermore, in the present embodiment, the signal via end 84 (or the signal via end 84 ') of one of the signal vias 8 (or the signal via 8') that is far from the open stub 82 is separated from the ground via end 92 (or the ground via end 92 ') of one of the ground vias 9 (or the ground via 9') that is far from the open stub 82 by another spacing distance t, and t satisfies the following condition:
。
in practice, the minimum value of the spacing distance t depends on the dimensions of the signal vias 8 and pads (not shown) to prevent shorting of adjacent signal vias 8, 8'.
In step 24, the processing device obtains the lengths of the input/output section 81 and the open stub 82 of the signal via 8 (or the signal via 8 ') according to the signal layer replacement information of the signal via 8 (or the signal via 8') and the thickness of each circuit layer.
In step 25, the processing device obtains the length of the ground via 9 (or the ground via 9 ') according to the length of the input/output section 81 of the signal via 8 (or the signal via 8'), the length of the open stub 82, the fundamental wave frequency, and the phase velocity.
In this embodiment, the processing device obtains the length of the ground via 9 (or the ground via 9') according to the following formula (3),
formula (3)
Wherein, the parameter x is the length of the input/output section 81 of the signal via 8 (or the signal via 8 '), the parameter y is the length of the open stub 82 of the signal via 8 (or the signal via 8'), and the parameterFor the wavelength of the high frequency signal S11 (or the high frequency signal S12) (reference formula(1) The parameter z is the length of the ground via 9 (or the ground via 9'), and the parameter z is less than the thickness of the multilayer printed circuit board 20. In other embodiments, the length of the ground via 9 (or the ground via 9') can be obtained according to the principle of right triangle, for example d2= (x-z+2y) 2+t2, and the parameters d and t are the above-mentioned spacing distances, and the parameters x, y and z are defined as in formula (3).
In step 26, the processing device obtains the coordinate information of the ground via 9 (or the ground via 9 ') on the multilayer printed circuit board 20 according to the spacing distance d and the coordinates of the signal via 8 (or the signal via 8') on the multilayer printed circuit board 20.
For example, if the signal via 8 is located at the coordinates (2, 3) of the multi-layer printed circuit board 20 and the spacing distance d is 50 mils (mil), the processing device obtains a coordinate position separated from the coordinates (2, 3) by 50 mils according to a conventional coordinate calculation method as the coordinate information, and the coordinate position is not provided with other vias, blind holes or buried holes.
In step 27, the processing device creates the third list according to the coordinate information of the ground via 9 (or the ground via 9 ') on the multi-layer printed circuit board 20 and the length of the ground via 9 (or the ground via 9').
Thus, in the multi-layer printed circuit board 20 manufactured by using the first list and the second list and the third list obtained by the processing device executing the method for designing the ground via of the multi-layer printed circuit board of the present invention, for example, when the high frequency signal S11 is a PCIe Gen3 and the basic frequency is a high frequency signal of 4GHz, the wavelength isAt a distance of 3.95cm, the spacing d is 160mil, the distance between the ground via 9 and the signal via 8 is sufficient to provide a return path for the signal at the fundamental frequency of the portion of the high frequency signal S11 transmitted to the open stub 82, while the portion of the high frequency signal S11 transmitted to the open stub 82 is the second harmonic signal at the frequency of 8GHz due to its corresponding wavelength and spacingAt a distance of 1.975cm and 80mil, respectively, the distance between the ground via 9 and the signal via 8 is too far (160 mil>80 mil) cannot provide a return path for a part of the second harmonic signal in the high frequency signal S11, and the length of the open stub 82 is close to the spacing distance d, so that the open stub 82 cannot provide a return path for a part of the second harmonic signal in the high frequency signal S11, so that the second harmonic signal in the part of the high frequency signal S11 transmitted to the open stub 82 is radiated to the outside of the multi-layer printed circuit board 20 through the signal via terminal 83 and the second external circuit layer 3, so that the second wire L21 cannot interfere with the output thereof due to receiving the reflected signal of the second harmonic signal in the part of the high frequency signal S11 from the open stub 82, and the high frequency signal S11 output by the second wire L21 has a wider Eye Width (Eye Width). Similarly, the high frequency signal S12 outputted from the second conductive line L22 also has a wider eye width. In addition, the length of each ground via hole 9, 9' is shorter than that of the conventional ground via hole 102 (see fig. 1), so that the parasitic capacitance of the signal via hole 8 (the signal via hole 8 ') and the parasitic capacitance of the ground via hole 9 (the ground via hole 9 ') generate smaller coupling capacitance, and further the attenuation of the high frequency signal S11 (the high frequency signal S12) by the coupling capacitance is smaller, so that the high frequency signal S11 (the high frequency signal S12) output by the second wire L21 (the second wire L22) has larger Eye Height (Eye Height).
It should be noted that, the processing device can also automatically change the circuit setting corresponding to a circuit diagram of the circuit board layout of the multi-layer printed circuit board 20 according to the third list, so that the signal quality of the high frequency signals S11, S12 respectively output by the second wires L21, L22 of the multi-layer printed circuit board 20 manufactured by the back-end printed circuit board factory according to the circuit diagram and the circuit setting thereof is better.
In summary, the processing device is utilized to execute the ground via design method of the multi-layer printed circuit board of the present invention, so that the length of each ground via 9, 9 'is shorter than the length of the conventional ground via 102 (see fig. 1), and the second harmonic signals in the portions of the high frequency signals S11, S12 transmitted to the open stub 82 are radiated to the outside of the multi-layer printed circuit board 20 through the signal via terminals 83, 83', and through the second external circuit layer 3, respectively, and the high frequency signals S11, S12 respectively output by the second wires L21, L22 have larger eye height and wider eye width, that is, the signal quality of the high frequency signals S11, S12 respectively output by the second wires L21, L22 is better.
The foregoing is merely illustrative of the present invention, and the present invention is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present invention. Therefore, the protection scope of the invention is subject to the protection scope of the claims.
Claims (10)
1. A method for designing a ground via of a multi-layer printed circuit board, the multi-layer printed circuit board being provided with at least one signal via having an input/output section and an open stub, the method comprising:
(A) Obtaining lamination information corresponding to the multi-layer printed circuit board from a first list in a first list, wherein the first list stores a plurality of lamination information corresponding to different multi-layer printed circuit boards respectively, and each lamination information comprises the thickness of each circuit layer;
(B) Obtaining a set information corresponding to the at least one signal through hole from a second list in a second list, wherein the second list stores a plurality of sets of set information corresponding to different signal through holes respectively, and each set information comprises a signal layer changing information of a corresponding one of the at least one signal through hole and a basic wave frequency and a phase velocity of a high-frequency signal transmitted by the signal layer changing information;
(C) Obtaining a spacing distance according to the fundamental wave frequency and the phase velocity, wherein the spacing distance is the distance between a signal via end of one of the at least one signal via adjacent to the open stub and a ground via end of one of the ground vias adjacent to the open stub;
(D) Acquiring the lengths of the input/output section and the open stub of the at least one signal via according to the signal layer changing information and the thickness of each circuit layer; a kind of electronic device with high-pressure air-conditioning system
(E) And obtaining the length of the ground via hole according to the length of the input/output section, the length of the open stub section, the fundamental wave frequency and the phase velocity.
2. The method for designing a ground via of a multilayer printed circuit board according to claim 1, wherein in (C), the spacing distance is obtained according to the following formula,
the parameter f is the fundamental frequency, the parameter v is the phase velocity, the parameter lambda is a wavelength of the high-frequency signal, and the parameter d is the separation distance.
3. The method for designing a ground via of a multilayer printed circuit board according to claim 1, wherein in (E), the length of the ground via is obtained according to the following formula,
the parameter x is the length of the input/output segment, the parameter y is the length of the open stub, the parameter z is the length of the ground via, the parameter v is the phase velocity, and the parameter λ is a wavelength of the high-frequency signal.
4. The method of claim 1, wherein a distance between a signal via end of the at least one signal via, which is away from the open stub, and a ground via end of the ground via, which is away from the open stub, is less than or equal to the separation distance.
5. The method of claim 1, wherein each set of information further comprises a coordinate of the corresponding one of the at least one signal via on the multilayer printed circuit board, the method further comprising:
(F) And obtaining coordinate information of the ground via hole on the multilayer printed circuit board according to the spacing distance and the coordinates of the corresponding one of the at least one signal via hole on the multilayer printed circuit board.
6. The method for designing a ground via of a multilayer printed circuit board according to claim 5, further comprising:
(G) And establishing a third list according to the coordinate information of the ground via hole and the length of the ground via hole of the multilayer printed circuit board, wherein the third list comprises a third list.
7. A multilayer printed circuit board, comprising:
a first external circuit layer provided with at least one first wire for transmitting a high frequency signal;
a second outer circuit layer;
a plurality of inner circuit layers arranged between the first and second outer circuit layers, one of the inner circuit layers being provided with at least one second wire for outputting the high frequency signal, at least one of the inner circuit layers being a ground layer;
at least one signal via penetrating from the first outer circuit layer to the second outer circuit layer and coupled to the corresponding first and second wires, the corresponding first wire being coupled to the corresponding second wire through the at least one signal via to transmit the high frequency signal; a kind of electronic device with high-pressure air-conditioning system
At least one ground via penetrating from one of the inner circuit layers to one of the rest of the inner circuit layers, the first outer circuit layer, and the second outer circuit layer, wherein one of the plurality of circuit layers penetrated by the at least one ground via is a ground layer,
the at least one signal via has an input/output section and an open stub, the input/output section is formed between the corresponding first and second wires, the open stub is formed between the corresponding second wire and the second external circuit layer, one signal via end of the at least one signal via adjacent to the open stub is separated from one ground via end of the ground via adjacent to the open stub by a spacing distance,
the signal vias also correspond to a set-up message including a signal layer change message for a corresponding one of the signal vias, and a fundamental frequency and a phase velocity of a high frequency signal transmitted thereby, the separation distance being obtained based on the fundamental frequency and the phase velocity.
8. The multilayer printed circuit board according to claim 7, wherein the separation distance is as follows,
the parameter f is a fundamental wave frequency of the high-frequency signal, the parameter v is a phase velocity of the high-frequency signal, the parameter lambda is a wavelength of the high-frequency signal, and the parameter d is the spacing distance.
9. The multilayer printed circuit board of claim 7, wherein the length of the ground via is as follows,
the parameter z is the length of the ground via, the parameter x is the length of the input/output segment, the parameter y is the length of the open stub, the parameter v is a phase velocity of the high-frequency signal, the parameter λ is a wavelength of the high-frequency signal, and the parameter d is the spacing distance.
10. The multi-layer printed circuit board of claim 7, wherein the at least one ground via is one of a blind via, a buried via, a combination of a blind via and a buried via, and a drilled via a back drilling technique.
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Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200723977A (en) * | 2005-12-13 | 2007-06-16 | Inventec Corp | Method and its structure used to inhibit the stub effect at the via on a substrate |
| CN101043788A (en) * | 2006-03-21 | 2007-09-26 | 鸿富锦精密工业（深圳）有限公司 | Printed circuit boards |
| CN101662882A (en) * | 2005-01-25 | 2010-03-03 | 财团法人工业技术研究院 | Transmission hole of matched high frequency broadband impedance |
| CN102474993A (en) * | 2009-08-07 | 2012-05-23 | 纳美仕股份有限公司 | Multilayered wiring board and method for manufacturing multilayered wiring board |
| CN102511110A (en) * | 2010-05-12 | 2012-06-20 | 联发科技股份有限公司 | Circuit device with signal line transition element |
| JP2019080193A (en) * | 2017-10-25 | 2019-05-23 | 株式会社Ｓｏｋｅｎ | High frequency transmission line |
| CN110832120A (en) * | 2017-03-30 | 2020-02-21 | 古河电气工业株式会社 | Surface-treated copper foil, and copper-clad plate and printed circuit board using the same |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001308547A (en) * | 2000-04-27 | 2001-11-02 | Sharp Corp | High-frequency multilayer circuit board |
| US6891266B2 (en) * | 2002-02-14 | 2005-05-10 | Mia-Com | RF transition for an area array package |
| KR20050072881A (en) * | 2004-01-07 | 2005-07-12 | 삼성전자주식회사 | Multi layer substrate with impedance matched via hole |
| US10440814B2 (en) * | 2016-05-06 | 2019-10-08 | Alpha Networks Inc. | Impedance matching structure of transmission line in multilayer circuit board |
-
2020
- 2020-10-21 CN CN202011130079.1A patent/CN114390777B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101662882A (en) * | 2005-01-25 | 2010-03-03 | 财团法人工业技术研究院 | Transmission hole of matched high frequency broadband impedance |
| TW200723977A (en) * | 2005-12-13 | 2007-06-16 | Inventec Corp | Method and its structure used to inhibit the stub effect at the via on a substrate |
| CN101043788A (en) * | 2006-03-21 | 2007-09-26 | 鸿富锦精密工业（深圳）有限公司 | Printed circuit boards |
| CN102474993A (en) * | 2009-08-07 | 2012-05-23 | 纳美仕股份有限公司 | Multilayered wiring board and method for manufacturing multilayered wiring board |
| CN102511110A (en) * | 2010-05-12 | 2012-06-20 | 联发科技股份有限公司 | Circuit device with signal line transition element |
| CN110832120A (en) * | 2017-03-30 | 2020-02-21 | 古河电气工业株式会社 | Surface-treated copper foil, and copper-clad plate and printed circuit board using the same |
| JP2019080193A (en) * | 2017-10-25 | 2019-05-23 | 株式会社Ｓｏｋｅｎ | High frequency transmission line |
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