CN102474993A - Multilayered wiring board and method for manufacturing multilayered wiring board - Google Patents

Multilayered wiring board and method for manufacturing multilayered wiring board Download PDF

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Publication number
CN102474993A
CN102474993A CN2010800348787A CN201080034878A CN102474993A CN 102474993 A CN102474993 A CN 102474993A CN 2010800348787 A CN2010800348787 A CN 2010800348787A CN 201080034878 A CN201080034878 A CN 201080034878A CN 102474993 A CN102474993 A CN 102474993A
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China
Prior art keywords
coverlay
insulating properties
circuit board
multilayer circuit
salient point
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Granted
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CN2010800348787A
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CN102474993B (en
Inventor
福冈义孝
户井田刚
熊仓萨桃洣
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Nameishi Co Ltd
Namics Corp
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Nameishi Co Ltd
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • H05K3/4655—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern by using a laminate characterized by the insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H05K3/4617—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar single-sided circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4647—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer around previously made via studs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203—Fillers and particles
    • H05K2201/0206—Materials
    • H05K2201/0209—Inorganic, non-metallic particles
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2036—Permanent spacer or stand-off in a printed circuit or printed circuit assembly
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06—Lamination
    • H05K2203/061—Lamination of previously made multilayered subassemblies
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination

Abstract

To date, multilayer wiring technology such as B2it in which layers are connected to each other using conductive bumps has been used for manufacturing multilayered wiring boards used for mounting electronic components. However, warpage of substrates often causes short-circuits between multilayered wiring lines or poor connection between conductive bumps and wiring lines. To avoid this, an insulating film is formed by coating a substrate with insulating varnish including insulating filler. This leads to maintenance of electrical insulation between multilayered wiring lines, higher stability of wiring connections, and improvement in production yield even when the substrate warps.

Description

The manufacturing approach of multilayer circuit board and multilayer circuit board
Technical field
The present invention relates to be used to install the manufacturing approach of the multilayer circuit board and the multilayer circuit board of electronic unit, particularly possess the via (PVC ア) that constitutes by the conductivity salient point, can high-density wiring the manufacturing approach of multilayer circuit board.
Background technology
Patent documentation 1: No. the 3167840th, jp patent publication
Patent documentation 2: Japan Patent open communique spy open 2007-13208 number
Patent documentation 3: Japan Patent open communique spy open 2006-183072 number
Patent documentation 4: Japan Patent open communique spy open 2002-353617 number
In recent years, be accompanied by miniaturization and, high speed and the multifunction of electronic equipment, also improve day by day for the requirement of carrying out high-density installation on the wiring board in being installed in electronic equipment.In order to tackle this requirement, carrying out the exploitation of multilayer circuit board, on this multilayer circuit board, through alternately laminated a plurality of insulating properties basis materials and conductive pattern, Laian County's electronic parts.
As the manufacturing technology of representative multilayer circuit board, the known B that ALIVH, Toshiba and the Dai Nippon Printing of Panasonic's electronic unit (National Electronics Research Centre) are arranged 2It.
ALIVH (Any Layer Interstitial Via Hole structure multi layered printed wiring board; Random layer inner via hole structure multilayer printed circuit board) is at connecting hole between cambium layer on the insulating body material, in this hole portion, imbeds the technology of conductive material then.At first, through to prepreg (プ リ プ レ グ) (as the insulating properties basis material thin slice of wiring board material) irradiating laser, form fine through hole.A conductive paste (conductive pe strike a su, su strike a conductive pe) filled into the through hole formed in the via hole is formed (interlayer connection portion) of the hot foil laminated on said prepreg, and then through photolithography and etching to form a conductive pattern, whereby the circuit board assembly.Through said board part laminating hot pressing, make multilayer circuit board.
In ALIVH, can be on through hole laying-out and wiring and electronic unit, therefore can shorten length of arrangement wire and high-density installation electronic unit.
; If the quantity of through hole increases, then increase the process time of laser irradiation, thereby cause manufacturing cost to increase; In addition; Adhesive strength (adherence strength) by bonding Copper Foil of laminating hot pressing and via is not high, therefore when shatter test, is easy to generate unfavorable conditions such as open circuit, has the low problem of reliability.
At B 2It (Buried Bump Interconnection Technology; Imbed the bump interconnect technology) in; On conductor plate, form chevron or the conical conductivity salient point of cardinal principle, then, make the thermoplastic of insulating properties prepreg basis material; Make salient point connect this insulating properties prepreg basis material through pressurization, form the via that constitutes by the conductivity salient point thus.In patent documentation 1 and patent documentation 2, disclose and B 2The technology that it is relevant.
In patent documentation 1 disclosed technology, make chevron conductor salient point connect the synthetic resin supporting mass along the thickness direction of synthetic resin supporting mass, form interlayer wiring thereafter.
In patent documentation 2 disclosed technology, on the conical conductor salient point of cardinal principle that is formed on the conductor plate, dispose uncured insulating material matrix material; To this basis material pressurization, salient point connected thereafter; Make conductor plate form pattern then, make base board unit thus.Range upon range of a plurality of these base board units, carry out making its curing after the pressurized, heated.
At B 2Identical among the it with ALIVH, on through hole, do not form pit, can laying-out and wiring and electronic unit, therefore can shorten length of arrangement wire and carry out high-density installation.In addition, different with ALIVH, B 2It forms via in a lump.Even therefore increase the quantity of through hole, also can not increase manufacturing cost.At the layer pf prepreg prestack, form the conductivity salient point on the Copper Foil through being printed on.Therefore at B 2The advantage that has the cementability of salient point and Copper Foil among the it.
On the other hand, B 2There is following problem in it.
(1) when the conductivity salient point connects and when being used to form multilayer circuit board and carrying out laminating hot pressing, big conductivity salient point and the prepreg of draw ratio (ア ス ペ Network ト than) applied big pressure.Present situation is that the interior density of the face of via is about 300,000/m 2The prediction interior density of face of via in the future is 1,000,000/m 2About.In this case, conductivity salient point and prepreg are applied very large pressure, therefore, because of the fraction defective that breakage the caused increase of conductivity salient point and prepreg, therefore, at B 2Be difficult to realize densification among the it.
(2) at B 2Among the it, the conductivity salient point will have certain mechanical strength, therefore, make its external diameter more than 100 μ m.In order to realize high-density installation, carrying out the miniaturization of conductivity salient point, make that the bottom surface diameter of conductivity salient point is 30 μ m～50 μ m.At B 2Among the it, the draw ratio of salient point is big, and makes the prepreg filmization that the limit arranged, so the conductivity salient point is difficult to miniaturization.
(3) more than 0.8～1.0, then the conductivity salient point can not connect prepreg if do not make the draw ratio (highly/external diameter) of conductivity salient point.In addition, making the insulating resin impregnated glass colth basis material attenuate as the common material of prepreg also is (～30 μ m that the limit is arranged tMore than).In addition, good for the perforation characteristic that makes the conductivity salient point, the conductivity bump height will approximately be three times of prepreg thickness.Therefore if guarantee the described draw ratio that can connect, then just producing the limit (minimum (min.) 72～90 μ m) aspect the miniaturization of the bottom surface of conductivity salient point diameter.If adjust the thickness of prepreg and the temperature of pressurization operation irrelevantly, then the conductivity salient point just can not connect prepreg.Therefore, at B 2Among the it, the nargin of creating conditions that forms conductivity salient point, perforation operation and laminating hot pressing operation etc. is little, therefore has the low problem of rate of finished products.
(4) exploitation can be printed with fine external diameter high length-diameter ratio the conductivity salient point electrocondution slurry very the difficulty.
(5) the prepreg thermoplastic through constituting the insulative resin by state before solidifying is pushed the conductivity salient point of overshooting shape, and the operation that makes salient point connect this prepreg also has problems.Promptly; Said prepreg is that the glass cloth basis material is knitted with fibre bundle and the structure that obtains in length and breadth; Therefore run under the situation of crossover sites of tow and run under the situation between tow and the tow at the conductivity salient point, the difference of the resistance of perforation is big.The part that resistance is big more can produce the broken nubbin of insulative resin and/or glass cloth more in the interface locations of insulative resin prepreg and conductivity salient point.The broken nubbin of these insulative resins and/or glass cloth; During the range upon range of pressurization of the conductor layer in subsequent handling conductivity salient point and wiring board; Can cause that contact resistance value increases down to poor flow, therefore broken nubbin reduces the rate of finished products of wiring board.
(a) of Figure 14 is to represent B in the past, connect prepreg with salient point to (d) of Figure 14 2The cutaway view and the stereogram of the process sequence of the multilayer circuit board component manufacturing method of it mode.At first,, form conical conductivity salient point 502 substantially, obtain intermediate product (Figure 14 (a)) thus through the operation of printing conductive slurry on the first conductivity paper tinsel 501.Make then this intermediate product be in solidify before state, as the prepreg 503 relative (Figure 14 (b)) of insulative resin.Under heated condition, make prepreg 503 be warmed up to fusion soon then, make it softening, the leading section that makes conductivity salient point 502 is from prepreg 503 outstanding (Figure 14 (c)).On the prepreg 503 that the leading section of conductivity salient point 502 is given prominence to, paste the second conductivity paper tinsel 505 (Figure 14 (d)) then.(e) of Figure 14 is the horizontal cross on conductivity salient point 502 tops of the multilayer line plate member that is made into through described method.The fragmentation bits 508 of observing the glass fiber matrix material that in prepreg, contains remain in the salient point surface 507.Through a plurality of multilayer circuit board stacking parts that are made into described method and pressurization, form multilayer circuit board.At B in the past 2In the multilayer circuit board member manufacturing method of it mode, broken bits remain in the salient point surface, therefore have the bad problem of interlayer wiring electrical connection that is easy to generate.
On the other hand, in patent documentation 4, disclose without B 2The such perforation method of it forms the technology in the past that is made up of via the conductor salient point.At this in the past in the technology, on the conductor group of bumps that is formed on first metal forming, through the coating of curtain formula rubbing method insulating resin composition, overlapping above that again second metal forming and pressurization.The method of coating insulating resin composition also records spraying process and makes insulating resin composition become the membranaceous of thermal softening property except curtain formula rubbing method, the method that covers from the conductor salient point.In patent documentation 4 disclosed methods, the conductor salient point is not applied the pressure of machinery, so can avoid described B 2Problem among the it.; This method directly is coated on full-bodied insulative resin on the conductor salient point with liquid condition with curtain formula rubbing method; Therefore become droplet-like to full-bodied insulative resin with spray-on process and be coated on the conductor salient point, exist insulative resin easily attached to the high problem of incidence of the loose contact of the problem on the conductor salient point leading section and the conductor salient point and second metal forming.This is external to cover thermal softening property film under the situation on the conductor salient point, and the leading section of conductor salient point does not expose, and therefore has the problem that connects between can not cambium layer.
In addition, in the manufacturing approach of in the past multi-layer wire substrate, exist warpage to cause the problem that between multilayer wiring, produces bad connection because of core substrate.(b) of Fig. 8 and (c) of Fig. 8 are the cutaway views that the manufacturing approach of the multilayer wiring of expression through in the past produces bad connection between the wiring.In (b) of Fig. 8, form first core substrate 213 and second core substrate 208 of wiring from the teeth outwards, range upon range of through insulative resin layer 211 with the relative each other mode of wiring side.The part zone of wiring 212 and a part of zone passage conductivity salient point 210 of wiring 209 are electrically connected.Produce at core substrate under the situation of big warpage, for example, shown in Fig. 8 (b), become at central portion under the situation of protruding warpage,, cause producing short-circuit owing to should be in contact with one another by being insulated property resin bed 211 separated wiring layers.On the other hand, shown in Fig. 8 (c), 218 do not contact each other with wiring in wiring 215, under the situation by 217 insulation of insulative resin layer, conductivity salient point 216 that should be electrically connected, periphery does not contact with relative wiring, and generation is connected up and opened a way.In the manufacturing approach of in the past multi-layer wire substrate, can produce the wiring bad connection that the warpage because of substrate causes, therefore there is the problem that can not fully improve the fabrication yield of multilayer circuit board.
Summary of the invention
The technical problem that the present invention will solve
The purpose of this invention is to provide the manufacturing approach of a kind of multilayer circuit board with parts and multilayer circuit board; According to these parts, can realize miniaturization, densification and the slim multiple stratification of multilayer circuit board, and the layer insulation property of multilayer circuit board might as well; In addition; According to this manufacturing approach, can provide the connection reliability that utilizes the fine conductivity salient point of interlayer high wiring board, and fabrication yield is high, low cost of manufacture.
The technical scheme of technical solution problem
(1) of the present invention is multilayer circuit board, it is characterized in that comprising: the conductivity group of bumps is formed between first conductor layer and second conductor layer; And insulating barrier, be formed on said conductivity group of bumps around, contain the insulating properties filler that prevents that short circuit from using.
(2) of the present invention are multilayer circuit boards, it is characterized in that comprising: the conductivity group of bumps is formed between first conductor layer and second conductor layer; And insulating barrier, be formed on said conductivity group of bumps around, contain the insulating properties filler, wherein, the average grain diameter of said insulating properties filler is more than 20% below 100% of average height of the said conductivity group of bumps after the laminating hot pressing.
(3) of the present invention are like (1) of the present invention or (2) of the present invention described multilayer circuit board; It is characterized in that; Said insulating barrier is through under the condition that in fact curing reaction does not take place, making solvent evaporates make the film attenuate at the resin that makes the insulative resin mixed liquor that contains the insulating properties filler, the layer that the said resin solidification that contains the insulative resin mixed liquor of insulating properties filler is formed.
(4) of the present invention are like any described multilayer circuit board in (1) of the present invention to (3) of the present invention; It is characterized in that said insulating properties filler is one or more materials of from silicon dioxide, carborundum, aluminium oxide, aluminium nitride, zirconium oxide bead (ジ Le コ ニ ア PVC one ズ), bead, acrylic acid pearl, selecting.
(5) of the present invention are that said insulating properties filler is below the above 30vol% of 1vol% with respect to the addition of said insulative resin mixed liquor like any described multilayer circuit board in (1) of the present invention to (4) of the present invention.
(6) of the present invention are like any described multilayer circuit board in (1) of the present invention to (5) of the present invention; It is characterized in that said insulative resin mixed liquor has used epoxy resin, bismaleimide-triazine resin, polyimide resin, acrylic resin, phenolic resins (Off ェ ノ one Le resin), oligomerisation phenylene ether (ォ リ go Off ェ ニ レ Application ェ one テ Le) resin, polyether resin and melmac.
(7) of the present invention are like any described multilayer circuit board in (1) of the present invention to (6) of the present invention, it is characterized in that the relation of the height h2 of said conductivity group of bumps and the thickness t 3 of said insulating barrier is: h2 >=t3.
(8) of the present invention are like any described multilayer circuit board in (1) of the present invention to (7) of the present invention; It is characterized in that the resin combination that constitutes said conductivity group of bumps is processed by adding thermoplastic resin to obtain in the thermosetting resin material with the mixing ratio below the above 30wt% of 10wt%.
(9) of the present invention are the manufacturing approaches of multilayer circuit board, it is characterized in that comprising at least: the operation that on conductor layer, forms the conductivity group of bumps of overshooting shape; Through being coated with the insulative resin mixed liquor that contains insulating properties filler and volatile solvent on the said conductor layer with on the said conductivity group of bumps, form the operation of mobile coverlay; Through making said volatile solvent volatilization and making said mobile coverlay attenuate, form the operation of the uncured coverlay of insulating properties; And, make the uncured coverlay generation of said insulating properties curing reaction to conductor layer or core substrate through after being layered on the uncured coverlay of said insulating properties, form the operation of insulating barrier.
(10) of the present invention are the manufacturing approaches of multilayer circuit board, it is characterized in that comprising at least: the operation that on first core substrate, forms the conductivity group of bumps of overshooting shape; Through on said conductivity group of bumps, being coated with the insulative resin mixed liquor that contains insulating properties filler and volatile solvent, form the operation of mobile coverlay; Through making said volatile solvent volatilization and making said mobile coverlay attenuate, form the operation of the uncured coverlay of insulating properties; And, make the uncured coverlay generation of said insulating properties curing reaction to conductor layer or second core substrate through after being layered on the uncured coverlay of said insulating properties, form the operation of insulating barrier.
(11) of the present invention are the manufacturing approaches of multilayer circuit board, it is characterized in that comprising at least: the operation that on first core substrate, forms the conductivity group of bumps of overshooting shape; Through on the conductor layer or second core substrate, being coated with the insulative resin mixed liquor that contains insulating properties filler and volatile solvent, form the operation of mobile coverlay; Through making said volatile solvent volatilization and making said mobile coverlay attenuate, form the operation of the uncured coverlay of insulating properties; And with said first core substrate be formed with the conductor layer of the uncured coverlay of said insulating properties or the operation of the second core substrate laminating hot pressing.
(12) of the present invention are the manufacturing approaches of multilayer circuit board; It is characterized in that comprising at least:, form the operation of mobile coverlay through on first conductor layer that is configured on first core substrate, being coated with the insulative resin mixed liquor that contains insulating properties filler and volatile solvent; Through making said volatile solvent volatilization and making said mobile coverlay attenuate, form the operation of the uncured coverlay of insulating properties; On second conductor layer or second core substrate, form the operation of the conductivity group of bumps of overshooting shape; And with the operation of said first core substrate and said insulating barrier laminating hot pressing.
(13) of the present invention are the manufacturing approaches of multilayer circuit board; It is characterized in that; On first conductor layer, form the conductivity group of bumps; The insulative resin mixed liquor that contains insulating properties filler and volatile solvent through coating forms mobile coverlay; Through making said volatile solvent volatilization and making said mobile coverlay attenuate form the uncured coverlay of insulating properties; Thereby form multilayer circuit board and use parts; Form one or more said multilayer circuit boards with parts after, through once comprise with said multilayer circuit board with stacking part hot pressing on the core substrate and operation or repeated multiple times that said multilayer circuit board forms second conductor layer on parts comprise with said multilayer circuit board with stacking part hot pressing on the core substrate and said multilayer circuit board with parts on the operation of formation second conductor layer, form multilayer circuit board.
(14) of the present invention are the manufacturing approaches of multilayer circuit board; It is characterized in that; On first conductor layer, form the conductivity group of bumps, the insulative resin mixed liquor that contains insulating properties filler and volatile solvent through coating forms mobile coverlay, through making said volatile solvent volatilization and making said mobile coverlay attenuate form the uncured coverlay of insulating properties; Thereby form multilayer circuit board and use parts; Form one or more said multilayer circuit boards with parts after, through one or more said multilayer circuit boards with parts in a lump laminating hot pressing on core substrate, form multilayer circuit board.
(15) of the present invention are like the manufacturing approach of any described multilayer circuit board in (9) of the present invention to (14) of the present invention, it is characterized in that the content of the fixedness composition in the said insulative resin mixed liquor is 10 weight %～80 weight %.
(16) of the present invention are like (9) the of the present invention manufacturing approach of any described multilayer circuit board in (15) of the present invention, it is characterized in that, the drying/setting temperature of said insulating barrier (universe dry/curing temperature) is more than 60 ℃ below 160 ℃.
(17) of the present invention are the manufacturing approaches of any described multilayer circuit board in (9) of the present invention to (16) of the present invention; It is characterized in that the resin combination that constitutes said conductivity group of bumps is processed by adding thermoplastic resin to obtain in the thermosetting resin material with the mixing ratio below the above 30wt% of 10wt%.
(18) of the present invention are the manufacturing approaches like any described multilayer circuit board in (9) of the present invention to (17) of the present invention; It is characterized in that the temperature of said laminating hot pressing is below the beginning temperature of insulative resin curing reaction and more than the temperature that the heat fusing viscosity of insulative resin reduces.
Effect of the present invention
Effect of the present invention is following.
1. and B 2It relatively
Do not have the conductivity salient point to connect operation, therefore parts are not applied mechanical pressure.
Owing to can make the insulating barrier attenuation, so can reduce the height of conductivity salient point.In addition,, also via can be formed, thus, the size decreases of conductivity salient point can be made even the draw ratio of conductivity salient point is little.Its result can make and has the high-density multi-layered wiring board that external diameter is the conductivity salient point of 30～50 μ m.The present invention also can tackle 1,000,000/m in the future 2The conductivity bump density.
The draw ratio of conductivity salient point need not be improved,,, also the conductivity salient point can be formed even perhaps repeatedly be not used to form the slurry painting process of conductivity salient point repeatedly even therefore do not use special electrocondution slurry.Therefore can reduce material cost and manufacturing cost.
The disqualification rate that causes because of the damage of conductivity salient point, wiring and insulating properties coverlay reduces.
The nargin of creating conditions is big, and therefore, to connect the draw ratio of needed conductivity salient point little even be used to form good interlayer, also can improve fabrication yield.
2. with the comparison of ALIVH
In the present invention, do not use laser drilling, therefore can eliminate the inhomogeneities of position, hole shape.In manufacturing process, the shape inhomogeneities that causes because of the laser drilling method can cause bore portion and via conductive agent bonding bad.Bonding bad meeting causes that liquid or moisture permeate in wiring board, become one of reason that produces various defective.Relative therewith; According to manufacturing approach of the present invention; Through being coated with the interface that the low liquid resin of viscosity forms conductivity salient point and insulating properties coverlay around the conductivity salient point, so it is all very high to be equivalent to the reliability of cementability and wiring board of conductivity salient point and insulating properties coverlay of via.
The present invention is the mode of once all making a plurality of vias, also can not increase manufacturing cost even therefore increase the quantity of via.
3. plate the comparison of mode with through hole
The present invention is fit to miniaturization because the space availability ratio of via is high.Structure of the present invention is the structure that is full of the interlayer connecting hole with electroconductive component, so good heat dissipation effect, is fit to install the big parts of caloric value such as high-speed CPU.Owing to can not produce pit, thus wiring and other vias on via, also can be formed, and also can installing component on the via of top layer, therefore can improve packing density.
4. with the difference that is coated with the mode of insulating resin composition through curtain formula rubbing method
Manufacturing approach of the present invention is to form the thickness that coverlay reduces coverlay through the lower resin mixture liquor of coating concentration; Thereby the mode that the conductivity salient point is exposed; Therefore insulative resin can not remain on the conductivity salient point leading section, therefore can form the resistance that reliable interlayer connects and reduce via.
5. in the present invention,, also can form via even make conductivity salient point upper section be shaped as central angle less than 180 ° smooth circular arc.Different with the conductivity salient point that the head area that uses in the previous methods is little, the area of section of via is big.In addition, the residual quantity of insulating properties material of the contact site of via and wiring is reduced, therefore can obtain big via and the contact area of wiring, so can reduce the resistance of via.
6. in the present invention,, make multilayer circuit board through range upon range of board part with the uncured coverlay of insulating properties.
The adhesive strength of insulating properties coverlay and conductive pattern uprises, and therefore wiring is difficult to peel off.
Adhesive strength between the adjacent insulation property coverlay uprises, and therefore can make firm multilayer circuit board.
Therefore the insulating properties coverlay has flexibility, even substrate is uneven, because good film-forming property, so that the surface becomes is smooth.
The conductivity salient point uprises with the adhesive strength of the wiring that is in contact with it, and therefore can reduce the resistance of via.
7. through the combination of the etch process of thick-film technique and conductive membrane, can reduce the manufacturing cost of high-density multi-layered wiring board.
8. can provide packing density high multilayer circuit board, therefore help the miniaturization and and the multifunction of electronic equipment.
9. utilize the low insulating properties material of relative dielectric constant, dielectric loss to form the insulation coverlay, therefore can make the good installation wiring board of signal of telecommunication transmission characteristic.Especially in the use of claim 17 shown ADFLEMA (trade name, manufactured Namics Corporation) in the case of the OPE series, the relative dielectric constant and dielectric loss tangent (dielectric is then) becomes low, it can produce an electrical signal excellent transmission characteristics of the installation of circuit boards.In addition because the content of solvent is big, so can easily form thin insulating properties coverlay.
10. use the wiring material of good conductivity to form wiring and conductivity salient point, therefore, can reduce heat treatment temperature, make the thickness attenuation of wiring,, also can produce the good installation wiring board of signal of telecommunication transmission characteristic even wiring width is thin in addition.
11. can therefore compare through the range upon range of multilayer circuit board of making in a lump with the method for making multilayer circuit board through sequential cascade, can reduce the worker ordinal number, therefore can reduce manufacturing cost.In addition, heat history that board part is applied is reduced, therefore improve parts and the reliability of the multilayer circuit board that forms by these parts.
12. in insulating properties coverlay material, be dispersed with the insulating properties filler, therefore can reduce the disqualification rate that wirings such as the short circuit that causes because of the core substrate warpage or open circuit connect, therefore can improve the rate of finished products of manufacturing.
Description of drawings
(a) of Fig. 1 is the cutaway view of process sequence of first object lesson of expression multilayer circuit board component manufacturing method execution mode of the present invention to (d).
(a) of Fig. 2 is the cutaway view of process sequence of second object lesson of expression multilayer circuit board component manufacturing method execution mode of the present invention to (d).
(a) of Fig. 3 is the cutaway view of process sequence of the 3rd object lesson of expression multilayer circuit board component manufacturing method execution mode of the present invention to (f).
(a) of Fig. 4 is the cutaway view of process sequence of first object lesson of the manufacturing approach execution mode of expression multilayer circuit board of the present invention to (i).
(a) of Fig. 5 is the cutaway view of process sequence of second object lesson of the manufacturing approach execution mode of expression multilayer circuit board of the present invention to (d).
(a) of Fig. 6 and (b) be the cutaway view of process sequence of the 3rd object lesson of the manufacturing approach execution mode of expression multilayer circuit board of the present invention.
(a) of Fig. 7 is the cutaway view of the priming operation processing method of multilayer circuit board component manufacturing method execution mode of the present invention being described respectively or being coated with the surface layer processing method to (d).
(a) of Fig. 8 is the cutaway view that is used for the manufacturing approach of the manufacturing approach of multilayer circuit board more of the present invention and multilayer circuit board in the past to (c).
Fig. 9 is expression conducting stability and the figure that packless relation is arranged.
(a) of Figure 10 is the figure of conduction with the relation of filler diameter of expression conductivity salient point to (c), and (d) of Figure 10 is the figure of relation that representes conduction and the filler addition of conductivity salient point to (f).
(a) of Figure 11 and (b) be the figure of the thickness (highly) of representing the conductivity salient point respectively or resistance value and the thermoplastic resin amount's that in the conductivity salient point, adds relation.
(a) of Figure 12 is the figure that is used to explain the dimensional parameters definition of multilayer line plate member of the present invention to (c).
Figure 13 is the vertical view and the cutaway view of the measuring test pattern of resistance.
(a) of Figure 14 is the cutaway view and the stereogram of process sequence of representing the manufacturing approach of multilayer circuit board in the past to (d).(e) of Figure 14 is the horizontal cross on the conductivity salient point top of multilayer circuit board in the past.
Description of reference numerals
1,11,21 conductivity paper tinsels
2,12,22,42 conductivity salient points
3,13,23,26,43 mobile coverlays
5, the uncured coverlay of 15,27,45 insulating properties
4,14,24,44 insulating properties fillers
25 do not reach completely crued insulating properties solidifies coverlay
41 supporting substrates
51,53,57,58,59,60 multilayer line plate member
52 core substrates
55,61 conductivity paper tinsels
54,62 resist patterns
56,63 wirings
66 multilayer circuit boards
71,79 conductivity paper tinsels
72,73,74,76,77,78 multilayer line plate member
75 core substrates
80 insulating properties fillers
81,82 multilayer line plate member
83 wirings
84 resist patterns
85 circuit boards
91,95,96,100 core substrates
92, the uncured coverlay of 97 insulating properties
93,98 insulating properties fillers
94,99 conductivity salient points
121,123,125,127,129,133 multilayer line plate member
122,126,131,137 core substrates
124,128,134,140 conductivity paper tinsels
130,132,135,139 conductivity salient points
136, the uncured coverlay of 138 insulating properties
201,207,208,213,214,219 core wiring plates
202,206,209,212,215,218 wirings
204,211,217 insulative resin layers
205 insulating properties fillers
203,210,216 conductivity salient points
221 conductivity salient points
222 mobile coverlays
The uncured coverlay of 223 insulating properties
231,232 measurement terminal
The wiring of 233 second layers
The wiring of 234 ground floors
235 vias
236 insulating properties coverlays
501,505 conductivity paper tinsels
502 conductivity salient points
503,506 prepregs
508 broken bits
507 conductivity salient point surfaces
Embodiment
Following specific embodiments of the invention describes.
(multilayer line plate member, multilayer circuit board, composite multi-layer wiring board)
In the manufacturing of multilayer circuit board; Form multilayer line plate member as the parts that constitute multilayer circuit board (wiring board with parts or only be called board part); Thereafter a plurality of described multilayer circuit board stacking parts, pressurization under heated condition forms multilayer circuit board.Particularly through with surface circuit layer and the low range upon range of multilayer circuit board that obtains of core substrate of conductivity bump density; Be called the composite multi-layer wiring board; Said surface circuit layer comprises through utilizing technology of the present invention multilayer line plate member that make, that the conductivity bump density is high; Perhaps, also only call multilayer circuit board to the composite multi-layer wiring board that comprises core substrate sometimes.Core substrate is born rigidity physically.In addition, on core substrate, form circuit such as so not fine power-supply wiring and ground connection wiring.On the surface circuit layer of core substrate, form fine wiring.Through utilizing technology of the present invention manufacturing to constitute the multilayer line plate member of surface circuit layer, the etch process combination the thick-film technique of low cost of manufacture and conductive membrane that can microfabrication can form the high composite multi-layer wiring board of packing density.
(Stacked all at once (a plot enclosed layer) are sequentially stacked, the core substrate - the core substrate lamination)
Being called as range upon range of in a lump method is after formation has the multilayer line plate member of wiring, laminating hot pressing of a plurality of multilayer line plate member, makes the method for multilayer circuit board; Or, make the method for composite multi-layer wiring board a plurality of multilayer line plate member and laminating hot pressing of core substrate.On the other hand, in being called as the method for sequential cascade, implement following operation repeatedly; Formation has wiring or does not have the multilayer line plate member of wiring; Paste the conductivity paper tinsel above that, after etching formation wiring, be placed on next multilayer line plate member above it; Carry out laminating hot pressing, make multilayer circuit board or composite multi-layer wiring board thus.
Range upon range of in a lump owing to reducing process number, so can reduce manufacturing cost.Therefore in addition, the heat history that board part is applied is few, has parts and the high advantage of reliability of the multilayer circuit board that formed by these parts.B in the past 2It is difficult to carry out range upon range of in a lump.Technology of the present invention can easily be implemented through the range upon range of multilayer circuit board of making in a lump.
On the other hand, sequential cascade has and need not position by wiring pattern, only the conductivity salient point positioned with regard to passable advantage., each range upon range of multilayer line plate member all need be carried out etching and laminating hot pressing, has therefore increased process number, thereby manufacturing cost uprises, heat history increases, and therefore has the problem of the reliability reduction of parts.
In core substrate-core substrate was range upon range of, configuration one deck insulating properties coverlay utilized the conductivity salient point to make between the core substrate and is electrically connected between core substrate and core substrate.
As the variation of the execution mode of the manufacturing approach of multilayer circuit board of the present invention, comprise that range upon range of in a lump, sequential cascade and core substrate-core substrate are range upon range of.
(wiring board is used member manufacturing method)
The wiring board of embodiment of the present invention with member manufacturing method in, overshooting shape conductivity salient points such as truncated cone or general cylindrical use as the interlayer link substantially.In addition, go up with on every side at the conductivity salient point (conductivity group of bumps) that is formed on the support unit to high-density, coating insulative resin mixed liquor forms mobile coverlay thus.At the resin that make insulative resin mixed liquor be not cured the condition of reaction under, make solvent evaporates, said mobile coverlay is solidified and make the coverlay attenuate, make this flowability coverlay become the insulating properties coverlay thus thereafter.
Thought if under the situation that the conductivity salient point is not exposed, the multilayer circuit board stacking part is pressurizeed in the past, can not realize then that interlayer was electrically connected.; The inventor finds that it not is necessary that the conductivity salient point is exposed, that is, the inventor finds first: through range upon range of under the state of uncured coverlay the insulative resin that wiring board is electrically separated; It is carried out hot pressing, can make multilayer circuit board or composite multi-layer wiring board; And can realize that interlayer is electrically connected with high stability according to this method.Simultaneously confirm that also multilayer circuit board or composite multi-layer wiring board through this method produces have the reliability of good electrical connection.In addition, multilayer circuit board of the present invention under the situation that the conductivity salient point is exposed, though can increase process number, with identical under the situation that the conductivity salient point is not exposed, all has the effect that can tackle high-density installation etc.Compare with the situation that the conductivity salient point is not exposed, can further improve the conducting stability between the wiring.Under the situation that the conductivity salient point is exposed; Append and carry out following operation: through making at least a portion solvent evaporation of said mobile coverlay; Reduce the thickness of said insulating properties coverlay, the leading section of said conductivity salient point is given prominence on said insulating properties coverlay.When only on the conductivity salient point, being coated with the insulative resin mixed liquor thinly, resin mixture liquor can remain on the leading section of conductivity salient point.If after being coated with the resin mixture liquor thicker, make solvent evaporation, the conductivity salient point is exposed than the height of conductivity salient point.
In addition, in this manual, after the coating resin mixed liquor, the insulating properties coverlay of thickness before reducing call mobile coverlay.On the other hand, the insulating properties coverlay before, curing reaction back reducing at thickness begins calls the uncured coverlay of insulating properties.Thus, the two difference is come.
In the present invention, with pass through B 2The manufacturing approach that the such perforation of it is given prominence on the insulating properties coverlay conductivity salient point front end is different, around the conductivity salient point, forms the stage of insulating properties coverlay, and conductivity salient point and insulating properties coverlay are not applied mechanical pressure.Therefore, the present invention can tackle the densification of conductivity salient point aspect the mechanical endurance of insulating properties coverlay.In addition, can reduce the bottom surface diameter of conductivity salient point.In addition, can also reduce the draw ratio of conductivity salient point.Therefore, the design margin of conductivity salient point shape and the nargin of creating conditions are improved, therefore can improve the fabrication yield of multilayer circuit board.
Multilayer circuit board of the present invention is characterised in that with parts; Through being dissolved in resin-cast in the solvent around group of bumps; After fully around the adhesional wetting conductivity salient point; Make the resin drying that is dissolved in the solvent/solidify, thereby obtain the uncured coverlay of insulating properties, therefore have the structure that conductivity salient point and resin closely bond.On the other hand, for example in the past B 2Insulative resin among the it is the solid thin-sheet after the solvent evaporation that makes that is commonly referred to as the B stage.At B 2Among the it, make this solid thin-sheet softening through utilizing heating, thereby make the conductivity salient point connect this thin slice.In such method, perforation is the perforation of breaking and carrying out through forcing, and therefore often around salient point, forms the gap, compares the poor reliability of conductivity salient point and resin bonding with the present invention.
(dispersion of insulating properties filler)
For solve front narration because of substrate warp causes the problem of interlayer wiring bad connection, the inventor finds: the fillers dispersed that makes insulating properties is very effective in the interlayer dielectric of multilager base plate.
Multilayer circuit board of the present invention is characterised in that it comprises: the conductivity group of bumps is formed between first conductor layer and second conductor layer; And insulating barrier, be formed on around the said conductivity group of bumps, contain and be useful on the insulating properties filler that makes conduction stable.In addition, preferably, more than 20% in the scope below 100% of the average height of the conductivity group of bumps of the average grain diameter of insulating properties filler after laminating hot pressing.
(a) of Fig. 8 is the cutaway view of multi-layer wire substrate of the present invention.Core substrate 201 is stacked together through the insulative resin layer 204 that is dispersed with insulating properties filler 205 with core substrate 207.The wiring of wiring and core substrate 207 1 sides that is configured to core substrate 201 1 sides is relative each other.Part wiring zone passage conductivity salient point 203 is electrically connected.On core substrate, the big warpage in the outstanding shape of central portion is for example arranged, therefore, the distance between the core substrate is big at the core substrate periphery.For the interlayer of realizing substrate periphery portion connects, must make the core substrate close enough.Under the situation that is not dispersed with the insulating properties filler, shown in Fig. 8 (b), the wiring of substrate center portion is short-circuited.According to manufacturing approach of the present invention, in insulative resin layer 204, be dispersed with the insulating properties fillers such as silicon dioxide little to pressurizing and deformation, therefore shown in Fig. 8 (a), also be difficult to take place short-circuit in substrate center portion.
Explanation as above is said, and multilayer circuit board of the present invention is characterised in that, the insulating barrier that contains the insulating properties filler that prevents that short circuit from using as component part.Use this purpose that prevents the insulating barrier that short circuit is used not only to be to prevent the short circuit between a plurality of conductors, also be not influence the conduction of the above-below direction that is used for the conductivity salient point that the interlayer to multilayer circuit board is electrically connected and guarantee that the thickness of insulating barrier is used to prevent short circuit.
(thin-film technique and thick-film technique)
The process technology of making the multilayer circuit board use generally is divided into thin-film technique and thick-film technique.
Thin-film technique is to be the process technology at center with vacuum technology and wet processing.The film that in thin-film technique, uses forms that technology can give an example has vapor deposition, sputter, CVD, PVD, plating etc.In addition, pattern formation technology can be given an example has technology such as photoetching, dry ecthing.For the installation wiring board that is called as wiring board or printed substrate, generally in the processing of 50 μ m or 50 μ m fine wiring width below horizontal, spacing, thin-film techniques such as semi-additive process have been used.According to this technology, though can carry out the processing of fine pattern, there is the high problem of manufacturing cost in this technology.
Relative therewith, thick-film technique is representational to be that silk screen printing etc. is to be printed as the process technology at center.Thick-film technique is a dry process, and is the technology under atmospheric condition.Thick-film technique has the manufacturing cost characteristic lower than thin-film technique.
For example, in order to make the high multilayer circuit board of wiring density of the wiring width that has below the 100 μ m, must make the bottom surface diameter of overshooting shape conductivity salient point that connects via as interlayer simultaneously below 100 μ m.But in the manufacturing approach of the prepreg that connects insulative resin as the usefulness conductivity salient point of previous methods, present situation is that the thickness of prepreg is minimum also more than 30 μ m.In order stably to connect said thickness, need make the height of conductivity salient point be about more than 3 times of prepreg thickness with the conductivity salient point.Therefore, in order to make the miniaturization of conductivity salient point diameter, have to increase the draw ratio of conductivity salient point, the fine conductivity salient point that forms below the 100 μ m φ is very difficult.In the past in order to realize having via diameter and the high-density circuit board of wiring width below the 100 μ m; General manufacturing cost and the big thin-film technique (for example form the fine wiring pattern case, form fine via) of manufacturing equipment investment used with sensitization guide hole method (Off ォ ト PVC ア method) with semi-additive process.
(organic wiring board)
Multilayer circuit board is different because of baseplate material, generally is divided into organic wiring board and inorganic wiring board.The present invention is object to use organic material as organic wiring board of insulating properties baseplate material.
(definition of the term relevant) with insulating barrier, conductor layer
In this manual, relevant with insulating barrier term definition as follows.
Call " insulative resin mixed liquor " to the liquid that insulative resin is dissolved under the state in the solvent.After being coated on this insulative resin mixed liquor on the parts, the film that solvent evaporates is obtained is called " the uncured coverlay of insulating properties ".To the heating of the uncured coverlay of this insulating properties, the film that the resin generation curing reaction that is contained in the uncured coverlay of insulating properties is obtained is called " insulating properties coverlay ".Insulating properties coverlay under the state that is layered on conductor layer or the core substrate is called " insulating barrier ".
In addition, " conductor layer " is the high layers of electric conductivity such as metal, for example comprises pattern layers, solid layer (ベ layer), contact layer.
[the multilayer line plate member of embodiment of the present invention and its manufacturing approach]
(first object lesson of multilayer circuit board member manufacturing method)
(a) of Fig. 1 is the cutaway view of process sequence of first object lesson of the execution mode of expression multilayer circuit board component manufacturing method of the present invention to (d) of Fig. 1.At first, prepare conductivity paper tinsel 1 (Fig. 1 (a)) such as Copper Foil.Assigned position on conductivity paper tinsel 1 forms conductivity salient point 2 (Fig. 1 (b)) then.Preferably, make the shape of conductivity salient point 2 become the leading section diameter of section shape littler such as truncated cone or general cylindrical substantially than base diameter.For example the silk screen printing through electrocondution slurry forms the conductivity salient point.As the electrocondution slurry of the material that constitutes conductivity salient point 2, for example use through metallic particles (silver, gold, copper, scolding tin etc.) is dispersed in and obtain material after also sneaking into volatile solvent as required in the liquid resin.Be printed as regulation shape and specified altitude to the conductivity salient point.Under the situation of the height that needing can not obtain through a silk screen printing, repeatedly print repeatedly on the shape limit of limit change mask (マ ス Network) as required.Then through be coated on the insulative resin mixed liquor that is dispersed with insulating properties filler 4 on the conductivity salient point 2 with conductivity salient point 2 around, form mobile coverlay 3 (Fig. 1 (c)).Make mobile coverlay 3 dryings then, make solvent evaporation, obtain the uncured coverlay 5 of insulating properties thus, thereby be made as the board part (Fig. 1 (d)) of multilayer line plate member.Shown in Fig. 1 (d), in first object lesson, the thickness of the uncured coverlay 5 of insulating properties is bigger than the height of conductivity salient point 2, and this stage that is illustrated in Fig. 1 (d) need not make the conductivity salient point expose.
(second object lesson of multilayer circuit board member manufacturing method)
(a) of Fig. 2 is the cutaway view of process sequence of second object lesson of the execution mode of expression multilayer circuit board component manufacturing method of the present invention to (d) of Fig. 2.At first, prepare conductivity paper tinsel 11 (Fig. 2 (a)) such as Copper Foil.Assigned position on conductivity paper tinsel 11 forms conductivity salient point 12 (Fig. 2 (b)) then.Preferably, make the shape of conductivity salient point 12 become the diameter shape littler in leading section cross section such as truncated cone or general cylindrical substantially than base diameter.For example, the silk screen printing through electrocondution slurry forms the conductivity salient point.Electrocondution slurry as conductivity salient point 12 materials for example uses through metallic particles (silver, gold, copper, scolding tin etc.) being dispersed in the liquid resin and sneaking into the material that obtains behind volatile solvent as required.Be printed as regulation shape and specified altitude to the conductivity salient point.Under the situation of the height that needing can not obtain through a silk screen printing, repeatedly print repeatedly on limit change mask shape limit as required.Then through be coated on the insulative resin mixed liquor that is dispersed with insulating properties filler 4 on the conductivity salient point 2 with conductivity salient point 12 around, form mobile coverlay 13 (Fig. 2 (c)).Then; For example heat, make the amount of the volatile ingredient evaporation regulation that is contained in the mobile coverlay 13, reduce the thickness of mobile coverlay 13 thus through drying oven; Obtain the uncured coverlay 15 of insulating properties, thereby be made as the board part (Fig. 2 (d)) of multilayer line plate member.At this moment, adjustment is contained in the amount and the heating condition of the volatile ingredient in the insulative resin mixed liquor, and to reduce the thickness of mobile coverlay 13, its result exposes the leading section of conductivity salient point 12.
(the 3rd object lesson of multilayer circuit board member manufacturing method)
(a) of Fig. 3 is the cutaway view of process sequence of the 3rd object lesson of the execution mode of expression multilayer line board fabrication method of the present invention to (j).At first, prepare conductivity paper tinsel 21 (Fig. 3 (a)) such as Copper Foil.Then, the assigned position on conductivity paper tinsel 21 forms conductivity salient point 22 (Fig. 3 (b)).Preferably, make the shape of conductivity salient point 22 become the diameter shape littler in leading section cross section such as truncated cone or general cylindrical substantially than base diameter.For example, the silk screen printing through electrocondution slurry forms the conductivity salient point.Electrocondution slurry as conductivity salient point 22 materials for example uses through metallic particles (silver, gold, copper, scolding tin etc.) being dispersed in the liquid resin and sneaking into the material that obtains behind the volatile solvent as required.Be printed as regulation shape and specified altitude to the conductivity salient point.Under the situation of the height that needing can not obtain through a silk screen printing, repeatedly print repeatedly on limit change mask shape limit as required.Then, through be coated on the insulative resin mixed liquor that is dispersed with insulating properties filler 24 on the conductivity salient point 22 with conductivity salient point 22 around, form mobile coverlay 23 (Fig. 3 (c)).Then; For example heat, make the amount of the volatile ingredient evaporation regulation that is contained in the mobile coverlay 23, reduce the thickness of mobile coverlay 23 thus through drying oven; Obtain the uncured coverlay 25 of insulating properties, thereby be made as the board part (Fig. 3 (d)) of multilayer line plate member.At this moment, adjustment is contained in the amount and the heating condition of the volatile ingredient in the insulative resin mixed liquor, and to reduce the thickness of mobile coverlay 23, its result exposes the leading section of conductivity salient point 22.Reduce the heating in the operation through thickness, the flowability of the uncured coverlay 23 of insulating properties changes, and forms insulating properties coverlay 25 thus.Preferably, be adjusted to insulating properties coverlay 25 beginning curing reactions to the heating condition of insulating properties coverlay 25 but do not reach completely crued degree.Thus, the cementability in the time of can not making range upon range of insulating properties coverlay worsens, and makes that the process circuit plate becomes easy when forming conductive pattern overleaf.Then, form diaphragm 26 (Fig. 3 (e)) through being layered on insulating properties coverlay 34 that thickness reduced and the conductivity salient point 22.Diaphragm 26 is made up of the organic resin film (for example Network レ ラ ッ プ, パ ィ レ Application, nylon, PET, PPT or PI) that the leading section that can make conductivity salient point 22 is absorbed in wherein.As subsequent handling go up printing conductive property pattern overleaf the time, conductivity salient point 22 is indeformable to form diaphragms 25 with damage in order to protect.Then, on the conductivity paper tinsel 21 at insulating properties coverlay 25 back sides, for example form the resist pattern through photoetching process.Make the resist pattern become mask through wet etching then, conductivity paper tinsel 21 is carried out etching, remove the resist pattern thus, form wiring 27, peel off diaphragm 25 (Fig. 3 (g)).Then, through be coated on the insulative resin mixed liquor on the conductivity salient point 22 with conductivity salient point 22 around, form mobile coverlay 28 (Fig. 3 (h)).Then,, make the amount of the volatile ingredient evaporation regulation that is contained in the mobile coverlay 28, reduce the thickness of mobile coverlay 28 thus, obtain the uncured coverlay 29 of insulating properties, thereby process board part (Fig. 3 (i)) for example through the drying oven heating.Insulating properties coverlay 29 is uncured coverlays, therefore can improve insulating properties coverlay 29 and the cementability that contacts range upon range of parts with insulating properties coverlay 29.
[with relevant detailed descriptions such as manufacturing approach, materials]
Below to conductivity salient point, insulating properties coverlay and connect up relevant, the suitable manufacturing approach and the material etc. of the multilayer line plate member that constitutes embodiment of the present invention, be elaborated.
[manufacturing approach]
(formation of conductivity salient point)
1. the preparation section of electrocondution slurry
Through with the dissolving of resin combination and conductive particle or be dispersed in the solvent, prepare employed electrocondution slurry.
2. the printing of electrocondution slurry, drying/solidify operation
For example utilize silk screen print method to form the conductivity salient point.That is, the mask through using regulation in the circuit board or on the supporting substrates, forms the conductivity salient point to the electrocondution slurry printing.In order to be formed with the conductivity salient point of specified altitude and draw ratio, can use different masks repeatedly to print as required.
(formation of insulating properties coverlay)
1. the preparation section of insulative resin mixed liquor
Through dissolving compositions of thermosetting resin or being dispersed in the solvent, prepare the insulative resin mixed liquor.As solvent for example with an organic solvent.As what organic solvent can be given an example ketone series solvent, aromatic series series solvent arranged.For example the former can give an example has MEK and a methyl iso-butyl ketone (MIBK), and the latter can give an example has toluene and xylenes.
Make the insulating properties fillers dispersed simultaneously in solvent.Preferably, the insulating properties uniform filling is dispersed in the solvent.The insulating properties filler with respect to the addition of insulating resin composition preferably more than 10vol% (10 volume %).
About the use amount of solvent, for making the conductivity salient point, the evaporation through solvent suitably exposes, and preferably, the content that is adjusted to volatile ingredient in the insulative resin mixed liquor becomes suitable scope.For example preferably, through the solvent dilution resin, make N.V. (content of fixedness resinous principle) in the scope of 10 weight %～80 weight %.In addition, the viscosity of insulative resin mixed liquor is preferably in the scope of 100～600mPas.If viscosity is low excessively, then have when the coating resin mixed liquor, because of resin mixture liquor trickling cause can not the coating resin mixed liquor problem.If viscosity is too high, then there is the problem of the flatness deterioration of coating surface.
Epoxy resin that in the manufacturing of multilayer circuit board insulating properties coverlay of the present invention, uses and oligomerisation phenylene ether resin all are solids at normal temperatures, are the resins that shows thermal softening property under the temperature about to 100 ℃.Powder or the dissolving of membranaceous solid material or be distributed in the solvent, and heat as required, thereby obtain resin mixture liquor (liquid).After being coated on resin mixture liquor on the substrate, drying also turns back to normal temperature, and resin mixture liquor becomes coverlay (solid) thus.In the manufacturing of multilayer circuit board of the present invention, particularly preferably be use and can make solvent and the combination of resin of drying/setting temperature in 160 ℃ of following scopes more than 60 ℃.
2. the painting process of insulative resin mixed liquor
Through being applied to the insulative resin mixed liquor that obtains on the supporting mass of conductivity salient point, form the insulating properties coverlay.Coating process does not have special qualification.Preferably, for example use scraper plate method, curtain formula rubbing method, nick version rubbing method, slot coated method (ス ロ ッ ト ダ ィ method).In addition, in painting process, preferably make the thickness of insulating properties coverlay of coating bigger than the height of conductivity salient point.If after being coated with the thickness insulating properties coverlay bigger, to littler, then can the conductivity salient point evenly be exposed with good repeatability than the height of conductivity salient point than conductivity bump height.
3. solvent evaporation operation
The solvent evaporation operation must not carried out aspect the manufacturing multilayer line plate member of the present invention., compare, can obtain higher wiring connective stability with the situation of not carrying out solvent evaporation.Specifically,, make the volatile ingredient evaporation in the insulating properties coverlay, reduce the thickness of insulating properties coverlay thus through the insulating properties coverlay that is coated with being heated or making its air dry.According to the exhaust wind speed of solvent types, drying machine, air quantity etc., need suitably adjustment to the processing time of set point of temperature.For example being set to processing time of set point of temperature is being about 1～30 minute under 80～120 ℃.
(laminating hot pressing)
Under range upon range of in a lump situation, the limit is carried out a plurality of board parts and core substrate gulde edge range upon range of as required.Through they under heated condition pressurizeed, form multilayer circuit board thereafter.On the other hand, under the situation of sequential cascade, range upon range of and carry out hot pressing with core substrate one by one a plurality of board parts.Heating condition is preferably set for below the heat resisting temperature of the thermosetting resin that constitutes multilayer circuit board and is to make the completely crued temperature of this thermosetting resin.The condition of hot pressing can suitably be set.Preferably heating-up temperature begins below the temperature of curing reaction and more than the temperature that heat fusing viscosity (thermosol melt-viscosity) descends at insulative resin.In addition, the condition optimization of hot pressing is: even having on the conductivity salient point under the situation of insulating properties filler, in the operation of laminating hot pressing, the conductivity salient point does not crack yet, and can fully guarantee to be electrically connected.For example described condition can be that temperature is that 170～210 ℃, actual pressure are 5～15kgf/cm 2In this laminating hot pressing, the lowest melt viscosity that can make cured films is than higher, and therefore resin can not flow in hot pressing, therefore can make the resin thickness before and after solidifying certain substantially.In addition, can make having good uniformity of resin thickness after the curing.
[material]
(conductivity convex point material)
The resin combination of formation electrocondution slurry preferably for example uses thermosetting resins such as phenolic resins, epoxy resin, melmac.Because thermosetting resin has flowability,,, can make this thermosetting resin have certain mechanical strength therefore through in subsequent handling, being heating and curing thermosetting resin so be shaped easily.
The solvent of dissolving or dissipating resin composition for example with an organic solvent.As what the machine solvent can be given an example aromatic series series solvents such as toluene, xylenes, ketone series solvent etc. are arranged.As the ketone series solvent, that can give an example has MEK, a methyl iso-butyl ketone (MIBK).Be dispersed in the conductive particle a certain or two or more at least mixture in them among Ag, Cu, Au, the Ni preferably in the resin mixture liquor, perhaps use their compound.
In addition, constitute the resin combination material of conductivity salient point, preferably use with the mixing ratio below the above 30wt% of 10wt% and in said thermosetting resin, added the material that thermoplastic resin obtains.In the laminating hot pressing operation of multi-layer wire substrate, the effect that can be inhibited and on the conductivity salient point, crack.
(insulating properties coverlay material)
In advanced information society,, make the operating frequency high speed development year by year of electronic equipment in recent years for the big capacity information of high-speed transfer.For the multilayer circuit board that is installed in the electronic equipment,, require to use relative dielectric constant and the low material of dielectric loss as the insulating properties coverlay material that constitutes wiring board.
In addition, miniaturization and slimming along with electronic equipment also require the wiring board slimming.Therefore, insulating properties coverlay material preferably can form the material of thin insulating properties coverlay with high repeatability.In addition in order to reduce manufacturing cost, even preferably use the material that under the situation of using thick-film technique, also can make the film attenuation.
As the insulating properties component materials in the manufacturing of multilayer circuit board of the present invention; Preferably use the low thermosetting resin of relative dielectric constant and dielectric loss angle tangent, for example preferably use epoxy resin, bismaleimide-triazine resin, polyimide resin, acrylic resin, phenolic resins, oligomerisation phenylene ether resin, polyether resin, melmac etc.
As thermoset resin material, the relative dielectric constant after preferably use to satisfy solidifying is 2.0～3.0 scopes or to satisfy dielectric loss angle tangent be the material of 0.001～0.005 scope under 5GHz under 5GHz.
< epoxy resin >
In addition, also can be fit to use the composition epoxy resin of putting down in writing among the PCT publication number WO2005/100435 as said compositions of thermosetting resin.Specifically, this composition epoxy resin comprises that to have more than one hydroxyl and plural epoxy radicals, weight average molecular weight be 1,500～70,000 straight chain shape epoxy resin (A); The phenol-formaldehyde resin modified (sex change Off ェ ノ one Le ノ ボ ラ ッ Network) that obtains at least a portion esterification of phenol property hydroxyl with aliphatic acid (B).In addition, in this composition epoxy resin, the content of said phenol-formaldehyde resin modified (B) is 30～200 weight portions with respect to the said straight chain shape epoxy resin (A) of 100 weight portions.The dielectric property of this composition epoxy resin (for example low-k, low dielectric loss angle tangent) is good.
The weight average molecular weight of straight chain shape epoxy resin (A) is 1,500～70,000.
The number-average molecular weight of straight chain shape epoxy resin (A) preferably 3,700～74,000, more preferably 5,500～26,000.
The epoxide equivalent of straight chain shape epoxy resin (A) is preferably more than the 5000g/eq (5000g/ equivalent).
In addition, weight average molecular weight in this specification and number-average molecular weight are to utilize gel permeation chromatography (GPC), the value that the calibration curve of use polystyrene standard obtains.
Particularly preferably be, in straight chain shape epoxy resin (A), weight-average molecular weight/number-average molecular weight is 2～3 scope.
Specifically, as the compound that straight chain shape epoxy resin (A) for example preferably uses following chemical formula (1) to represent, more preferably use the compound of following chemical formula (2) expression.
[changing 1]
Figure BDA0000134191250000261
In said chemical formula, X and Y represent respectively singly-bound, carbon number be 1～7 alkyl ,-O-,-S-,-SO2-,-CO-or with the group of following chemical formulation.Under X and Y were a plurality of situation, each X and Y can be identical, also can be different.
[changing 2]
Figure BDA0000134191250000271
Wherein, the R in the above-mentioned chemical formula 2The expression carbon number is 1～10 alkyl or halogen atom.At R 2Under a plurality of situation, each R 2Can be identical, also can be different.R 3Expression hydrogen atom, carbon number are 1～10 alkyl or halogen atom.Q is 0～5 integer.
In said chemical formula (1)～chemical formula (2), R 1And R 4Represent that respectively carbon number is 1～10 alkyl or halogen atom.At R 1And R 4Under a plurality of situation, each R 1And R 4Can be identical, also can be different.
P and s are respectively 0～4 integers, and they can be identical, also can be different.
In said chemical formula (1), n representes mean value.This n is 25～500.
In said chemical formula (2), t representes mean value.This t is 10～250.
Straight chain shape epoxy resin (A) the more preferably p in said chemical formula (1) is 0 compound, promptly more preferably uses the compound of chemical formula (1 ') expression.
[changing 3]
Figure BDA0000134191250000272
In above-mentioned chemical formula, X and n respectively with said chemical formula (1) in X and n be identical connotation.
Described straight chain shape epoxy resin (A) can use separately, also can use two or more straight chain shape epoxy resin (A) in addition simultaneously.
As suitable example, can give an example out with the phenol-formaldehyde resin modified of following chemical formula (3) expression through the described phenol-formaldehyde resin modified that obtains at least a portion of phenol property hydroxyl with fatty acid esterification (B).
[changing 4]
In said chemical formula (3), R 5The expression carbon number is 1～5 alkyl.R 5Methyl preferably.A plurality of R 5Can be identical, also can be different.
R 6The expression carbon number is 1～5 alkyl, substituent phenyl can be arranged, substituent aralkyl can be arranged, the alkoxy or halogen atom.A plurality of R 6Can be identical, also can be different.
R 7The expression carbon number is 1～5 alkyl, substituent phenyl can be arranged, substituent aralkyl can be arranged, the alkoxy or halogen atom.A plurality of R 7Can be identical, also can be different.
G representes 0～3 integer.A plurality of g can be identical, also can be different.
H representes 0～3 integer.A plurality of h can be identical, also can be different.
N: m is 1: 1～1.2: 1, and preferably n: m is about 1: 1.
N and m add up to for example can be 2～4.
The mean value that n in the said chemical formula (3) and m are repetitive.The order of repetitive is unqualified.This order can be a block, also can be random.
As preferred phenol-formaldehyde resin modified (B), can give an example with the phenol-formaldehyde resin modified of following chemical formula (3 ') expression.
[changing 5]
Figure BDA0000134191250000291
In the above-mentioned chemical formula (3 '), R 5, n and m respectively with said chemical formula (3) in R 5, n is identical with m.
Preferred especially phenol-formaldehyde resin modified is the R in the said chemical formula (3 ') 5Be the acetylation phenolic resins of methyl.
Described phenol-formaldehyde resin modified can use separately, also can use two or more phenol-formaldehyde resin modifieds simultaneously in addition.
The content of said (B) composition is 30～200 weight portions with respect to said (A) composition of 100 weight portions preferably.If (B) content of composition is in this scope, then dielectric property, film forming, solidification reactivity are good.The content of said (B) composition is 50～180 weight portions with respect to said (A) composition of 100 weight portions more preferably.
One of preferred mode of said composition epoxy resin is also to contain (C) isocyanate compound.In epoxy resin, have under the situation of hydroxyl; Hydroxyl that generates when this hydroxyl or epoxy resin open loop and the isocyanates radical reaction in the isocyanate compound form amino-formate bond (combination of ゥ レ タ Application) thus, and the crosslink density of the polymer after therefore solidifying increases; The motility of molecule further reduces; Reduced the big hydroxyl of polarity in addition, therefore relative dielectric constant has further been reduced, and dielectric loss angle tangent is reduced.In addition, epoxy resin has big molecular separating force, therefore under the situation that makes the epoxy resin membranization; Be difficult to even film forming; Even make the epoxy resin membranization in addition, film strength also a little less than, have the tendency that when forming film, occurs crackle easily; But, can eliminate these shortcomings through allocating isocyanate compound into.
As described isocyanate compound, what can give an example is the compound that plural NCO is arranged.For example; As said isocyanate compound, that can give an example has hexamethylene diisocyanate, methyl diphenylene diisocyanate, toluene di-isocyanate(TDI), IPDI, dicyclohexyl methyl hydride diisocyanate, tetramethylxylylene diisocyanate, XDI, naphthalene diisocyanate, trimethyl hexamethylene diisocyanate, dimethyl diphenyl vulcabond, PPDI, cyclohexyl diisocyanate, dimer acid diisocyanate, hydrogenation of benzene dimethylene diisocyanate, LDI, triphenylmethane triisocyanate, a triphosphoric acid three (phenyl isocyanate) (ト リ (ィ ソ シ ア ネ one ト Off ェ ニ Le) ト リ ホ ス Off ァ one ト) etc.They can use separately, also can use two or more said isocyanate compounds simultaneously in addition.
Wherein preferably use hexamethylene diisocyanate, methyl diphenylene diisocyanate.
In addition, in described isocyanate compound, comprise prepolymer with the chlorinated isocyanurates ring that utilizes annulation formation.For example comprise the trimeric prepolymer that comprises isocyanate compound.
Particularly preferably be, said isocyanate compound and described straight chain shape epoxy resin (A) combination are used.In this case, the hydroxyl that generates except the ring-opening reaction of following epoxy resin and the reaction of NCO, the hydroxyl and the NCO that are present in the straight chain shape epoxy resin (A) also can react, so can obtain bigger effect.
Said (C) component content preferably, said (C) component content is 100～400 weight portions with respect to said (A) composition of 100 weight portions, more preferably 300～350 weight portions.If (C) content of composition is in this scope, then can be suppressed at and produce bubble when solidifying, therefore obtain uniform film easily, after curing, be not easy to crack, in addition, dielectric property also good (for example low-k, low dielectric loss angle tangent).
One of preferred mode of described composition epoxy resin is also to contain (D) divinylbenzene.Contain low temperatureization that divinylbenzene helps the melt temperature of crosslinked composition, improve flowability when being shaped, the low temperatureization of curing temperature and improve intermiscibility.
The content of said (D) composition is 40～180 weight portions with respect to said (A) compositions of 100 weight portions preferably.
Said composition epoxy resin also can contain the curing accelerator as any composition.
As curing accelerator, can use known material as the curing accelerator of composition epoxy resin.As curing accelerator, that can give an example has: heterocyclic compound imidazoles such as glyoxal ethyline, 2-ethyl-4-methylimidazole; Phosphorus compound classes such as triphenylphosphine, tetraphenyl boron tetraphenyl phosphine; 2,4, tertiary amines such as 6-three (dimethylamino methyl) phenol, benzyl dimethylamine; 1, the BBU class of 8-diazabicyclo (5,4,0) hendecene or its salt etc., amine, imidazoles being carried out addition product type promoter class that addition obtains etc. with epoxy radicals, urea, acid etc.
The content of curing accelerator is 1～10 weight portion with respect to said (A) compositions of 100 weight portions preferably.
Said composition epoxy resin also can contain the polymerization initiator as any composition.
Polymerization initiator can use known polymerization initiator.As this polymerization initiator, that can give an example has benzoyl peroxide, azobis isobutyronitrile, peroxidized t-butyl perbenzoate, 1,1,3, a 3-tetramethyl butyl peroxy-2 ethyl hexanoic acid ester etc.
The content of polymerization initiator is 1～10 weight portion with respect to said (A) composition of 100 weight portions preferably.
Said composition epoxy resin also can contain additives such as tackifier, fire retardant, antifoaming agent, flowing regulator, dispersing aid as required.
In addition, said composition epoxy resin is purpose in the scope of the object of the invention to improve modulus of elasticity, to reduce the coefficient of expansion or change vitrification point (Tg value) etc., also can contain the epoxy resin beyond (A) composition as required.
As the epoxy resin beyond (A) composition, that can give an example has bisphenol A type epoxy resin, bisphenol f type epoxy resin, cycloaliphatic epoxy resin, a biphenyl epoxy resin etc.They can use separately, also can use two or more said epoxy resin simultaneously.
In addition, said composition epoxy resin also can contain and not carry out fatty acid-esterified phenolic resins, cresol novolac resin, phenol syncytiam known epoxy curing agents such as (Off ェ ノ one Le syncytiams) in the scope of the object of the invention.
As the phenol syncytiam, the phenol that 3～5 nucleome degree etc. are arranged that can give an example.
Said composition epoxy resin can pass through the known method manufacturing.For example, can under having solvent to exist or not having situation that solvent exists, mix through propeller agitator, banbury (バ Application バ リ same form ミ キ サ one), planet strrier, heating, vacuum mixing kneading machine etc. (A) with (B).
In addition, for example can be dissolved into specified solvent concentration to resinous principle, pack they of ormal weight in the agitated reactor that is heated to 25～60 ℃ into, under normal pressure, mix 30 minutes～6 hours.Thereafter, (maximum 1Torr) mixes stirring 5 minutes～60 minutes again under vacuum.
< OPE resin >
In addition, as described compositions of thermosetting resin, also can be fit to use the oligomerisation phenylene ether is resin compound.Specifically, (A) composition is the oligomerisation phenylene ether that heat cured number-average molecular weight more than 1000 below 3000, two ends have functional group.In addition; (B) composition is a block copolymer; This block copolymer comprises with the vinylaromatic hydrocarbon to be hard section block portion of main body and to be soft section block portion of main body with the conjugated diene, and the oligomerisation phenylene ether that can enumerate through obtaining with the solvent evaporates that makes the insulative resin mixed liquor of allocating solvent into is a resin compound with not producing curing reaction.
At this, in said insulative resin mixed liquor, (B) composition (A) composition with respect to 100 parts is more than 67 parts below 150 parts.In addition, (B) composition of the uncured coverlay of said insulating properties is more than one the thermoplastic elastomer (TPE) of from rubber and/or SBS, SIS, styrene-ethylene/BS, selecting.
As the thermosetting resin that in said compositions of thermosetting resin, uses, that can give an example has thermosetting oligomerisation phenylene ether resin or epoxy resin that functional groups such as styrenic functionality, vinyl, glycidyl, amino, hydroxyl, carboxyl are arranged at two ends etc.Wherein, Thermosetting oligomerisation phenylene ether resin or epoxy resin that styrenic functionality is preferably arranged at two ends, this is because they are good at aspects such as dielectric property (for example low-k, low dielectric loss angle tangent), low water absorbable, formation property of filming.
Said compositions of thermosetting resin is the oligomerisation phenylene ether based resin composition in the japanese patent application No. 2006-215464 specification of having applied for, put down in writing of the applicant preferably.Specifically; The compositions of thermosetting resin of block copolymer (B) that for example comprises thermosetting oligomerisation phenylene ether (A) and 50～250 weight portions of 100 weight portions; Because it is good at aspects such as dielectric property (for example low-k, low dielectric loss angle tangent), low elasticity, formation property of filming; So be preferred; Wherein, the number-average molecular weight of said thermosetting oligomerisation phenylene ether (A) is 500～5000, at two ends styrenic functionality is arranged, and said block copolymer (B) comprises the recurring unit of vinyl aromatic hydrocarbon monomer origin and the recurring unit of conjugate diene monomer origin.
As said thermosetting oligomerisation phenylene ether (A), can give an example have the open communique spy of Japan Patent open 2,2 of 2006-28111 number record '; 3,3 ', 5; 5 '-hexamethyl biphenyl-4,4 '-glycol-2, the product of 6-xylenol condensation polymer and 1-chloro-4-methyl-benzene.
Such thermosetting oligomerisation phenylene ether (A) can pass through the known method manufacturing.Also can use the commodity of selling on the market in addition.For example can be fit to use OPE-2st 2200 (aerochemistry Co., Ltd. of Mitsubishi makes (the ガ ス of Mitsubishi chemistry society system)).
If the number-average molecular weight of thermosetting oligomerisation phenylene ether (A) greater than 5,000, then is difficult to be dissolved in the volatile solvent.On the other hand, if the number-average molecular weight of thermosetting oligomerisation phenylene ether (A) less than 500, then because crosslink density is too high, has bad influence to the modulus of elasticity of solidfied material and flexible.Therefore, the number-average molecular weight of thermosetting oligomerisation phenylene ether (A) is 500～5,000, preferably 1,000～3,000.
Said block copolymer (B) is to contain with the vinylaromatic hydrocarbon to be hard section block portion of main body and to be the block copolymer of soft section block portion of main body with the conjugated diene.
As said block copolymer (B), that can give an example has SBS, SIS, a styrene-ethylene/butadiene-styrene block copolymer etc.
Block copolymer (B) can pass through the known method manufacturing.Also can use the commodity of selling on the market in addition.For example, can be fit to use TR2003 (JSR Corp.'s manufacturing).
The content of the block copolymer in the said compositions of thermosetting resin (B) is 50～250 weight portions with respect to the thermosetting oligomerisation phenylene ether (A) of 100 weight portions, preferably 65～200 weight portions, more preferably 80～150 weight portions.If the content of block copolymer (B) is in said scope, then film forms ability, excellent with the intermiscibility of thermosetting oligomerisation phenylene ether (A).
As the volatile solvent that in said oligomerisation phenylene ether resin combination, uses, that can give an example has aromatic series series solvents such as toluene, xylenes; Ketone such as MEK, methyl iso-butyl ketone (MIBK) series solvent etc.They can use a kind of separately, also can use two or more volatile solvents simultaneously.
The content of volatile solvent is just passable in said scope as long as suitably be adjusted to the viscosity of composition, does not have special qualification.Preferably, use volatile solvent to make that resinous principle is 15～45 weight %, more preferably, use volatile solvent to make resinous principle 15～35 weight %.If the ratio of the resinous principle in the composition in this scope, then is impregnated in the cellulosic matrix material easily, therefore can reduce bubble.For the said resin of such low concentration, in longitudinal type immersion system in the past,, the varnish adhesion amount is increased in order to obtain desirable resin adhesion amount.So substrate is when vertically advancing; The resin of dipping can drip down; Therefore owing to form uneven nicking, can form ugly resin speckle, in addition; Although can produce dissolvent residual in that coated film is inner but therefore the phenomenon of dry tack free only can not obtain uniform its uncured state.
Described oligomerisation phenylene ether resin combination can also contain additives such as inorganic filler, tackifier, fire retardant, antifoaming agent, flowing regulator, coalescents, dispersing aid in the scope of effect of the present invention.
In addition, said oligomerisation phenylene ether resin combination can also contain curing catalysts.Said oligomerisation phenylene ether resin combination only just can solidify through heating.
The manufacturing approach of said oligomerisation phenylene ether resin combination does not have special qualification, can adopt known manufacturing approach.For example, fully mix said each composition through mixer, just can make said oligomerisation phenylene ether resin combination.
<ADFLEMA>
Preferably, for example use ADFLEMA (trade name, Na Meishi Co., Ltd. makes) as insulative resin.ADFLEMA is the elastomeric resin that comprises as a kind of oligomerisation phenylene ether of OPE resin and styrene butadiene system.The ADFLEMA product is the film of its uncured state., under the situation after its hot curing, relative dielectric constant ε and dielectric loss angle tangent tan δ are: ε=2.0～3.0, dielectric loss angle tangent tan δ=0.001～0.005 all are less values.Therefore the ADFLEMA product has good high frequency characteristics.In addition, can to form thickness be the film about 2～90 μ m to the ADFLEMA product.In addition, the ADFLEMA product for example contains the volatile solvent about 70%.Therefore, be coated with the back through heating or dry, can for example reduce 70% to the thickness of ADFLEMA product, therefore, the ADFLEMA product is suitable for comprising through reducing thickness the conductivity salient point is exposed in the multilayer circuit board manufacturing of the present invention of operation.
<being contained in the fiber-based material in the insulative resin >
Preferably, the insulative resin that uses in parts at multilayer circuit board of the present invention is the fibre-bearing basis material not.In this case, because insulative resin mixed liquor fibre-bearing basis material not, so can reduce the viscosity of mixed liquor, therefore good to the performance with the substrate surface covering around the conductivity salient point.In addition, in operation, can reduce the mixed liquor residue on the conductivity salient point head with the film attenuate.Relative therewith, if in the insulative resin mixed liquor, allocated fiber-based materials such as short glass fiber into, then be very difficult to obtain homodisperse slurry.In addition,, when coating, can not avoid forming the bridge of short fiber, in addition, import the glass fiber matrix material of dielectric property difference and the effect objectionable intermingling that the present invention will obtain at conductivity salient point top even suppose to obtain homodisperse slurry.
< insulating properties filler >
Preferably, the insulating properties filler that uses in parts at multilayer circuit board of the present invention has high electrical insulating property, be not out of shape, have the intensity of the layer insulation that can keep multi-layer wire substrate because of laminating hot pressing and processed by the material that is dispersed in the solvent.As the material of insulating properties filler, preferably, for example use one or more materials of from silicon dioxide, carborundum, aluminium oxide, aluminium nitride, zirconium oxide bead, bead, acrylic acid pearl, selecting.
Preferably, the insulating properties filler is powder or graininess.The average grain diameter of insulating properties filler is preferably more than 20% below 100% of conductivity bump height, more preferably is below 50% of conductivity salient point bottom surface diameter.
(wiring material)
About the wiring of multilayer circuit board, can form conductive pattern through the conductivity paper tinsel is carried out etching, also can form conductive pattern through the printing conductive slurry.
Preferably, the resin combination that constitutes electrocondution slurry for example uses thermosetting resins such as phenolic resins, epoxy resin, melmac.Thermosetting resin has flowability, is shaped easily, in addition, and can be through in subsequent handling, being heating and curing, thus certain mechanical strength had.
The solvent of dissolving or dissipating resin composition for example with an organic solvent.As organic solvent, that can give an example has aromatic series series solvent, for example toluene, xylenes and a ketone series solvent.As the ketone series solvent, that can give an example has MEK, a methyl iso-butyl ketone (MIBK).Be dispersed in the conductive particle material of any among Ag, Cu, Au, the Ni, the two or more at least mixing in them preferably in the resin mixture liquor, perhaps use their compound.
For example can conductive particle (the for example material of any among Ag, Cu, Au, the Ni or the two or more at least mixing in them) be dispersed in the material of sneaking into volatile solvent in the resin, again, obtain electrocondution slurry through preparation.
< heat curing-type electrocondution slurry >
In addition, also the heat curing-type electrocondution slurry can be used, in this case,, also wiring can be formed with enough low resistance even pass through 100～200 ℃ Low Temperature Heat Treatment as wiring material.Under the situation of using the heat curing-type electrocondution slurry, the thickness that preferably makes wiring is in 1～20 mu m range.
< electrocondution slurry that contains silver-colored particulate >
In addition, the material as electrocondution slurry can use patent documentation 3 disclosed electrocondution slurries.The patent documentation 3 disclosed electrocondution slurries (material) that contain silver-colored particulate are to regain the electrocondution slurry that obtains from the reactions product; That is: there is organic solvent or do not existing under the situation of organic solvent; Mixed carboxylic acid's silver salt and aliphatic amine; And the interpolation reducing agent, through being 20～80 ℃ of reactions down in reaction temperature, obtain said product.
Preferably, be contained in silver-colored particulate in the electrocondution slurry:
(a) average grain diameter of primary particle is 40～350nm,
(b) crystallite dimension is 20～70nm,
(c) average grain diameter is 1～5 with the ratio of crystallite dimension.
In addition, further preferably, be contained in the silver-colored particulate in the electrocondution slurry:
(a) average grain diameter of primary particle is 50～80nm,
(b) crystallite dimension is 20～50nm,
(c) average grain diameter is 1～4 with the ratio of crystallite dimension.
Even this electrocondution slurry material also demonstrates enough big conductivity under the Low Temperature Heat Treatment below 200 ℃.Even this electrocondution slurry material also can solidify at the low temperature that is lower than below organic wiring board heat resisting temperature, although carry out low-temperature setting, it is lower by (about 10 * 10 also can to form conductor resistance -5Below the Ω cm) conductive pattern.Therefore, though the thickness that reduces to connect up, and wiring width is attenuated, also can suppress or reduce the increase of wiring delay.Because particle diameter is little,, also be difficult for stopping up even during the silk screen printing fine rule.The particle diameter of electrocondution slurry (electrocondution slurry that for example contains nano particle) that the size ratio of this electrocondution slurry material contains other electrically conductive microparticles is big, so this electrocondution slurry material is suitable for forming the wiring that thickness is 1 μ m～10 μ m.In addition, through using this electrocondution slurry material, can material cost be suppressed to lower.Under the situation of using patent documentation 3 disclosed electrocondution slurries, the thickness of wiring is preferably below 5 μ m.
[curing degree]
(curing degree of conductivity salient point)
In the stage midway of manufacturing process, constituting the conductivity salient point of multilayer line plate member and the solid state of insulating properties coverlay can select from following combination.
(1) conductivity salient point: full solidification state; Insulating properties coverlay: its uncured state;
(2) conductivity salient point: the state between uncured and full solidification; Insulating properties coverlay: its uncured state;
Wherein, so-called state between uncured and full solidification is meant and is cured to a certain degree through proper heat treatment, but do not reach completely crued resin state.
At B in the past 2In the insulating properties coverlay in the it technology, utilize heat to make to be in the insulating properties film of the solid state that is commonly called the B stage softening, make the conductivity salient point connect this softening insulating properties film again.At B in the past 2In the technology of it; Perforation through the conductivity salient point forms via, and the draw ratio that therefore need make the conductivity salient point is more than setting, in addition; The conductivity salient point need have the above hardness of setting, therefore need make the conductivity salient point become the full solidification state.
, technology of the present invention is not carried out the perforation of conductivity salient point.In technology of the present invention; On the conductivity salient point, form the insulating properties coverlay, reduce the thickness of insulating properties coverlay, form the uncured coverlay of insulating properties; The conductivity salient point and second conductor layer or core substrate are engaged; Therefore, the hardness of conductivity salient point need the perforation method in the hardness of required that kind, the hardness of conductivity salient point is so long as that its form is remained is just enough to a certain degree.The hardness of conductivity salient point can be set the state between completely crued state or uncured and the full solidification arbitrarily for.In addition, the uncured coverlay of insulating properties is uncured in the present invention, and strictly speaking, the surface at least of the uncured coverlay of insulating properties is uncured.The hardness of each parts through control and treatment temperature or processing time, may be controlled to any hardness in printing or in the operations such as the drying after being coated with, heating.Because of the differences such as material of parts, the optimum condition of temperature, time etc. also will change.The optimum condition of every kind of concrete material is as long as obtain through test in advance.
The example of concrete conductivity salient point hardness is represented as follows.
Conductivity salient point in the past connecting operation (temperature conditions is 80 ℃～120 ℃) stage, become the full solidification state in order to connect prepreg, and the hardness of conductivity salient point need be 35～40.
According to technology of the present invention, in that the conductivity salient point is under the situation of the state between uncured and the full solidification, for example use the conductivity salient point of processing by material with the vitrification point 110 to 140 ℃, making its hardness is 15～30.
It is following to make the conductivity salient point be in the effect of the state between uncured and the full solidification.
1. the cementability of conductivity salient point and the wiring pattern that contacts with the conductivity salient point, conductivity are that completely crued situation is good than conductivity salient point.At the conductivity salient point is not under the situation of full solidification state, in range upon range of pressurization operation, under the predetermined heating condition; Plastic deformation takes place in conductivity salient point easily, therefore, has improved the cementability of conductivity salient point with the wiring part that contacts with the conductivity salient point; Because contact area increases, reduce resistance simultaneously, and improved the reliability that is electrically connected; The bonding agent composition that forms simultaneously in the electrocondution slurry of conductivity salient point is compressed, and is pressed against in the uncured coverlay of insulating properties, therefore; The conductive particle and the combination of the wiring part that contacts with the conductivity salient point that are dispersed in the electrocondution slurry become firmly, and therefore can make conductive particle fine and close.Through contraction thereafter, the conductive particle in the conductivity salient point is arranged again, can the be further enhanced effect of conductivity of its result.
2. in range upon range of pressurization operation, use, just can form multilayer circuit board than in the past little a lot of moulding pressure.Therefore reduce to be applied to the strain on the parts, therefore improved the reliability of parts.
3. manufacturing approach of the present invention is utilized the film of attenuate insulative resin mixed liquor; Form the uncured coverlay of insulating properties; Conductivity salient point and second conductor layer or core substrate joint, therefore conductivity salient point do not applied the power of as in the past perforation prepreg thereafter.In addition, not have in the scope of influence through the solid state that is set in the temperature conditions that makes the drying of film attenuate/solidify to the conductivity salient point, stably former state keeps the shape of conductivity salient point after just printing.
4. under the situation that conductivity salient point and wiring pattern are adjacent to, the leading section of conductivity salient point can carry out plastic deformation swimmingly.
The hardness of the conductive bumps with a microhardness tester MXT50 (loose Kanazawa Machines (Ltd.)) at a test temperature of 23 ℃, test load of 25Kgf, load holding time of 15 seconds were measured under the condition.
(curing degree of insulating properties coverlay)
In the manufacturing approach of multilayer circuit board of the present invention, preferably control heating condition, in the feasible operation halfway, the state before the insulating properties coverlay that around the conductivity salient point, forms becomes the curing that is called as " uncured "; And in the heating and pressurizing operation, the insulating properties coverlay becomes the state that is called as " full solidification " or " curing ".
As the epoxy resin or the OPE resin system of the insulating properties coverlay material that is fit to multilayer line plate member of the present invention, the material of specifically putting down in writing in [0026] of this specification or [0027].At the insulating properties coverlay is under the situation of epoxy resin, and under the heating condition in 130～180 ℃, 10 minutes～1 hour scope, the insulating properties coverlay becomes the curing degree in the middle of " uncured " and " full solidification ".At the insulating properties coverlay is under the situation of oligomerisation phenylene ether resin system, and under the heating condition in 130～200 ℃, 10 minutes～1 hour scope, the insulating properties coverlay becomes the curing degree in the middle of " uncured " and " full solidification ".In this manual, solidify coverlay to the insulating properties under this state and call " the uncured coverlay of insulating properties ".Using than described heating condition more under the situation of low temperature or shorter time heating, the insulating properties coverlay is an its uncured state.Using than described heating condition more under the situation of high temperature or longer time heating, the insulating properties coverlay is more approaching completely crued state.For example, under the situation of oligomerisation phenylene ether resin system, even 160 ℃ of heating down, if be about 5 minutes heating time, then curing reaction is also insufficient, so the insulating properties coverlay maintains near uncured state.
The insulating properties coverlay is become under the situation of uncured coverlay, and contact the parts (for example the conductivity coverlay of conductive pattern that kind or the insulating properties coverlay of upper strata or lower floor) and the bonding strength of insulating properties coverlay that form with the insulating properties coverlay big.Its reason is that the insulating properties coverlay is the crosslinked preceding low resin of molecular weight; Therefore both contacts under the state of thermal fluidity are being arranged; It is soaking of insulating properties coverlay and bonding the other side as a result, and the effect that therefore produces is that wiring is difficult to peel off and wiring board becomes firm.In addition because the curing degree step-down, therefore can seamlessly imbed substrate because of installing component form concavo-convex, the effect that also obtains for the planarization of PCB surface.
On the other hand, the mechanical strength of uncured coverlay worsens, and is therefore for example forming under the situation of conductive pattern through printing on the coverlay, exists and does not allow tractable possibility.In this case, preferably, form the coverlay heating of conductive pattern one side following of appropriate condition; And after becoming the full solidification state to this coverlay, be layered in uncured coverlay above it.Through range upon range of uncured coverlay and full solidification coverlay, can improve adhesiveness, flatness, in addition, can improve the operability in the conductive pattern manufacturing procedure.
For example in epoxy resin of the present invention, because of purposes is different, it is excessive to add thermal fluidity.Therefore preferably carry out through making to be heating and curing in the last stage sometimes, after improving kinematic viscosity (after the prebake conditions), it is range upon range of to pressurize.
[shape of parts, dimensional parameters]
(definition of dimensional parameters)
(a) of Figure 12 is the figure of the dimensional parameters definition of explanation multilayer line plate member of the present invention to Figure 12 (c).
(a) of Figure 12 is the cutaway view through the multilayer line plate member that obtains of the mobile coverlay 222 of coating on conductivity salient point 221.(b) of Figure 12 and (c) of Figure 12 are through forming the cutaway view of the multilayer line plate member that the uncured coverlay 223 of insulating properties obtains behind the thickness that reduces mobile coverlay 222.Shown in Figure 12 (b), in the exposing of conductivity salient point, the head that is typically the conductivity salient point exposes fully., under the worst situation, shown in Figure 12 (c), residual on the part of the head of conductivity salient point have an insulating properties coverlay.
At this, t1 is the thickness of mobile coverlay 222, and t2 is the thickness of the uncured coverlay 223 of insulating properties, and h1 is the thickness of conductivity salient point 221.In addition, a1 is the bottom surface diameter (diameter of bottom surface) of conductivity salient point, and θ 1 is the central angle of conductivity salient point 71 upper sections.In addition, under the worst situation shown in (c) of Figure 12, Sb1 is the floor space of salient point, Se1 be in the conductivity salient point head conductivity salient point 221 expose area, with the ratio that exposes area and floor space of Se1/Sb1 * 100 (%) definition conductivity salient point.
In addition, though not expression among the figure, be defined as: the height of the conductivity salient point after the laminating hot pressing is h2, and the thickness of the insulating barrier after the laminating hot pressing is t3.Preferably making t3 is more than the 5 μ m.
(shape of conductivity salient point)
The shape of conductivity salient point preferably becomes the diameter shape littler than the diameter of bottom in leading section cross section.This shape is preferably for example conical, truncated cone, chevron substantially.Conductivity salient point upper section shape preferably has the smooth circular arc of the central angle θ 1 below 180 °.At this, so-called conductivity salient point leading section cross section is under the situation of conductivity salient point front-end configuration on top, the cross section of the horizontal direction of conductivity salient point.So-called conductivity salient point upper section is the cross section of the vertical direction of conductivity salient point.In the manufacturing approach of multilayer circuit board of the present invention, because the conductivity salient point need not connect prepreg, so to there is no need be the shape of point to front end.Through making conductivity salient point leading section form smooth circular arc, can increase the area of section of via, can reduce the resistance of via.
Under the situation that conductivity salient point upper section is become have greater than the circular arc of 180 ° central angle; The leading section of conductivity salient point is the shape of depression; Therefore the insulating properties uncured resin remains in depressed part, can produce the rough sledding such as bad connection and resistance increase of via.In multilayer line plate member of the present invention; Conductivity salient point upper section is the smooth circular shape with the central angle below 180 °; Therefore; The insulating properties uncured resin can not remain on the leading section of conductivity salient point, connects the effect that descends with resistance reliably so have via.Conductivity salient point front end is not sharp in addition, even therefore carry out laminating hot pressing in a lump, the via leading section can not strike the beam yet, bending, therefore can realize that the electroconductive component on via and upper strata is electrically connected reliably.
(exposing of conductivity salient point)
Coating insulative resin mixed liquor, make the film attenuate through heating or drying after, shown in Figure 12 (c), on the border of uncured coverlay of insulating properties and conductivity salient point, more residual insulating properties materials on the conductivity salient point sometimes.Expose area and the ratio of floor space with the conductivity salient point represent that conductivity salient point above the conductivity salient point is not under the situation of the ratio of cover part such as being insulated property material residue; Utilizing under the situation of technology of the present invention, can make the ratio that exposes area and floor space more than 20%.Owing in fact can make the area of section of via become big, so have the effect that reduces resistance.
[multilayer circuit board of embodiment of the present invention and its manufacturing approach]
With reference to Fig. 4 to Fig. 6 the object lesson that uses board part and core substrate to make the method for multilayer circuit board is described below.The manufacturing approach of multilayer circuit board of the present invention is in the multilayer circuit board manufacture of substrates of this explanation, replaces core substrate and uses the method for conductivity paper tinsel, insulating properties substrate or multilayer line plate member.
(first object lesson of the manufacturing approach of multilayer circuit board)
In first object lesson, the manufacturing approach of the multilayer circuit board of overlapped way is described to (i) order of Fig. 4 with (a) of Fig. 4.The example of representing to have used the printing multilayer circuit board of making through the plated-through-hole mode as core substrate.At first; On core substrate 52 with below the multilayer line plate member 51,53 that produces second object lesson (Fig. 2) respectively through multilayer circuit board component manufacturing method of the present invention position (Fig. 4 (a)); And carry out laminating hot pressing, making thus once was that the insulating properties coverlay of multilayer line plate member of the uncured coverlay of insulating properties becomes and solidifies coverlay (Fig. 4 (b)).Then, for example on multilayer line plate member 51,53, form resist pattern 54 (Fig. 4 (c)) through photoetching process.Then, make resist pattern 54 become mask, and conductivity paper tinsel 55 is carried out etching, remove resist pattern 54 then, form wiring 56 (Fig. 4 (d)) thus through wet etching.Then, at multilayer circuit board 51,53 with connect up above 56, multilayer line plate member 57,58 location (Fig. 4 (e)) that produce second object lesson (Fig. 2) through multilayer circuit board component manufacturing method of the present invention, and carry out laminating hot pressing.Make thus once was that the insulating properties coverlay of multilayer line plate member of the uncured coverlay of insulating properties becomes and solidifies coverlay (Fig. 4 (f)).Then, on multilayer line plate member 59,60, form resist pattern 62 (Fig. 4 (g)) through photoetching process.Then, make resist pattern 62 become mask through wet etching, and conductivity paper tinsel 61 is carried out etching, remove resist pattern 62 then, form wiring 63 thus, its result has processed multilayer circuit board 66 (Fig. 4 (h)).
In the manufacturing approach of the composite multi-layer wiring board substrate of sequential cascade mode shown in Figure 4, certainly adopt the substrate element produced through Fig. 1 and manufacturing approach shown in Figure 3 as multilayer circuit board, maybe can use through the conductivity salient point and carry out printing multilayer circuit board that interlayer is connected as core substrate.
(second object lesson of the manufacturing approach of multilayer circuit board)
In second object lesson, the manufacturing approach of the multilayer circuit board of overlapped way is in a lump described with reference to Fig. 5 (a) to Fig. 5 (d).The example of the printing multilayer circuit board that utilizes the manufacturing of conductivity salient point has been used in expression as core substrate.
The packing density of the core substrate that generally produces through the plated-through-hole mode is low, therefore also can use and pass through B 2The substrate that previous methods such as it produce.At first; On core substrate 75 with below; The multilayer line plate member that multilayer line plate member 74,73,76,77 and first object lesson (Fig. 1) through multilayer circuit board component manufacturing method of the present invention are produced positions; Said multilayer line plate member the 74,73,76, the 77th on the multilayer line plate member that the 3rd object lesson (Fig. 3) through multilayer circuit board member manufacturing method of the present invention produces, for example is formed with the multilayer line plate member (Fig. 5 (a)) of wiring pattern in advance through photoetching process and etching.Carry out laminating hot pressing then, insulating properties coverlay as the multilayer line plate member of the uncured coverlay of insulating properties is become solidify coverlay (Fig. 5 (b)).Then, for example on conductivity paper tinsel 71, form resist pattern 84 (Fig. 5 (c)) through photoetching process.Make resist pattern 84 become mask through wet etching then, conductivity paper tinsel 71 is carried out etching, remove resist pattern 84 then, form wiring 83 (Fig. 5 (d)) thus.Its result has processed multilayer circuit board 85.
In the manufacturing approach of the multilayer line base board of overlapped way in a lump shown in Figure 5, certainly adopt the substrate element produced through manufacturing approach illustrated in figures 1 and 2 as multilayer circuit board, or use the printing multilayer circuit board of making through the plated-through-hole mode as core substrate.
(the 3rd object lesson of the manufacturing approach of multilayer circuit board, the 4th object lesson)
In the 3rd object lesson, the 4th object lesson, the manufacturing approach of the multilayer circuit board of core substrate-core substrate overlapped way is described with reference to (a) of Fig. 6 with (b).The example of the printing multilayer circuit board that utilizes the manufacturing of conductivity salient point has been used in expression as core substrate.
In the 3rd object lesson, at first, on the face of the upside of core substrate 95, form conductivity salient point 94.Then, the insulative resin mixed liquor that is dispersed with insulating properties filler 93 be coated on the conductivity salient point 94 with conductivity salient point 94 around, form mobile coverlay thus.Through making this flowability coverlay dry, make solvent evaporation, form the uncured coverlay 92 of insulating properties thus.Then core substrate 91 is positioned (Fig. 6 (a)), carry out laminating hot pressing, make insulating properties coverlay become the curing coverlay thus as the multilayer line plate member of the uncured coverlay of insulating properties.Its result has processed multilayer circuit board.
In the 4th object lesson, at first, on the face of the upside of core substrate 100, form conductivity salient point 99.Then another above core substrate 96 on coating be dispersed with the insulative resin mixed liquor of insulating properties filler 98, form mobile coverlay thus.Through making this flowability coverlay dry, make solvent evaporation, form the uncured coverlay 97 of insulating properties thus.Make core substrate 96 and conductivity salient point 99 location (Fig. 6 (b)) then, carry out laminating hot pressing, make insulating properties coverlay become the curing coverlay thus as the multilayer line plate member of the uncured coverlay of insulating properties.Its result has processed multilayer circuit board.
In the manufacturing approach of the multilayer line base board of core substrate shown in Figure 6-core substrate overlapped way, certainly adopt the printing multilayer circuit board of making through the plated-through-hole mode as core substrate.
[Painted surface layer (coated ri) construction methods and coating the bottom (lower coating ri) construction method]
In the operation of making multi-layer wire substrate, before laminating hot pressing, be coated with surface construction method and priming operation construction method in the construction method of configuration insulative resin layer and conductivity salient point.
(a) of Fig. 7 and (b) be under the situation of carrying out the priming operation construction method, the cutaway view of the multilayer circuit board before range upon range of.The priming operation construction method is in the construction method of the conductivity salient point being processed side coating insulating properties mixed liquor.Fig. 7 (a) expression makes multilayer line plate member with conductivity salient point and the insulating properties material figure to locate with core substrate 122 relative modes.(b) of Fig. 7 is illustrated in configuration conductivity paper tinsel 124,128 on the multilayer wiring parts with the conductivity salient point that is formed on the core substrate 126 and insulating properties material.
(c) of Fig. 7 and (d) be under the situation that is coated with the surface construction method, the cutaway view of the multilayer circuit board before range upon range of.Being coated with the surface construction method is the construction method at the side coating insulating properties mixed liquor opposite with processing one side of conductivity salient point.The manufacturing approach of the multilayer circuit board of expression is in (c) of Fig. 7: through the operation that forms mobile uncured coverlay, the operation that forms the uncured coverlay of insulating properties and the operation of carrying out laminating hot pressing; Utilize said conductivity salient point that the conductor layer of first core substrate that is formed with said conductivity salient point and the conductor layer of the conductor layer that is formed with the uncured coverlay of said insulating properties or second core substrate are electrically connected; The operation of the mobile uncured coverlay of said formation is through on the conductor layer or second core substrate relative with first core substrate 131 that is formed with conductivity salient point 130,132; Coating contains the insulative resin mixed liquor of insulating properties filler and volatile solvent; Form the operation of mobile uncured coverlay; The operation of the uncured coverlay of said formation insulating properties is through making said volatility insulating properties volatilization and making said mobile coverlay attenuate; Form the operation of the uncured coverlay of insulating properties, said operation of carrying out laminating hot pressing is to said first core substrate and is formed with the conductor layer of the uncured coverlay of said insulating properties or the operation that second core substrate carries out laminating hot pressing.The manufacturing approach of the multilayer circuit board of (d) expression of Fig. 7 is: through operation, the operation that forms the uncured coverlay of insulating properties, the operation that forms the conductivity group of bumps of overshooting shape that forms mobile coverlay, the operation of carrying out laminating hot pressing; Utilize said conductivity salient point that the conductor layer of first core substrate that is formed with the uncured coverlay of said insulating properties and the conductor layer of the conductor layer that is formed with said conductivity salient point or second core substrate are electrically connected; Wherein, The operation of the mobile coverlay of said formation is the insulative resin mixed liquor that contains insulating properties filler and volatile solvent through coating on first conductor layer that is configured on first core substrate; Form the operation of mobile coverlay; The operation of the uncured coverlay of said formation insulating properties is through making said volatile solvent volatilization and making said mobile coverlay attenuate; Form the operation of the uncured coverlay of insulating properties; The operation of the conductivity group of bumps of said formation overshooting shape is the operation that on second conductor layer or second core substrate, forms the conductivity group of bumps of overshooting shape, and described operation of carrying out laminating hot pressing is the operation of said first core substrate and said insulating barrier being carried out laminating hot pressing.
, to the manufacturing approach of multilayer circuit board shown in Figure 3 multilayer circuit board extremely shown in Figure 6, all the situation of priming operation construction method and the cutaway view of process sequence are illustrated at Fig. 1 with member manufacturing method and Fig. 4.Certainly make the situation of multilayer circuit board with being coated with the surface construction method with parts and multilayer circuit board, also can obtain with the identical excellent effect of the situation of priming operation construction method.
[method of measurement of resistance]
The resistance of the multilayer circuit board that forms through technology such as conductivity salient points is general to be measured with the test pattern (テ ス ト パ タ one Application) that is called daisy chain (デ ィ ジ one チ ェ one Application).(a) of Figure 13 and (b) be vertical view and the cutaway view of measuring the test pattern that resistance uses.Test pattern is made up of ground floor wiring 234, via 235, second layer wiring 233, measurement terminal 231,232.Ground floor wiring 234 is the wirings that on the face of insulating properties coverlay 236 downsides, form.Second layer wiring 233 is the wirings that on the face of insulating properties coverlay 236 upsides, form.Between measurement terminal 231 and measurement terminal 232, a plurality of vias 235 are through the wiring pattern of ground floor wiring 233 and the wiring pattern series connection of second layer wiring 234.Through on measurement terminal 231 and measurement terminal 232, applying assigned voltage, measure the electric current of test pattern of flowing through, thereby obtain the resistance of via.Specifically, through deducting the cloth line resistance, and, can calculate the resistance of each via the number of the result who obtains divided by via from the resistance between the terminal.The value of general cloth line resistance and resistance with compare very for a short time as the resistance of common electronic unit, therefore in order to calculate resistance accurately, must prepare to measure a plurality of vias with the pattern of series system connection.The general pattern that obtains dozens of to hundreds of via series connection that uses.About the cloth line resistance, if the intrinsic resistance of wiring material or the sheet resistance of wiring (シ one ト opposing) data are arranged in advance, then the size according to wiring can calculate the cloth line resistance theoretically.Through measuring the different a plurality of patterns of via quantity, also can measure resistance and cloth line resistance independently.
Embodiment
With embodiment and comparative example the present invention is elaborated below.In addition, the invention is not restricted to these embodiment.
[relation of conducting stability and filler]
In order to study the influence of the insulating properties filler that is dispersed in the insulative resin, measured the continuity test that is formed on the substrate resistance with pattern to the interlayer conduction stability of multilayer circuit board.
Fig. 9 representes the resistance and the figure that has or not the relation of insulating properties filler of daisy chain.The figure on the left side is the figure that does not have under the situation of insulating properties filler.The figure on the right is the figure that has under the insulating properties filler situation.The insulating properties filler has used silicon dioxide (D50=10 μ m φ).50～500kgf/cm is adopted in exerting pressure of laminating hot pressing 2The transverse axis of figure is that the connection resistance measurement of daisy chain is numbered with extraction electrode, and this is numbered corresponding to measuring positions different in the substrate.Shown in the figure of Fig. 9, can confirm: under the situation that does not have the insulating properties filler, it is big that the interlayer in the substrate connects resistance fluctuation, the conducting poor stability; On the other hand, under the situation that the insulating properties filler is arranged, the fluctuation of the interlayer connection resistance in the substrate is little, the conducting good stability.
The limit changes the mixing ratio limit of the insulating properties filler in the insulative resin to be estimated, and can confirm that from the result who estimates the mixing ratio of insulating properties filler is preferably below the above 50vol% of 1vol%, more preferably below the above 30vol% of 1vol%.Under the situation of having considered low connection resistance, the mixing ratio of this insulating properties filler is further preferably below the above 20vol% of 1vol%.
(a) of Figure 10 is that resistance with the conductivity salient point is the longitudinal axis, is the figure of transverse axis with the position in the substrate to (f) of Figure 10.The diameter that (c) of (a) of Figure 10, (b) of Figure 10, Figure 10 corresponds respectively to the insulating properties filler is the situation of 0-4 μ m φ, 5-20 μ m φ, 25-50 μ m φ.The insulating properties filler is 10vol% with respect to the addition of insulating layer material.The bottom surface average diameter of the conductivity salient point after the range upon range of pressurization is 100 μ m φ, and the average height of conductivity salient point is 20 μ m.
Can confirm from described figure; The diameter of insulating properties filler than 20% of conductivity bump height little situation under; Because the insulating properties filler is too small, be created between the wiring be short-circuited easily, the insulating properties filler remains in the first-class problem of conductivity salient point easily, so conducting bad stability.At the diameter of insulating properties filler in more than 20% under the situation below 100% of conductivity bump height, problems such as short circuit between being not easy to connect up and open circuit, so conducting good stability.The diameter of insulating properties filler than 100% of conductivity bump height big situation under because the insulating properties filler is excessive, take place the conductivity salient point and should with wiring that the conductivity salient point is connected between open a way so conducting bad stability.
In addition, Figure 10 (d), Figure 10 (e), Figure 10 (f) to correspond respectively to the insulating properties filler be the situation of 0vol%, 25-30vol%, 1-20vol, 10-15vol% with respect to the addition of insulating properties material.Addition at the insulating properties filler is under the situation of 0vol%, and because of the influence of substrate warp causes the conduction fluctuation, and the absolute value of resistance is also greatly to more than 10 Ω.On the other hand, be under the situation more than the 25vol% at said addition, the absolute value of resistance and fluctuation and addition are that the situation of 0vol% is compared and improved.At addition is under the situation of 30vol%, and the conduction that causes because of the conductivity salient point is below 10 Ω, can find out that this value is in level no problem in the use of multilayer circuit board (Figure 10 (d)).On the other hand, be under the situation of 1-20vol% in the amount of insulating properties filler, warpage has the tendency of further improvement, and the absolute value of resistance significantly reduces with fluctuation.Amount at the insulating properties filler is under the situation of 10-15vol%, can find out that resistance is below the 100m Ω, and it is also very little to fluctuate.
[relation of conducting stability and conductivity bump height]
Conducting between the two layers of wiring that connects with the conductivity salient point stability and the relation of conductivity salient point shape and size are estimated.In insulating barrier, be dispersed with particle diameter and count the insulating properties filler of about 10 μ m φ by D50.The thickness of insulating barrier is about 10 μ m.As the bottom surface diameter of estimating the conductivity salient point that sample prepares three kinds of 50 μ m φ, 80 μ m φ, 100 μ m φ are arranged, highly have high with low two kinds, six kinds altogether.The bottom surface diameter of conductivity salient point is the sample of 80 μ m φ or 100 μ m φ, the conductivity salient point highly stablely greater than the thickness of insulating barrier.The bottom surface diameter of conductivity salient point is that the sample of 50 μ m φ also is the high sample of height of conductivity salient point in addition, the conductivity salient point highly stablely greater than the thickness of insulating barrier.The bottom surface diameter of conductivity salient point is the low sample of height of the conductivity salient point of 50 μ m φ; The fluctuation of conductivity bump height is big; In addition, the conductivity salient point that conductivity salient point that the aspect ratio thickness of insulating layer is big and aspect ratio thickness of insulating layer are little mixes.
Conducting stability to said sample is estimated; Consequently: the bottom surface diameter is the high sample of height of the high sample of the height of conductivity salient point of 80 μ m φ or 100 μ m φ or low sample and the bottom surface diameter conductivity salient point that is 50 μ m φ, has obtained good conducting stability.Relative therewith, the bottom surface diameter is the low sample of conductivity bump height of 50 μ m φ, can not obtain good conducting stability.
[relation of conducting stability and conductivity bump height]
(a) of Figure 11 and (b) be respectively the figure of relation of the addition of thickness (highly) and the resistance value of expression conductivity salient point and the thermoplastic resin that in the conductivity salient point, adds.Can distinguish that from (a) of Figure 11 with (b) along with the increase of thermoplastic resin addition, the thickness attenuation of the conductivity salient point after the laminating hot pressing, conductivity salient point edge horizontal (XY direction) broaden and the resistance value of conductivity salient point reduces back stable., consider the line and the gap of wiring pattern, because of the conductivity salient point along laterally broadening, particularly because of for example 85 ℃, 85%, apply the hot and humid bias voltage test of 50V etc., have the problem that on the XY direction, is short-circuited.Therefore can distinguish, thermoplastic resin with respect to the addition of conductivity convex point material preferably below the above 30wt% of 10wt%.
[evaluation that the salient point that has used epoxy resin is exposed]
Through in the insulating properties mixed liquor, using epoxy resin, made the sample of the evaluation usefulness that the conductivity salient point is exposed.In the making and evaluation of sample, coating contains the insulative resin mixed liquor of epoxy resin on the supporting substrates that is formed with the conductivity salient point, and makes its drying.Measured the variation of thickness then, the outward appearance of conductivity salient point has been observed.
(preparation of electrocondution slurry)
Through under following condition, allocating resinous principle, conductivity composition and solvent into, prepared electrocondution slurry.
Resinous principle:
Biphenyl type liquid-state epoxy resin: 2～10 weight %
Epoxy/phenol: 1～10 weight %
Biphenyl type epoxy resin: below the 5 weight %
Additive: below the 5 weight %
Conductivity composition: allocated above Ag powder (the phosphorus flakelike powder weight: globular powder weight=1: 1) of 80 weight % into.
Solvent: add MEK, adjusted viscosity.
(preparation of insulative resin mixed liquor)
Through under following condition, allocating resinous principle and solvent into, prepared the insulative resin mixed liquor.
Resinous principle (epoxy resin):
(A) YX695BH30 (trade name, ジ ヤ パ Application ェ Port キ シ レ ジ Application (strain) is made): 100 weight portions
(B) ェ ピ キ ュ ア DC808 (trade name, ジ ヤ パ Application ェ Port キ シ レ ジ Application (strain) is made): 154 weight portions
(C) コ ロ ネ one ト 2507 (trade name, Japanese Port リ ゥ レ タ Application industry (strain) is made): 312 weight portions
(D) 2E4MZ (imidazoles is a crosslinking catalyst, trade name, four countries change into Co., Ltd. and make): 9.6 weight portions
DVB-960 (trade name, Nippon Steel Chemical Co., Ltd makes): 98.6 weight portions
パ one ォ Network タ O (trade name, NOF Corp makes): 9.6 weight portions
(E) insulating properties filler-silicon dioxide D50=10 μ m φ, 10VOL%
Solvent: add MEK, adjusted viscosity.
(formation of conductivity salient point)
On the supporting substrates of processing by PET, be coated with electrocondution slurry with silk screen printing, form the conductivity salient point of overshooting shape thus.The bottom surface diameter of conductivity salient point is 80 μ m～110 μ m, highly is 25 μ m～40 μ m.
(coating of insulative resin mixed liquor and drying)
On the supporting substrates that is formed with the conductivity salient point, be coated with the insulative resin mixed liquor with the scraper plate method.The coating condition is that the gap is 50 μ m～100 μ m, and coating speed is 1m/min, and forming thickness thus is the insulating properties coverlay of 30 μ m～100 μ m.Measured the thickness of insulating properties coverlay thereafter, again the sample drying oven of packing into, make sample 100 ℃ dry 3 minutes down, make the solvent evaporation of filming thus, the thickness of the uncured coverlay of insulating properties is reduced.
After the samples dried, measured the thickness of insulating properties coverlay, the state that in addition the conductivity salient point is exposed is observed.
(measurement of dielectric property)
Epoxy resin to producing has been measured dielectric property.
Dielectric property after the curing:
Relative dielectric constant is: 2.71/1GHz, 2.68/5GHz
Dielectric loss angle tangent is: 0.019/1GHz, 0.0098/5GHz
[to the evaluation of exposing of the conductivity salient point that used the OPE resin]
Through the OPE resin is used for the insulating properties coverlay, made the sample of the evaluation usefulness that the conductivity salient point is exposed.In the making and evaluation of sample, coating contains the insulative resin mixed liquor of OPE resin on the supporting substrates that is formed with the conductivity salient point, makes its drying.Measured the variation of thickness, and the outward appearance of conductivity salient point has been observed thereafter.
(preparation of electrocondution slurry)
Through under following condition, allocating conductivity composition and solvent into, prepared electrocondution slurry.
Resinous principle:
Biphenyl type liquid-state epoxy resin: 2～10 weight %
Epoxy/phenol: 1～10 weight %
Biphenyl type epoxy resin: below the 5 weight %
Additive: below the 5 weight %
Conductivity composition: allocated above Ag powder (the phosphorus flakelike powder weight: globular powder weight=1: 1) of 80 weight % into.
Solvent: add MEK, adjusted viscosity.
(preparation of insulative resin mixed liquor)
Through under following condition, allocating resinous principle and solvent into, prepared the insulative resin mixed liquor.
Resinous principle (OPE resin):
(A) OPE-2st2200 (trade name, Mitsubishi Gas Chemical Co., Ltd makes): 5～40 weight %
(B) TR2003 (trade name, JSR Corp. makes): 5～40 weight %
Solvent: toluene: 20～90 weight %
(C) insulating properties filler-silicon dioxide D50=10 μ m φ, 10VOL%
(formation of conductivity salient point)
On the supporting substrates of processing by PET, be coated with electrocondution slurry through silk screen printing, formed the conductivity salient point of overshooting shape thus.The bottom surface diameter of conductivity salient point is 80 μ m～110 μ m, highly is 16 μ m～40 μ m.
(coating of insulative resin mixed liquor and drying)
On the supporting substrates that is formed with the conductivity salient point, be coated with the insulative resin mixed liquor through the scraper plate method, the coating condition is that the gap is 20 μ m～100 μ m, and coating speed is 1m/min, and having formed thickness thus is the insulating properties coverlay of 20 μ m～100 μ m.Measured the thickness of insulating properties coverlay thereafter, then the sample drying oven of packing into, make sample 100 ℃ dry 3 minutes down, make the solvent evaporation of filming thus, the thickness of insulating properties coverlay is reduced.
After the samples dried, measured the thickness of insulating properties coverlay, and the state that exposes of conductivity salient point has been observed.
(measurement of dielectric property)
OPE resin to being made into has been measured dielectric property.
Dielectric property after the curing:
Relative dielectric constant is 2.40/5GHz
Dielectric loss angle tangent is 0.0019/5GHz
Industrial applicibility
As above being described in detail, the present invention relates to the multilayer circuit board corresponding with high-density installation.Particularly according to the present invention, can provide can improve the interlayer connective stability, high finished product rate and multilayer circuit board and manufacturing approach thereof cheaply.The present invention has very big contribution to the electronic product field.

Claims (18)

1. multilayer circuit board is characterized in that comprising:
The conductivity group of bumps is formed between first conductor layer and second conductor layer; And
Insulating barrier, be formed on said conductivity group of bumps around, contain the insulating properties filler that prevents that short circuit from using.
2. multilayer circuit board is characterized in that comprising:
The conductivity group of bumps is formed between first conductor layer and second conductor layer; And
Insulating barrier, be formed on said conductivity group of bumps around, contain the insulating properties filler, wherein,
The average grain diameter of said insulating properties filler is more than 20% below 100% of average height of the said conductivity group of bumps after the laminating hot pressing.
3. multilayer circuit board according to claim 1 and 2; It is characterized in that; Said insulating barrier is through under the condition that in fact curing reaction does not take place, making solvent evaporates make the film attenuate at the resin that makes the insulative resin mixed liquor that contains the insulating properties filler, the layer that the said resin solidification that contains the insulative resin mixed liquor of insulating properties filler is formed.
4. according to each described multilayer circuit board in the claim 1 to 3, it is characterized in that said insulating properties filler is one or more materials of from silicon dioxide, carborundum, aluminium oxide, aluminium nitride, zirconium oxide bead, bead, acrylic acid pearl, selecting.
5. according to each described multilayer circuit board in the claim 1 to 4, it is characterized in that said insulating properties filler is below the above 30vol% of 1vol% with respect to the addition of said insulative resin mixed liquor.
6. according to each described multilayer circuit board in the claim 1 to 5; It is characterized in that said insulative resin mixed liquor has used epoxy resin, bismaleimide-triazine resin, polyimide resin, acrylic resin, phenolic resins, oligomerisation phenylene ether resin, polyether resin and melmac.
7. according to each described multilayer circuit board in the claim 1 to 6, it is characterized in that the relation of the height h2 of said conductivity group of bumps and the thickness t 3 of said insulating barrier is: h2 >=t3.
8. according to each described multilayer circuit board in the claim 1 to 7; It is characterized in that the resin combination that constitutes said conductivity group of bumps is processed by adding thermoplastic resin to obtain in the thermosetting resin material with the mixing ratio below the above 30wt% of 10wt%.
9. the manufacturing approach of a multilayer circuit board is characterized in that comprising at least:
On conductor layer, form the operation of the conductivity group of bumps of overshooting shape;
Through being coated with the insulative resin mixed liquor that contains insulating properties filler and volatile solvent on the said conductor layer with on the said conductivity group of bumps, form the operation of mobile coverlay;
Through making said volatile solvent volatilization and making said mobile coverlay attenuate, form the operation of the uncured coverlay of insulating properties; And
After being layered in conductor layer or core substrate on the uncured coverlay of said insulating properties, make the uncured coverlay generation of said insulating properties curing reaction, form the operation of insulating barrier.
10. the manufacturing approach of a multilayer circuit board is characterized in that comprising at least:
On first core substrate, form the operation of the conductivity group of bumps of overshooting shape;
Through on said conductivity group of bumps, being coated with the insulative resin mixed liquor that contains insulating properties filler and volatile solvent, form the operation of mobile coverlay;
Through making said volatile solvent volatilization and making said mobile coverlay attenuate, form the operation of the uncured coverlay of insulating properties; And
After being layered in conductor layer or second core substrate on the uncured coverlay of said insulating properties, make the uncured coverlay generation of said insulating properties curing reaction, form the operation of insulating barrier.
11. the manufacturing approach of a multilayer circuit board is characterized in that comprising at least:
On first core substrate, form the operation of the conductivity group of bumps of overshooting shape;
Through on the conductor layer or second core substrate, being coated with the insulative resin mixed liquor that contains insulating properties filler and volatile solvent, form the operation of mobile coverlay;
Through making said volatile solvent volatilization and making said mobile coverlay attenuate, form the operation of the uncured coverlay of insulating properties; And
With said first core substrate be formed with the conductor layer of the uncured coverlay of said insulating properties or the operation of the second core substrate laminating hot pressing.
12. the manufacturing approach of a multilayer circuit board is characterized in that comprising at least:
Through on first conductor layer that is configured on first core substrate, being coated with the insulative resin mixed liquor that contains insulating properties filler and volatile solvent, form the operation of mobile coverlay;
Through making said volatile solvent volatilization and making said mobile coverlay attenuate, form the operation of the uncured coverlay of insulating properties;
On second conductor layer or second core substrate, form the operation of the conductivity group of bumps of overshooting shape; And
Operation with said first core substrate and said insulating barrier laminating hot pressing.
13. the manufacturing approach of a multilayer circuit board is characterized in that,
On first conductor layer, form the conductivity group of bumps; The insulative resin mixed liquor that contains insulating properties filler and volatile solvent through coating forms mobile coverlay; Through making said volatile solvent volatilization and making said mobile coverlay attenuate form the uncured coverlay of insulating properties; Thereby form multilayer circuit board and use parts
Form one or more said multilayer circuit boards with parts after; Through once comprise with said multilayer circuit board with stacking part hot pressing on the core substrate and operation or repeated multiple times that said multilayer circuit board forms second conductor layer on parts comprise with said multilayer circuit board with stacking part hot pressing on the core substrate and said multilayer circuit board with parts on the operation of formation second conductor layer, form multilayer circuit board.
14. the manufacturing approach of a multilayer circuit board is characterized in that,
On first conductor layer, form the conductivity group of bumps; The insulative resin mixed liquor that contains insulating properties filler and volatile solvent through coating forms mobile coverlay; Through making said volatile solvent volatilization and making said mobile coverlay attenuate form the uncured coverlay of insulating properties; Thereby form multilayer circuit board and use parts
Form one or more said multilayer circuit boards with parts after, through one or more said multilayer circuit boards with parts in a lump laminating hot pressing on core substrate, form multilayer circuit board.
15. the manufacturing approach according to each described multilayer circuit board in the claim 9 to 14 is characterized in that, the content of the fixedness composition in the said insulative resin mixed liquor is 10 weight %～80 weight %.
16. the manufacturing approach according to each described multilayer circuit board in the claim 9 to 15 is characterized in that, the drying/setting temperature of said insulating barrier is more than 60 ℃ below 160 ℃.
17. manufacturing approach according to each described multilayer circuit board in the claim 9 to 16; It is characterized in that the resin combination that constitutes said conductivity group of bumps is processed by adding thermoplastic resin to obtain in the thermosetting resin material with the mixing ratio below the above 30wt% of 10wt%.
18. manufacturing approach according to each described multilayer circuit board in the claim 9 to 17; It is characterized in that the temperature of said laminating hot pressing is below the beginning temperature of insulative resin curing reaction and more than the temperature that the heat fusing viscosity of insulative resin reduces.
CN201080034878.7A 2009-08-07 2010-07-30 Multilayered wiring board and method for manufacturing multilayered wiring board Active CN102474993B (en)

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JP2009184992A JP4825286B2 (en) 2009-08-07 2009-08-07 Manufacturing method of multilayer wiring board
PCT/JP2010/062870 WO2011016394A1 (en) 2009-08-07 2010-07-30 Multilayered wiring board and method for manufacturing multilayered wiring board

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