JP2011187999A - Multilayer wiring board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve a problem that, although a multilayer wiring technology to connect layers using conductive bumps of B<SP>2</SP>it etc., used to be employed to manufacture a multilayer wiring board used to mount electronic components, the warpage of the substrate may cause a short circuit between multilayer wiring or a defect in connection between a conductive bump and wiring. <P>SOLUTION: The multilayer wiring board is coated with insulating varnish including an insulating filler to form an insulating coating. Even if the substrate is warped, insulation between multilayer wiring can be held and the stability of wiring connection is thereby enhanced to improve a manufacturing yield. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a multilayer wiring board on which electronic components are mounted and a method for manufacturing the multilayer wiring board, and more particularly to a method for manufacturing a multilayer wiring board that includes vias made of conductive bumps and enables high-density wiring.

Japanese Patent No. 3167840 JP 2007-13208 JP 2006-183072 JP JP 2002-353617 A

In recent years, as electronic devices have become smaller, lighter, faster, and more multifunctional, there has been an increasing demand for high-density mounting even on wiring boards mounted on electronic devices. In order to meet such demands, development of multilayer wiring boards for mounting electronic components by alternately stacking a plurality of insulating substrates and conductive patterns has been underway.
As representative multilayer wiring board manufacturing technologies, Matsushita Electronic Parts's ALIVH and Toshiba and Dai Nippon Printing's B ² it are known.
ALIVH (Any Layer Interstitial Via Hole structure multi layered
The printed wiring board) is a technique in which an interlayer connection hole is formed in an insulating base material and then the hole is embedded with a conductive material. First, a fine via hole is formed by irradiating a prepreg (insulating base material sheet used as a wiring board material) with laser light. The formed via hole is filled with a conductive paste to form a via (interlayer connection portion), and a copper foil is laminated and hot-pressed on the prepreg. Furthermore, a conductive pattern is formed by photolithography and etching to form a wiring board member, and the wiring board member is laminated and hot pressed to manufacture a multilayer wiring board. ALIVH can arrange wiring and electronic parts on the via hole, so that the wiring length can be shortened and high-density mounting is possible.
However, as the number of via holes increases, the processing time of laser light irradiation increases and the manufacturing cost increases, and the adhesion strength of the copper foil bonded with the laminated hot press to the vias is not high, so open failures are not possible during the drop test. There is a problem that it is easy to occur and has low reliability.

B ² it (Buried Bump Interconnection
Technology) is a technique for forming vias made of conductive bumps by forming conductive bumps having a mountain shape or a substantially conical shape on a conductive plate and then heat-softening the insulating prepreg base material to press through. Technologies related to B ² it are disclosed in Patent Document 1 and Patent Document 2.
Patent Document 1 discloses a technique of forming an interlayer wiring by inserting a mountain-shaped conductor bump in the thickness direction of a synthetic resin support.
In Patent Document 2, an uncured insulating material base material is disposed on and pressed through a substantially conical conductor bump formed on a conductor plate, and the conductor plate is patterned to produce a substrate unit. A technique is disclosed in which a plurality of such substrate units are stacked and cured by pressurization and heating.
B ² it, like ALIVH, does not have a depression on the via hole, and wiring and electronic parts can be placed, so that the wiring length can be reduced and high-density mounting can be achieved. Further, unlike ALIVH, vias are formed in a lump, so that the manufacturing cost does not increase even if the number of via holes increases. Since the conductive bump is formed on the copper foil by printing before the prepreg lamination, there is an advantage that the adhesiveness to the copper foil is good.
On the other hand, B ² it has the following problems.
(1) A large pressure is applied to the conductive bumps and prepregs having a high aspect ratio during the insertion of the conductive bumps and during the laminated hot pressing for forming the multilayer wiring board. Currently, the in-plane density of vias is about 300,000 pieces / m ² , but it is expected to be about 1 million pieces / m ^{2 in the} future. In this case, an extremely large pressure is applied to the conductive bumps and prepregs, so that the defect rate due to breakage of the conductive bumps and prepregs increases. Therefore, B ² it is difficult to cope with high density.
(2) In B ² it, the conductive bumps must have mechanical strength, and the outer diameter must be 100 μm or more. In order to realize high-density mounting, miniaturization is progressing with the base diameter of the conductive bump being 30 μm to 50 μm. However, B ² it is difficult to cope with because the bump has a high aspect ratio and there is a limit to thinning the prepreg.
(3) Unless the aspect ratio (height / outer diameter) of the conductive bump is 0.8 to 1.0 or more, the conductive bump does not penetrate the prepreg. In addition, there is a limit to reducing the thickness of the glass cloth-impregnated insulating resin base material, which is a general material of prepreg (up to 30 μm ^t ). Furthermore, to obtain good conductive bump penetration characteristics, a conductive bump height of about three times the prepreg thickness is required. For this reason, if the above-described aspect capable of being inserted is ensured, there is a limit (min. 72 to 90 μm) in miniaturization of the bottom diameter of the conductive bump. In addition, the conductive bumps do not penetrate the prepreg unless the thickness of the prepreg and the temperature of the pressing process are properly adjusted. Therefore, B ² it has a problem that a margin for manufacturing conditions such as conductive bump formation, an insertion process, and a laminated hot pressing process is small and the yield is low.
(4) It is extremely difficult to develop a conductive paste capable of printing and forming high-aspect conductive bumps with a fine outer diameter.
(5) In the step of heat softening the pre-curing insulating resin prepreg sheet and pressing it into the projecting conductive bumps, the prepreg sheet is woven vertically and horizontally with a fiber filament bundle. Therefore, there is a large difference in penetration resistance when the conductive bump hits the intersection of the filament bundle and between the filament bundle and the filament bundle. At the interface between the resin prepreg sheet and the conductive bump, an insulating resin and / or a glass cloth crushing residue is generated. These insulating resin and / or glass cloth crushing residue causes an increase in contact resistance value or poor conduction due to lamination pressurization of the conductive bump and the conductive layer of the wiring board in the subsequent process, and Yield was lowered.

14A to 14D are a cross-sectional view and a perspective view in the order of steps showing a method of manufacturing a B ² it type multilayer wiring board member in which a conventional prepreg sheet is inserted through bumps. First, a substantially conical conductive bump 502 is formed on the first conductive foil 501 by a conductive paste printing process to form an intermediate (FIG. 14A). Next, the intermediate is opposed to the prepreg sheet 503 that is an insulating resin in a pre-curing state (FIG. 14B). Next, under heating, the temperature of the prepreg sheet 503 is raised to the point before melting and is softened, and the leading end portion of the conductive bump 502 is projected from the prepreg sheet 503 (FIG. 14C). Next, the second conductive foil 505 is attached on the prepreg sheet 503 on which the conductive bumps 502 have been cueed (FIG. 14D). FIG. 14E is a horizontal cross-sectional view of the upper part of the conductive bump 502 of the multilayer wiring board member produced by such a method. It is observed that the glass fiber base breakage 508 contained in the prepreg sheet remains in the bump surface 507. A plurality of multilayer wiring board members produced by such a method are stacked and pressed to form a multilayer wiring board. In the conventional method for manufacturing a B ² it type multilayer wiring board member, there is a problem in that an electrical connection failure of an interlayer wiring is likely to occur because debris remains in the bump surface.

On the other hand, Patent Document 4 discloses a curtain coater on a conductor bump group formed on a first metal foil as a conventional technique for forming a via made of a conductor bump without using a penetration method such as B ² it. A method is disclosed in which an insulating resin composition is applied by a method, and a second metal foil is stacked and pressed. As a method of applying the insulating resin composition, besides the curtain coater method, a spray method or a method of coating a conductive bump on a heat-softening film is described. The method disclosed in Patent Document 4 can avoid the above-mentioned problem in B ² it because no mechanical pressure is applied to the conductor bumps. However, this method is a method in which an insulating resin having a high viscosity remains in a liquid state in the curtain coating method and is applied in the form of droplets in the spray method on the conductive bumps. There is a problem that the resin easily adheres and the incidence of contact failure between the conductor bump and the second metal foil is high. In addition, when a heat-softening film is coated on the conductor bump, there is a problem that an interlayer connection cannot be formed because the tip end portion of the conductor bump is not exposed.

  Further, as a problem of the conventional method for manufacturing a multilayer wiring board, there is a problem that a connection failure occurs between the multilayer wirings due to warpage of the core board. 8 (b) and 8 (c) are cross-sectional views in the case where a connection failure between the wirings occurs by the conventional multilayer wiring manufacturing method. In FIG. 8B, the first core substrate 213 and the second core substrate 208 on which the wiring is formed are laminated so that the wiring surfaces face each other with the insulating resin layer 211 interposed therebetween. A part of the wiring 212 and the wiring 209 is electrically connected by the conductive bump 210. When there is a large warp on the core substrate, for example, as shown in FIG. 8B, when there is a warp that is convex at the center, the wiring layer that should originally be separated by the insulating resin layer 211 Wiring short circuit has occurred due to contact. On the other hand, as shown in FIG. 8C, when the wiring 215 and the wiring 218 are not in contact with each other and are insulated by the insulating resin layer 217, the conductive bumps 216 in the peripheral portion to be originally electrically connected Opposite wiring does not touch and wiring open occurs. The conventional method for manufacturing a multilayer wiring board has a problem that the manufacturing yield of the multilayer wiring board cannot be sufficiently increased because wiring connection failure occurs due to warping of the board.

  The present invention can cope with miniaturization, high density and thin multi-layers, has good interlayer insulation, can supply a wiring board with high connection reliability by interlayer fine conductive bumps, and has a manufacturing yield. An object of the present invention is to provide a member for a multilayer wiring board that is high in manufacturing cost and a method for manufacturing the multilayer wiring board.

The present invention (1) includes an insulating bump containing a conductive bump group formed between a first conductor layer and a second conductor layer, and an insulating filler for preventing a short circuit formed around the conductive bump group. And the insulating layer is a layer formed using an insulating resin compound liquid containing an insulating filler, and the average particle size of the insulating filler is an average of the conductive bump group after the laminated heat press 20% or more and 100% or less of the height, the mixing ratio of the insulating filler in the insulating resin compounding liquid is 1 vol% or more and 30 vol% or less, and the material of the insulating resin compounding liquid is oligophenylene A multilayer wiring board comprising an ether resin.
The present invention (2) includes an insulating bump containing a conductive bump group formed between the first conductor layer and the second conductor layer, and an insulating filler for preventing a short circuit formed around the conductive bump group. And the insulating layer is a layer formed of a film formed from an insulating resin compounding liquid containing an insulating filler, and the conductive bump group after the laminated heat press has an average particle size of the insulating filler 20% or more and 100% or less of the average height, and the mixing ratio of the insulating filler in the insulating resin compounding liquid is 1 vol% or more and 30 vol% or less, and the material of the insulating resin compounding liquid is A multilayer wiring board comprising an oligophenylene ether resin.
In the present invention (3), the insulating layer is a layer formed by volatilizing the solvent and reducing the film under the condition that the resin of the insulating resin compounded liquid containing the insulating filler is not substantially cured and then cured. It is the multilayer wiring board of the said invention (1) or the said invention (2) characterized by the above-mentioned.
The present invention (4) is characterized in that the insulating filler is one or a plurality of materials selected from silica, silicon carbide, alumina, aluminum nitride, zirconia beads, glass beads, and acrylic beads. The multilayer wiring board according to any one of the inventions (1) to (3).
The present invention (5) is characterized in that a height h2 of the conductive bump group after the laminated hot pressing is h2 ≧ t3 with respect to a thickness t3 of the insulating layer after the laminated hot pressing. The multilayer wiring board according to any one of the inventions (1) to (4).
The present invention (6) is characterized in that the resin composition constituting the conductive bump group is made of a material in which a thermoplastic resin is added to a thermosetting resin at a mixing ratio of 10 wt% or more and 30 wt% or less. The multilayer wiring board according to any one of the inventions (1) to (5).

According to the present invention,
1. Compared with B ² it,
Since it is not a conductive bump penetration process, no mechanical pressure is applied to the member,
-The insulating layer can be made thin, and the height of the conductive bump can be lowered. Further, a via can be formed even if the conductive bump has a small aspect ratio. Thereby, the size of the conductive bump can be reduced. As a result, a high-density multilayer wiring board having conductive bumps with an outer diameter of 30 to 50 μm can be manufactured. In the future, it will be possible to handle when the density of conductive bumps reaches 1 million / m ² .
・ Because there is no need to increase the aspect ratio of conductive bumps, conductive bumps can be formed without using special conductive paste or without repeating the paste coating process for forming conductive bumps many times. Is possible. Therefore, material cost and manufacturing cost can be reduced.
・ Defect rate due to damage to conductive bumps, wiring, and insulating film is reduced.
-Even if the aspect ratio of the conductive bumps necessary for forming a good interlayer connection is small, the manufacturing condition margin is wide, so that the manufacturing yield is improved.
2. Compared to ALIVH,
・ Because laser drilling technology is not used, the shape non-uniformity of the hole can be eliminated. The shape non-uniformity due to the laser drilling method causes the penetration of liquid or moisture into the wiring board due to poor adhesion between the hole portion and the via conductive agent in the manufacturing process, and is one of the causes of various defects. On the other hand, according to the manufacturing method of the present invention, the interface between the conductive bump and the insulating coating is formed by applying a low viscosity fluid resin around the conductive bump. The adhesion between the bump and the insulating coating and the reliability of the wiring board are extremely high.
・ Since this is a method of manufacturing a plurality of vias at once, the manufacturing cost does not increase even if the number of vias increases.
3. Compared with the through-hole plating method, the space utilization efficiency of vias is high and suitable for miniaturization. Due to the structure in which the interlayer connection hole is filled with a conductive member, it has a high heat dissipation effect and is suitable for mounting a device that generates a large amount of heat such as a high-speed CPU. Since there is no dent, wiring and other vias can be formed on the vias, and components can be mounted on the surface vias, which is effective in improving the mounting density.
4). Unlike the method in which the insulating resin composition is applied by the curtain coating method, the manufacturing method according to the multilayer wiring board of the present invention reduces the film thickness of the coating formed by applying a relatively low concentration resin compounding liquid and conducts electricity. In this method, the insulating bump does not remain at the tip of the conductive bump. Therefore, reliable interlayer connection can be formed and via resistance can be reduced.
5. Vias can be formed even if the upper cross-sectional shape of the conductive bumps is a gentle arc with a central angle of 180 ° or less. Unlike the conductive bumps used in conventional methods with a small area at the top, the cross-sectional area of the vias is small. large. Further, since the residual amount of the insulating material at the contact portion between the via and the wiring can be reduced, the contact area between the via and the wiring can be increased, and the via resistance can be reduced.
6). Since a multilayer wiring board is manufactured by laminating wiring board members having an insulating uncured coating,
-The adhesion strength between the insulating coating and the conductive pattern is increased, and the wiring is difficult to peel off.
-The adhesion strength between adjacent insulating coatings is increased, and a strong multilayer wiring board can be manufactured.
-The insulating film is flexible, and even if the ground is uneven, the film is good and the surface is flat.
-The adhesion strength with the wiring that contacts the conductive bump is increased, and the via resistance can be reduced.
7). By combining the thick film process and the conductive thin film etching process, the manufacturing cost of the high-density multilayer wiring board can be reduced.
8). A multilayer wiring board having a high mounting density can be provided, which contributes to the reduction in size and weight of electronic devices and the increase in functionality.
9. Since the insulating film is formed of an insulating material having a low relative dielectric constant and dielectric loss, a mounting wiring board having excellent electric signal propagation characteristics can be produced.
10. Since wiring and conductive bumps are formed using highly conductive wiring materials even at low temperature heat treatment, a mounting wiring board with excellent electrical signal propagation characteristics can be produced even if the wiring film thickness is thin and the wiring width is thin. .
11. Since the manufacturing method according to the multilayer wiring board of the present invention can manufacture a multilayer wiring board by batch lamination, the number of manufacturing steps can be reduced and the manufacturing cost can be reduced compared to the method of manufacturing a multilayer wiring board by sequential lamination. There is little heat history applied to the wiring board member, and the reliability of the member and the multilayer wiring board formed by these members are high.
12 Dispersing the insulating filler in the insulating coating material can reduce the rate of wiring connection failures such as shorts and opens caused by warping of the core substrate, and is effective in improving the manufacturing yield.

The best mode of the present invention will be described below.
(Multilayer wiring board members, multilayer wiring boards, composite multilayer wiring boards)
In the production of a multilayer wiring board, a multilayer wiring board member (a wiring board member or simply a wiring board member) which is a component constituting the multilayer wiring board is formed, and a plurality of such multilayer wiring board members are then formed. Laminate and press under heating to form a multilayer wiring board. In particular, a multilayer wiring board obtained by laminating a surface circuit layer made of a multilayer wiring board member having a high conductive bump density and a core substrate having a low conductive bump density manufactured by the technique of the present invention is called a composite multilayer wiring board. Alternatively, the composite multilayer wiring board including the core substrate may be simply referred to as a multilayer wiring board. The core substrate bears physical rigidity and at the same time forms circuits such as power wiring and ground wiring which are not so fine, and the surface circuit layer forms fine wiring. By using the technology of the present invention for the manufacture of multilayer wiring board members that constitute the surface circuit layer, a combination of a thick film process with a low manufacturing cost and an etching process of a conductive thin film capable of microfabrication is combined with a high mounting density. A multilayer wiring board can be formed.

(Batch lamination, sequential lamination, core / core lamination)
A method of manufacturing a multilayer wiring board by forming a multilayer wiring board member having wiring and then laminating and pressing a plurality of multilayer wiring board members at one time, or a plurality of multilayer wiring board members and a core substrate at a time A method of producing a composite multilayer wiring board by laminating and hot pressing is called batch lamination. On the other hand, a multilayer wiring board member with or without wiring is formed, a conductive foil is pasted thereon, a wiring is formed by etching, and then the next multilayer wiring board member is placed on the laminated heat. A method of manufacturing a multilayer wiring board or a composite multilayer wiring board by sequentially repeating the pressing process is called sequential lamination.
Batch stacking can reduce the number of processes and reduce manufacturing costs. In addition, there is an advantage that the reliability of a member having little heat history applied to the wiring board member and a multilayer wiring board formed by these members is high. With conventional B ² it, it is difficult to perform batch lamination, but with the technique of the present invention, it is possible to easily manufacture a multilayer wiring board by batch lamination.
On the other hand, the sequential lamination has the advantage that alignment by the wiring pattern is unnecessary and only the alignment of the conductive bumps is required. However, it is necessary to perform etching or lamination heat press for each multilayer wiring board member to be laminated, There is a problem that the manufacturing cost is high due to the increase in the number and the thermal history is increased, so that the reliability of the member is lowered.
In the core / core lamination, a single insulating film is arranged between the core substrate and the core substrate is electrically connected by conductive bumps.
The method for manufacturing a multilayer wiring board according to the present invention includes batch lamination, sequential lamination, and core / core lamination as modifications of the embodiment.

(Manufacturing method of members for wiring boards)
In the method for manufacturing a wiring board member according to the embodiment of the present invention, a projecting conductive bump having a substantially truncated cone shape or a substantially cylindrical shape is used as an interlayer connection member. In addition, a fluid coating is formed by applying an insulating resin compound liquid on and around the conductive bumps (conductive bump group) formed on the support member at a high density. Thereafter, the solvent is volatilized under the condition that the resin of the insulating resin compounding liquid is not substantially cured and reacted to solidify and reduce the fluid film to obtain an insulating film.
Conventionally, when a multilayer wiring board member is laminated and pressed without cueing conductive bumps, it has been considered that electrical connection between layers cannot be obtained. However, the inventors of the present application do not necessarily cue the conductive bumps, and the insulating resin that electrically separates the wiring boards is laminated in an uncured film state and subjected to hot pressing to perform multilayer pressing. When producing a wiring board or a composite multilayer wiring board, it was found for the first time that electrical connection between layers can be obtained with high stability. It was also confirmed that the electrical connection reliability of the multilayer wiring board and the composite multilayer wiring board manufactured by such a method was good. The multilayer wiring board according to the present invention has an effect that can cope with high-density mounting, as in the case of not cueing, although the number of processes is increased when cueing conductive bumps. Compared to the case where cueing is not performed, the conduction stability between the wirings is further improved. When cueing the conductive bump, at least a part of the solvent of the fluid film is evaporated, the film thickness of the insulating film is reduced, and the tip of the conductive bump is placed on the insulating film. An additional step of projecting is performed. By simply applying a thin insulating resin compound solution on the conductive bump, the resin compound solution remains at the tip of the conductive bump, but after the resin compound solution is applied thicker than the conductive bump height, the solvent is evaporated. This makes it possible to cue conductive bumps with good reproducibility.
In the present specification, the insulating film after coating and before the film thickness reduction is called a fluid film, and the insulating film after the film thickness reduction and before the curing reaction is called an insulating uncured film. .
Unlike the manufacturing method in which the tip of the conductive bump protrudes on the insulating coating by insertion such as B ² it, the conductive bump and the insulating coating are formed at the stage of forming the insulating coating around the conductive bump. No mechanical pressure is applied. Therefore, it is possible to cope with a high density of conductive bumps in terms of mechanical durability of the insulating coating. In addition, the bottom diameter of the conductive bump can be reduced. Furthermore, the aspect ratio of the conductive bumps can be reduced, and the design margin of the conductive bump shape and the margin of the manufacturing conditions can be increased, so that the manufacturing yield of the multilayer wiring board is improved.
Here, the member for the multilayer wiring board of the present invention is an insulating uncured film obtained by casting a resin dissolved in a solvent around the bump group and sufficiently wetting the periphery of the conductive bump to dry and solidify it. In particular, the conductive bumps and the resin have a close adhesion structure. On the other hand, a conventional insulating resin such as B ² it is a solid sheet, which is generally called a B stage, where the solvent is evaporated, and it is difficult to force the solid sheet to be softened by heat and inserted into conductive bumps. Since there is a gap in the periphery of the bump because of the perforation of the fracture, the adhesion reliability between the conductive bump and the resin is inferior to that of the present invention.

(Dispersion of insulating filler)
In order to solve the above-mentioned problem of the interlayer wiring connection failure due to the warp of the substrate, the present inventors have found that it is extremely effective to disperse the insulating filler in the interlayer insulating film of the multilayer substrate. It was.
A multilayer wiring board according to the present invention includes a conductive bump group formed between a first conductive layer and a second conductive layer, and an insulating layer formed around the conductive bump group to stabilize conductivity. And an insulating layer containing a conductive filler. Furthermore, the average particle diameter of the insulating filler is preferably in the range of 20% or more and 100% or less of the average height of the conductive bump group after the lamination hot pressing.
FIG. 8A is a cross-sectional view of a multilayer wiring board according to the present invention. The core substrate 201 and the core substrate 207 are laminated via an insulating resin layer 204 in which an insulating filler 205 is dispersed. The wiring on the core substrate 201 side and the wiring on the core substrate 207 side are arranged on opposite sides, and a part of the wiring region is electrically connected via the conductive bump 203. The core substrate has, for example, a large warp protruding at the center. For this reason, since the distance between the core substrates is large in the peripheral portion of the core substrate, the core substrate must be sufficiently close to make an interlayer connection in the peripheral portion of the substrate. In this case, when the insulating filler is not dispersed, the wiring at the center of the substrate is short-circuited as shown in FIG. 8B. However, according to the manufacturing method of the present invention, the insulating resin layer Since insulating fillers such as silica that are less deformed due to pressure are dispersed in 204, short-circuiting of wiring is less likely to occur at the center of the substrate as shown in FIG.
As described above, the multilayer wiring board according to the present invention includes an insulating layer containing an insulating filler for preventing a short circuit as a constituent element. The term "for short circuit prevention" as used herein does not only mean preventing short circuit between multiple conductors, but also vertical conduction by conductive bumps used for electrical connection between layers in a multilayer wiring board. This means that it is used for the purpose of securing the insulating layer thickness for preventing short circuit without affecting the property.

(Thin film process and thick film process)
Processing techniques generally used for manufacturing a multilayer wiring board are classified into a thin film process and a thick film process.
The thin film process uses deposition, sputtering, CVD, PVD, plating, etc. as the film formation technology, and uses photolithography, dry etching, etc. as the pattern formation technology, and mainly processes such as vacuum processes and wet processes. Technology. In a mounting wiring board called a wiring board or a printed wiring board, a thin film process such as a semi-additive method is generally used for processing a fine wiring / space width of 50 μm / 50 μm level or less. Although a fine pattern can be processed, there is a problem that the manufacturing cost is high.
In contrast, the thick film process is typically a processing technique centered on printing such as screen printing, and is a dry process and an atmospheric process. The thick film process has a feature that the manufacturing cost can be reduced as compared with the thin film process.
For example, in order to produce a multilayer wiring board having a wiring density of 100 μm or less and a high wiring density, it is necessary to simultaneously make the bottom diameter of the protruding conductive bumps, which are interlayer connection vias, 100 μm or less. However, in the conventional manufacturing method in which an insulating resin prepreg sheet is inserted with conductive bumps, the thickness of the prepreg is at least 30 μm at present, and the thickness is stabilized with conductive bumps. Therefore, it is necessary to make the height of the conductive bumps about 3 times the thickness of the prepreg. The formation of fine conductive bumps of 100 μmφ or less was extremely difficult. Conventionally, in order to realize a high-density wiring board having a via diameter and a wiring width of 100 μm or less, manufacturing cost and manufacturing equipment investment are expensive. It has been common to use thin film processes such as formation.

(Organic wiring board)
In general, multilayer wiring boards are classified into organic wiring boards and inorganic wiring boards depending on the substrate material. The present invention is directed to an organic wiring board using an organic material as a material for an insulating substrate.
(Definition of terms related to insulation layers and conductor layers)
In the present specification, terms relating to the insulating layer are defined as follows.
A liquid in which the insulating resin is dissolved in a solvent is referred to as “insulating resin compounded liquid”. A film obtained by volatilizing the solvent after applying the insulating resin compound liquid on the member is referred to as an “insulating uncured film”. A film in which such an insulating uncured film is heated to cause a resin contained in the insulating uncured film to undergo a curing reaction is referred to as an “insulating film”. The insulating film laminated on the conductor layer or the core substrate is referred to as “insulating layer”.
The “conductor layer” is a highly conductive layer such as a metal, and is a term including, for example, a conductor pattern layer, a solid layer, and a conductor pad layer.

[Multilayer Wiring Board Member According to Embodiment of the Present Invention, and Manufacturing Method Thereof]
(First specific example of manufacturing method of multilayer wiring board member)
1A to 1D are cross-sectional views in order of steps showing a first specific example according to an embodiment of a method for manufacturing a multilayer wiring board member of the present invention. First, a conductive foil 1 such as a copper foil is prepared (FIG. 1 (a)). Next, conductive bumps 2 are formed at predetermined positions on the conductive foil 1 (FIG. 1 (b)). The shape of the conductive bump 2 is preferably a shape such that the diameter of the cross section at the tip is smaller than the diameter of the bottom, such as a substantially truncated cone shape or a substantially cylindrical shape. The conductive bump is formed by screen printing of a conductive paste, for example. As the conductive paste used as the material of the conductive bump 2, for example, metal particles (silver, gold, copper, solder, etc.) are dispersed in a liquid resin, and a volatile solvent is mixed as necessary. Is used. If the required height is not obtained with a single screen printing so that the conductive bump has a predetermined shape and a predetermined height, the shape of the mask is changed multiple times as necessary. Printing may be performed. Next, the insulating resin compounded liquid in which the insulating filler 4 is dispersed is applied on and around the conductive bump 2 to form the fluid film 3 (FIG. 1 (c)). Next, the fluid film 3 is dried to evaporate the solvent to form an insulating uncured film 5 to complete a wiring board member that is a component of the multilayer wiring board (FIG. 1 (d)). As shown in FIG. 1 (d), in the first specific example, the insulating uncured coating 5 is thicker than the conductive bump 2. This indicates that it is not always necessary to cue the conductive bump at the stage of FIG.

(Second specific example of manufacturing method of multilayer wiring board member)
2A to 2D are cross-sectional views in order of steps showing a second specific example according to the embodiment of the method for manufacturing a multilayer wiring board member of the present invention. First, a conductive foil 11 such as a copper foil is prepared (FIG. 2 (a)). Next, conductive bumps 12 are formed at predetermined positions on the conductive foil 11 (FIG. 2B). The shape of the conductive bump 12 is preferably a shape such that the diameter of the tip section is smaller than the diameter of the bottom, such as a substantially truncated cone shape or a substantially cylindrical shape. The conductive bump is formed by screen printing of a conductive paste, for example. As the conductive paste used as the material of the conductive bump 12, for example, metal particles (silver, gold, copper, solder, etc.) are dispersed in a liquid resin, and a volatile solvent is mixed as necessary. Is used. If the required height is not obtained with a single screen printing so that the conductive bump has a predetermined shape and a predetermined height, the shape of the mask is changed multiple times as necessary. Printing may be performed. Next, the insulating resin compound liquid in which the insulating filler 14 is dispersed is applied on and around the conductive bumps 2 to form the fluid film 13 (FIG. 2 (c)). Next, for example, by heating in a drying furnace, a predetermined amount of volatile components contained in the fluid film 13 is evaporated, the film thickness is reduced, and an insulating uncured film 15 is formed, which is a wiring board component of a multilayer wiring board The member is completed (FIG. 2 (d)). At this time, the amount of the volatile component contained in the insulating resin compounding liquid and the heating conditions are adjusted so that the film thickness of the fluid film 13 is reduced and the tip of the conductive bump 12 is exposed.

(Third specific example of the method for producing a multilayer wiring board member)
3A to 3J are cross-sectional views in order of steps showing a third specific example according to the embodiment of the method for manufacturing a multilayer wiring board of the present invention. First, a conductive foil 21 such as a copper foil is prepared (FIG. 3 (a)). Next, conductive bumps 22 are formed at predetermined positions on the conductive foil 21 (FIG. 3B). The shape of the conductive bump 22 is preferably a shape such that the diameter of the cross section at the tip is smaller than the diameter of the bottom, such as a substantially truncated cone shape or a substantially cylindrical shape. The conductive bump is formed by screen printing of a conductive paste, for example. The conductive paste used as the material of the conductive bump 22 is, for example, a material in which metal particles (silver, gold, copper, solder, etc.) are dispersed in a liquid resin and a volatile solvent is mixed as necessary. Use. If the required height is not obtained with a single screen printing so that the conductive bump has a predetermined shape and a predetermined height, the shape of the mask is changed multiple times as necessary. Printing may be performed. Next, the insulating resin compound liquid in which the insulating filler 24 is dispersed is applied on and around the conductive bumps 22 to form the fluid film 23 (FIG. 3C). Next, for example, heating is performed in a drying furnace to evaporate a predetermined amount of volatile components contained in the fluid film 23, thereby reducing the film thickness, thereby forming an insulating uncured film 25 (FIG. 3D). At this time, the amount of the volatile component contained in the insulating resin compounding liquid and the heating conditions are adjusted so that the film thickness of the fluid film 23 is reduced and the tip of the conductive bump 22 is exposed. The fluidity of the insulating uncured film 23 is changed by the heating in the film thickness reduction process, and the insulating film 25 is formed. It is preferable to adjust the heating conditions of the insulating coating 25 to such an extent that the curing reaction starts but does not lead to complete curing. This facilitates handling of the wiring board when forming the conductive pattern on the back surface without deteriorating the adhesion when the insulating coating is laminated. Next, an organic resin film that can sink the tip of the conductive bump 22 on the insulating coating 34 and the conductive bump 22 with a reduced film thickness, such as clerap, pyrene, nylon, PET, PPT, or A protective film 26 made of PI is formed by lamination (FIG. 3E). The protective film 25 is formed for the purpose of protecting the conductive bumps 22 from deformation and damage during the printing of the conductive pattern on the back surface, which is a subsequent process. Next, a resist pattern is formed on the conductive foil 21 on the back surface of the insulating coating 25 by, for example, a photolithography method. Next, the conductive foil 21 is etched by wet etching using the resist pattern as a mask, the resist pattern is removed, the wiring 27 is formed, and the protective film 25 is peeled off (FIG. 3G). Next, an insulating resin compounding liquid is applied on and around the conductive bumps 22 to form a fluid film 28 (FIG. 3 (h)). Next, for example, heating is performed in a drying furnace to evaporate a predetermined amount of volatile components contained in the fluid film 28, thereby reducing the film thickness to obtain an insulating uncured film 29, thereby completing the wiring board member (FIG. 3). (i)). Since the insulating coating 29 is an uncured coating, the adhesion with the member laminated in contact with the insulating coating 29 is improved.

[Detailed explanation about manufacturing methods, materials, etc.]
Hereinafter, a conductive bump, an insulating film, a suitable manufacturing method, a material, and the like related to the multilayer wiring board member according to the embodiment of the present invention will be described in detail.

[Production method]
(Formation of conductive bumps)
1. Step of adjusting conductive paste The conductive paste is prepared by dissolving or dispersing the resin composition and conductive particles in a solvent.
2. Printing, drying, and solidifying process of conductive paste The conductive bumps are formed by printing a conductive paste on a wiring board or a support substrate using a predetermined mask, for example, using a screen printing method. In order to form conductive bumps having a predetermined height and aspect ratio, printing may be repeated several times using different masks as necessary.

(Formation of insulating coating)
1. Preparation process of insulating resin compounding liquid A thermosetting resin composition is dissolved or dispersed in a solvent to prepare an insulating resin compounding liquid. For example, an organic solvent is used as the solvent. Examples of the organic solvent include ketone solvents and aromatic solvents. For example, the former includes methyl ethyl ketone and methyl isobutyl ketone, and the latter includes toluene and xylene.

At the same time, the insulating filler is dispersed in the solvent. It is preferable that the insulating filler is uniformly dispersed in the solvent. The addition amount of the insulating filler is preferably 10 vol% or more with respect to the insulating resin composition.
The amount of the solvent used is preferably adjusted so that the content of the volatile component in the insulating resin compounded liquid is within an appropriate range in order to appropriately cue the conductive bump by evaporation of the solvent. For example, it is preferable to dilute the resin with a solvent so that NV (content of the nonvolatile resin component) is in the range of 10 wt% to 80 wt%. Moreover, it is preferable that the viscosity of the insulating resin compounding liquid is in the range of 100 to 600 mPa · S. If the viscosity is too small, there is a problem in that flow out occurs at the time of application of the resin compounding liquid and the application cannot be performed. When the viscosity is too large, there is a problem that the flatness of the coated surface is deteriorated.
The epoxy resin and oligophenylene ether resin used for the production of the insulating coating of the multilayer wiring board according to the present invention are both resins that are solid at room temperature and exhibit heat softening properties at temperatures up to about 100 ° C. A solid material in the form of powder or film is dissolved or dispersed in a solvent and heated as necessary to obtain a resin compounded liquid (liquid). After the resin compounding solution is applied to the substrate, it is dried and returned to room temperature to change to a coating (solid). In the production of the multilayer wiring board according to the present invention, it is particularly preferable to use a combination of a solvent and a resin that can be completed when the drying / solidification temperature is 60 ° C. or higher and 160 ° C. or lower.
2. Coating process of insulating resin compounding liquid The obtained insulating resin compounding liquid is coated on a support having conductive bumps to form an insulating film. The coating method is not particularly limited, but for example, a doctor blade method, a curtain coating method, a micro gravure method, or a slot die method is preferably used. Moreover, it is preferable that the thickness of the insulating coating in the coating process is thicker than the height of the conductive bump. If the insulating coating is reduced to a thickness that is thinner than the height of the conductive bump after the coating is thicker than the height of the conductive bump, the conductive bump can be cued with good uniformity and reproducibility.
3. Solvent evaporation step The solvent evaporation step is not necessarily performed when the multilayer wiring board member according to the present invention is manufactured, but higher wiring connection stability can be obtained as compared with the case where the solvent evaporation is not performed. Specifically, the coated insulating film is heated or naturally dried to evaporate volatile components in the insulating film and reduce the film thickness. Although it is necessary to appropriately adjust the treatment time for a predetermined temperature depending on the type of solvent, the exhaust air speed of the dryer, the air volume, etc., for example, it is set to 80 to 120 ° C. and about 1 to 30 minutes.

(Laminated heat press)
In the case of batch lamination, a plurality of wiring board members and a core substrate are aligned and laminated as necessary, and then pressed under heating to form a multilayer wiring board. On the other hand, in the case of sequential lamination, a plurality of wiring board members are laminated on the core substrate one by one and hot pressing is performed. The heating conditions are preferably set so that the thermosetting resin constituting the multilayer wiring board is not more than the heat resistant temperature and is completely cured. The conditions for the heating press can be set as appropriate. It is preferable to set the temperature to be equal to or lower than the curing reaction start temperature of the insulating resin and equal to or higher than the temperature at which the thermal melt viscosity decreases. Further, even when the insulating filler is present on the conductive bump, it is preferable that the conductive bump is not cracked in the step of laminating hot press and the electrical connection is sufficiently ensured. For example, the temperature may be 170 to 210 ° C. and the actual pressure may be 5 to 15 kgf / cm ² . Since the minimum melt viscosity of the uncured film can be made relatively high, there is no resin flow in the hot press, the thickness before and after curing can be made almost constant, and the uniformity of thickness after curing is improved. be able to.

[material]
(Conductive bump material)
As the resin composition constituting the conductive paste, for example, a thermosetting resin such as a phenol resin, an epoxy resin, or a melamine resin is preferably used. The thermosetting resin is fluid and easy to mold, and can be heated and cured in a later step to give mechanical strength.
As a solvent for dissolving or dispersing the resin composition, for example, an organic solvent is used. Examples of the organic solvent include aromatic solvents such as toluene, xylene, and ketone solvents. Examples of the ketone solvent include methyl ethyl ketone and methyl isobutyl ketone.
The conductive particles dispersed in the resin compounding liquid include Ag, Cu, Au,
It is preferable to use any one of Ni, a mixture of at least two of them, or a compound thereof.
Moreover, it is preferable to use the material which added the thermoplastic resin to the said thermosetting resin by the mixing ratio of 10 wt% or more and 30 wt% or less for the resin composition which comprises an electroconductive bump. There is an effect of suppressing the generation of cracks in the conductive bumps in the multilayer hot pressing process of the multilayer wiring board.

(Insulating coating material)
In the advanced information society in recent years, the operating frequency of electronic devices has been increasing year by year for high-speed and large-capacity transmission of information. Also in multilayer wiring boards mounted on electronic devices, it is required to use materials having a low relative dielectric constant and dielectric loss as the material of the insulating film constituting the wiring boards.
Furthermore, with the miniaturization and thinning of electronic devices, thinning of wiring boards is required. Therefore, it is preferable that the material of the insulating coating is a material capable of forming a thin insulating coating with high reproducibility. In order to reduce manufacturing costs, it is preferable to use a material that can be thinned even when a thick film process is used.
As the material of the insulating member in the production of the multilayer wiring board of the present invention, it is preferable to use a thermosetting resin having a low relative dielectric constant and dielectric loss tangent, for example, epoxy resin, bismaleimide triazine resin, polyimide resin, acrylic resin. Phenol resin, oligophenylene ether resin, polyether resin, and melamine resin are preferably used.
The dielectric constant after curing of the thermosetting resin is in the range of 2.0 to 3.0 at 5 GHz, and a material satisfying any one of the range of 0.001 to 0.005 in dielectric loss tangent at 5 GHz Is preferred.

上記式中、ＸおよびＹは、それぞれ、単結合、炭素数１〜７の炭化水素基、−Ｏ−、−Ｓ−、−ＳＯ₂−、−CＯ−または下記式で示される基である。ＸおよびＹが複数ある場合は、それぞれ、同一であっても、異なっていてもよい。

ここで、上記式中Ｒ²は、炭素数１〜１０の炭化水素基またはハロゲン原子であり、Ｒ²が複数ある場合は、それぞれ、同一であっても、異なっていてもよい。Ｒ³は、水素原子、炭素数１〜１０の炭化水素基またはハロゲン原子である。ｑは、０〜５の整数である。
上記式（１）〜（２）中、Ｒ¹およびＲ⁴は、それぞれ、炭素数１〜１０の炭化水素基またはハロゲン原子である。Ｒ¹およびＲ⁴が複数ある場合は、それぞれ、同一であっても、異なっていてもよい。
ｐおよびｓは、それぞれ、０〜４の整数であり、同一であっても、異なっていてもよい。
上記式（１）中、ｎは、平均値を表し、２５〜５００である。
上記式（２）中、ｔは、平均値を表し、１０〜２５０である。
直鎖状エポキシ樹脂（A）は、上記式（１）において、ｐが０である、式（１′）で示される化合物であるのがより好ましい。

上記式中、Ｘおよびｎはそれぞれ上記式（１）中のＸおよびｎと同義である。
上述した直鎖状エポキシ樹脂（A）は、単独で用いてもよく、２種以上を併用してもよい。
上記フェノール性ヒドロキシ基の少なくとも一部を脂肪酸エステル化した変性フェノールノボラック（B）としては、例えば、下記式（３）で表される変性フェノールノボラックが好適に挙げられる。

上記式（３）中、Ｒ⁵は、炭素数１〜５のアルキル基を表し、好ましくはメチル基であり、複数のＲ⁵は、同一であっても異なっていてもよい。
Ｒ⁶は、炭素数１〜５のアルキル基、置換基を有していてもよいフェニル基、置換基を有していてもよいアラルキル基、アルコキシ基またはハロゲン原子を表し、複数のＲ⁶は、同一であっても異なっていてもよい。
Ｒ⁷は、炭素数１〜５のアルキル基、置換基を有していてもよいフェニル基、置換基を有していてもよいアラルキル基、アルコキシ基またはハロゲン原子を表し、複数のＲ⁷は、同一であっても異なっていてもよい。
ｇは、０〜３の整数を表し、複数のｇは、同一であっても異なっていてもよい。
ｈは、０〜３の整数を表し、複数のｈは、同一であっても異なっていてもよい。
ｎ：ｍは、１：１〜１．２：１であり、約１：１であることが好ましい。
ｎとｍの合計としては、例えば２〜４とすることができる。
上記式（３）におけるｎ、ｍは、繰り返し単位の平均値であり、繰り返し単位の順序は限定されず、ブロックでもランダムでもよい。
変性フェノールノボラック（B）としては、好ましくは、下記式（３′）で表される変性フェノールノボラックが挙げられる。

上記式（３′）中、Ｒ⁵、ｎおよびｍは、それぞれ、上記式（３）のＲ⁵、ｎおよびｍと同様である。
特に好ましくは、上記式（３′）においてＲ⁵がメチル基のアセチル化フェノールノボラックである。
これらの変性フェノールノボラックは、単独で用いてもよく、２種以上を併用してもよい。
上記（B）成分の含有量は、上記（A）成分１００重量部に対して３０〜２００重量部であるのが好ましい。（B）成分の含有量がこの範囲であると、誘電特性、フィルム形成性、硬化反応性に優れる。上記（B）成分の含有量は、上記（A）成分１００重量部に対して、５０〜１８０重量部であるのがより好ましい。
上記エポキシ樹脂組成物は、更に、（C）イソシアネート化合物を含有するのが好ましい態様の１つである。エポキシ樹脂中にヒドロキシ基がある場合は、そのヒドロキシ基や、エポキシ樹脂が開環した際に生成するヒドロキシ基と、イソシアネート化合物中のイソシアネート基が反応して、ウレタン結合を形成し、硬化後のポリマーの架橋密度を上げ、分子の運動性を更に低下させるとともに、極性の大きいヒドロキシ基が減少するため、一層の比誘電率の低下、誘電正接の低下が可能になる。更に、エポキシ樹脂は分子間力が大きく、フィルム化する場合に均一な成膜が困難であり、かつフィルム化してもフィルム強度が弱く、フィルム形成時にクラックが入り易い傾向があるが、イソシアネート化合物を配合することによりこれらの欠点を除くことができる。
上記イソシアネート化合物としては、２個以上のイソシアネート基を有する化合物が挙げられる。例えば、ヘキサメチレンジイソシアネート、ジフェニルメタンジイソシアネート、トリレンジイソシアネート、イソホロンジイソシアネート、ジシクロへキシルメタンジイソシアネート、テトラメチルキシリレンジイソシアネート、キシリレンジイソシアネート、ナフタレンジイソシアネート、トリメチルヘキサメチレンジイソシアネート、トリジンジイソシアネート、ｐ−フェニレンジイソシアネート、シクロへキシレンジイソシアネート、ダイマー酸ジイソシアネート、水素化キシリレンジイソシアネート、リシンジイソシアネート、トリフェニルメタントリイソシアネート、トリ（イソシアネートフェニル）トリホスファート等が挙げられる。これらは、単独で用いてもよく、２種以上を併用してもよい。
これらの中でも、ヘキサメチレンジイソシアネート、ジフェニルメタンジイソシアネートが好ましい。
また、上記イソシアネート化合物には、イソシアネート化合物の一部が環化反応により、イソシアヌレート環を形成したプレポリマーを含むものとする。例えば、イソシアネート化合物の３量体を含むプレポリマーが挙げられる。
上記イソシアネート化合物は、特に、上述した直鎖状エポキシ樹脂（A）との組み合わせで使用することが好ましい。エポキシ樹脂の開環反応に伴う生成したヒドロキシ基とイソシアネート基との反応に加えて、直鎖状エポキシ樹脂（A）中にはヒドロキシ基が存在するため、このヒドロキシ基とイソシアネート基とが反応できるため、より大きな効果が得られる。
上記（C）成分の含有量は、上記（A）成分１００重量部に対して１００〜４００重量部であるのが好ましく、３００〜３５０重量部であるのがより好ましい。（C）成分の含有量がこの範囲であると、硬化する際に発泡が抑えられ均一なフィルムになりやすく、また、硬化後にクラックが生じにくく、誘電特性（例えば、低誘電率、低誘電正接）にも優れる。
上記エポキシ樹脂組成物は、更に、（D）ジビニルベンゼンを含有するのが好ましい態様の１つである。ジビニルベンゼンを含有すると、架橋成分の溶融温度の低温化、成型時の流動性の向上、硬化温度の低温化、相溶性の向上に優れる。
上記（D）成分の含有量は、上記（A）成分１００重量部に対して、４０〜１８０重量部であるのが好ましい。
上記エポキシ樹脂組成物は、任意の成分として硬化促進剤を含有してもよい。
硬化促進剤としては、エポキシ樹脂組成物の硬化促進剤として公知のものを使用することができ、例えば、２−メチルイミダゾ−ル、２−エチル−４−メチルイミダゾール等の複素環化合物イミダゾール類、トリフェニルホスフィン、テトラフェニルホスホニウムテトラフェニルボレート等のリン化合物類、２，４，６−トリス（ジメチルアミノメチル）フェノール、ベンジルジメチルアミン等の第三級アミン類、１，８−ジアザビシクロ（５，４，０）ウンデセンやその塩等のＢＢＵ類、アミン類、イミダゾ−ル類をエポキシ、尿素、酸等でアダクトさせたアダクト型促進剤類等が挙げられる。
硬化促進剤の含有量は、上記（A）成分１００重量部に対して、１〜１０重量部であるのが好ましい。
上記エポキシ樹脂組成物は、任意の成分として重合開始剤を含有してもよい。
重合開始剤としては、公知の重合開始剤を使用することができ、例えば、過酸化ベンゾイル、アゾビスイソブチロニトリル、ｔ−ブチルパーオキシベンゾエート、１，１，３，３−テトラメチルブチルペルオキシ−２−エチルヘキサノアート等が挙げられる。
重合開始剤の含有量は、上記（A）成分１００重量部に対して、１〜１０重量部であるのが好ましい。
上記エポキシ樹脂組成物は、必要に応じて、粘着性付与剤、難燃化剤、消泡剤、流動調整剤、分散助剤等の添加剤を含有してもよい。
また、上記エポキシ樹脂組成物は、本発明の目的を損なわない範囲で、弾性率の向上、膨張係数の低下、ガラス転移温度（Ｔｇ値）の変更等を目的として、必要に応じて、（A）成分以外のエポキシ樹脂を含有してもよい。
（A）成分以外のエポキシ樹脂としては、例えば、ビスフェノールＡ型エポキシ樹脂、ビスフェノールＦ型エポキシ樹脂、脂環式エポキシ樹脂、ビフェニルエポキシ樹脂等が挙げられる。これらは、単独で用いてもよく、２種以上を併用してもよい。
また、上記エポキシ樹脂組成物は、本発明の目的を損なわない範囲で、脂肪酸エステル化されていないフェノールノボラック、クレゾールノボラック樹脂、フェノール多核体等の公知のエポキシ樹脂硬化剤を含有してもよい。
フェノール多核体としては、例えば、３〜５核体程度等のフェノール類が挙げられる。
上記エポキシ樹脂組成物は、公知の方法により製造することができる。例えば、溶媒の存在下または非存在下に（A）、（B）の各々をプロペラ撹拌機、バンバリー式ミキサー、遊星式ミキサー、加熱真空混合ニーダー等により混合できる。
また、例えば、樹脂成分は所定の溶剤濃度に溶解し、それらを２５〜６０℃に加温された反応釜に所定量投入し、常圧混合を３０分〜６時間行うことができる。その後、真空下（最大１Ｔｏｒｒ）で更に５分〜６０分混合撹拌することができる。 <Epoxy resin>
Moreover, as the said thermosetting resin composition, the epoxy resin composition described in the international publication 2005/100435 can also be used conveniently. Specifically, the linear epoxy resin (A) having a weight average molecular weight of 1,500 to 70,000 having one or more hydroxy groups and two or more epoxy groups, and at least a part of the phenolic hydroxy groups An epoxy resin composition containing a modified phenol novolak (B) esterified with a fatty acid, wherein the content of the modified phenol novolak (B) is 100 parts by weight of the linear epoxy resin (A). 30 to 200 parts by weight of the epoxy resin composition is preferable because it has excellent dielectric properties (for example, low dielectric constant and low dielectric loss tangent).
The weight average molecular weight of the linear epoxy resin (A) is 1,500 to 70,000.
The number average molecular weight of the linear epoxy resin (A) is preferably 3,700 to 74,000, more preferably 5,500 to 26,000.
The epoxy equivalent of the linear epoxy resin (A) is preferably 5000 g / eq or more.
In this specification, the weight average molecular weight and the number average molecular weight are values using a standard polystyrene calibration curve by gel permeation chromatography (GPC).
As the linear epoxy resin (A), those having a weight average molecular weight / number average molecular weight in the range of 2 to 3 are particularly preferable.
As the linear epoxy resin (A), specifically, for example, a compound represented by the following formula (1) is preferable, and a compound represented by the following formula (2) is more preferable.

In the above formulas, X and Y are each a single bond, a hydrocarbon group having 1 to 7 carbon atoms, —O—, —S—, —SO ₂ —, —CO—, or a group represented by the following formula. When there are a plurality of X and Y, they may be the same or different.

Here, R ² in the above formula is a hydrocarbon group having 1 to 10 carbon atoms or a halogen atom, and when there are a plurality of R ^{2 s} , they may be the same or different. R ³ is a hydrogen atom, a hydrocarbon group having 1 to 10 carbon atoms, or a halogen atom. q is an integer of 0-5.
In the above formula (1) ~ (2), R 1 and R ⁴ are each a hydrocarbon group or a halogen atom having 1 to 10 carbon atoms. When there are a plurality of R ¹ and R ^{4 s} , they may be the same or different.
p and s are each an integer of 0 to 4, and may be the same or different.
In said formula (1), n represents an average value and is 25-500.
In said formula (2), t represents an average value and is 10-250.
The linear epoxy resin (A) is more preferably a compound represented by the formula (1 ′) in which p is 0 in the above formula (1).

In said formula, X and n are synonymous with X and n in said formula (1), respectively.
The linear epoxy resin (A) described above may be used alone or in combination of two or more.
As the modified phenol novolak (B) obtained by fatty acid esterification of at least a part of the phenolic hydroxy group, for example, a modified phenol novolak represented by the following formula (3) is preferably exemplified.

In the above formula (3), R ⁵ represents an alkyl group having 1 to 5 carbon atoms, preferably a methyl group, the plurality of R ^5, may be the same or different.
R ⁶ represents an alkyl group having 1 to 5 carbon atoms, a phenyl group which may have a substituent, an aralkyl group which may have a substituent, an alkoxy group or a halogen atom, and a plurality of R ⁶ are , May be the same or different.
R ⁷ represents an alkyl group having 1 to 5 carbon atoms, a phenyl group which may have a substituent, an aralkyl group which may have a substituent, an alkoxy group or a halogen atom, and a plurality of R ^{7 s} , May be the same or different.
g represents an integer of 0 to 3, and a plurality of g may be the same or different.
h represents an integer of 0 to 3, and a plurality of h may be the same or different.
n: m is 1: 1 to 1.2: 1, preferably about 1: 1.
The total of n and m can be 2 to 4, for example.
In the above formula (3), n and m are average values of repeating units, and the order of repeating units is not limited, and may be block or random.
The modified phenol novolak (B) is preferably a modified phenol novolak represented by the following formula (3 ′).

In the formula (3 '), R ^5, n and m are each the same as R ^5, n and m in the formula (3).
Particularly preferably, in the above formula (3 ′), R ⁵ is an acetylated phenol novolak having a methyl group.
These modified phenol novolacs may be used alone or in combination of two or more.
The content of the component (B) is preferably 30 to 200 parts by weight with respect to 100 parts by weight of the component (A). When the content of component (B) is within this range, the dielectric properties, film formability, and curing reactivity are excellent. The content of the component (B) is more preferably 50 to 180 parts by weight with respect to 100 parts by weight of the component (A).
It is one of the preferred embodiments that the epoxy resin composition further contains (C) an isocyanate compound. When there is a hydroxy group in the epoxy resin, the hydroxy group or the hydroxy group generated when the epoxy resin is ring-opened reacts with the isocyanate group in the isocyanate compound to form a urethane bond. The crosslink density of the polymer is increased, the molecular mobility is further lowered, and the number of highly polar hydroxy groups is reduced. Therefore, it is possible to further lower the relative dielectric constant and the dielectric loss tangent. Furthermore, the epoxy resin has a large intermolecular force, it is difficult to form a uniform film when it is made into a film, and even if it is made into a film, the film strength is weak and tends to crack during film formation. These disadvantages can be eliminated by blending.
Examples of the isocyanate compound include compounds having two or more isocyanate groups. For example, hexamethylene diisocyanate, diphenylmethane diisocyanate, tolylene diisocyanate, isophorone diisocyanate, dicyclohexylmethane diisocyanate, tetramethylxylylene diisocyanate, xylylene diisocyanate, naphthalene diisocyanate, trimethylhexamethylene diisocyanate, tolidine diisocyanate, p-phenylene diisocyanate, cyclohexene Examples include xylene diisocyanate, dimer acid diisocyanate, hydrogenated xylylene diisocyanate, lysine diisocyanate, triphenylmethane triisocyanate, and tri (isocyanatephenyl) triphosphate. These may be used alone or in combination of two or more.
Among these, hexamethylene diisocyanate and diphenylmethane diisocyanate are preferable.
The isocyanate compound includes a prepolymer in which a part of the isocyanate compound forms an isocyanurate ring by a cyclization reaction. For example, the prepolymer containing the trimer of an isocyanate compound is mentioned.
The isocyanate compound is particularly preferably used in combination with the linear epoxy resin (A) described above. In addition to the reaction between the generated hydroxy group and the isocyanate group accompanying the ring-opening reaction of the epoxy resin, since the hydroxy group exists in the linear epoxy resin (A), the hydroxy group and the isocyanate group can react. Therefore, a greater effect can be obtained.
The content of the component (C) is preferably 100 to 400 parts by weight, and more preferably 300 to 350 parts by weight with respect to 100 parts by weight of the component (A). When the content of component (C) is within this range, foaming is suppressed during curing and a uniform film is easily formed, and cracks are less likely to occur after curing, and dielectric properties (for example, low dielectric constant, low dielectric loss tangent) ) Is also excellent.
In one preferred embodiment, the epoxy resin composition further contains (D) divinylbenzene. When divinylbenzene is contained, the melting temperature of the crosslinking component is lowered, the fluidity during molding is improved, the curing temperature is lowered, and the compatibility is improved.
The content of the component (D) is preferably 40 to 180 parts by weight with respect to 100 parts by weight of the component (A).
The epoxy resin composition may contain a curing accelerator as an optional component.
As a hardening accelerator, what is known as a hardening accelerator of an epoxy resin composition can be used, for example, heterocyclic compound imidazoles, such as 2-methylimidazole and 2-ethyl-4-methylimidazole, Phosphorus compounds such as triphenylphosphine and tetraphenylphosphonium tetraphenylborate, tertiary amines such as 2,4,6-tris (dimethylaminomethyl) phenol and benzyldimethylamine, 1,8-diazabicyclo (5,4 , 0) Adduct type accelerators obtained by adducting BBUs such as undecene and salts thereof, amines and imidazoles with epoxy, urea, acid and the like.
It is preferable that content of a hardening accelerator is 1-10 weight part with respect to 100 weight part of said (A) component.
The epoxy resin composition may contain a polymerization initiator as an optional component.
As the polymerization initiator, a known polymerization initiator can be used. For example, benzoyl peroxide, azobisisobutyronitrile, t-butylperoxybenzoate, 1,1,3,3-tetramethylbutylperoxy -2-ethylhexanoate and the like.
It is preferable that content of a polymerization initiator is 1-10 weight part with respect to 100 weight part of said (A) component.
The said epoxy resin composition may contain additives, such as a tackifier, a flame retardant, an antifoamer, a flow regulator, a dispersion | distribution adjuvant, as needed.
In addition, the epoxy resin composition is used within the range that does not impair the object of the present invention, for the purpose of improving the elastic modulus, lowering the expansion coefficient, changing the glass transition temperature (Tg value), etc. ) An epoxy resin other than the component may be contained.
Examples of the epoxy resin other than the component (A) include bisphenol A type epoxy resin, bisphenol F type epoxy resin, alicyclic epoxy resin, and biphenyl epoxy resin. These may be used alone or in combination of two or more.
Moreover, the said epoxy resin composition may contain well-known epoxy resin hardening | curing agents, such as a phenol novolak, a cresol novolak resin, a phenol polynuclear body, etc. which are not fatty acid esterified, in the range which does not impair the objective of this invention.
As a phenol polynuclear body, phenols, such as a 3-5 nuclei grade, are mentioned, for example.
The said epoxy resin composition can be manufactured by a well-known method. For example, each of (A) and (B) can be mixed with a propeller stirrer, Banbury mixer, planetary mixer, heating vacuum mixing kneader or the like in the presence or absence of a solvent.
Further, for example, the resin components can be dissolved in a predetermined solvent concentration, and a predetermined amount thereof can be put into a reaction kettle heated to 25 to 60 ° C., and normal pressure mixing can be performed for 30 minutes to 6 hours. Thereafter, the mixture can be further stirred for 5 to 60 minutes under vacuum (maximum 1 Torr).

<OPE resin>
Furthermore, as the thermosetting resin composition, an oligophenylene ether-based resin composition can also be suitably used. Specifically, the component (A) is a thermosetting number-average molecular weight of 1,000 to 3,000 oligophenylene ether having functional groups at both ends, and the component (B) is a vinyl aromatic hydrocarbon. A block copolymer composed of a hard segment block part mainly composed of a conjugated diene and a soft segment block part mainly composed of a conjugated diene, and under a condition that does not cause a curing reaction in an insulating resin composition liquid containing a solvent. Examples thereof include an oligophenylene ether resin compound obtained by volatilizing a solvent.
Here, the component (B) is 67 parts or more and 150 parts or less with respect to 100 parts of the component (A) in the insulating resin mixture. Further, the component (B) of the insulating uncured coating is made of rubber and / or styrene-butadiene-styrene block copolymer, styrene-isoprene-styrene block copolymer, styrene-ethylene / butadiene-styrene copolymer. One or more selected thermoplastic elastomers.
Examples of the thermosetting resin used in the thermosetting resin composition include a thermosetting oligo having functional groups such as a styrene functional group, a vinyl group, a glycidyl group, an amino group, a hydroxy group, and a carboxy group at both ends. Examples include phenylene ether resins and epoxy resins. Among these, thermosetting oligophenylene ether resins and epoxy resins having styrene functional groups at both ends are excellent in dielectric properties (for example, low dielectric constant, low dielectric loss tangent), low water absorption, and film formability. To preferred.
As the thermosetting resin composition, an oligophenylene ether-based resin composition described in Japanese Patent Application No. 2006-215464 previously filed by the applicant of the present application is particularly preferable. Specifically, for example, 100 parts by weight of thermosetting oligophenylene ether (A) having a styrene functional group at both ends with a number average molecular weight of 500 to 5000, a repeating unit derived from a vinyl aromatic hydrocarbon monomer, and a conjugated diene A thermosetting resin composition containing 50 to 250 parts by weight of a block copolymer (B) containing a repeating unit derived from a monomer has dielectric properties (eg, low dielectric constant, low dielectric loss tangent), low elasticity, Preferable examples are from the viewpoint of excellent coating film formability.
Examples of the thermosetting oligophenylene ether (A) include 2,2 ′, 3,3 ′, 5,5′-hexamethylbiphenyl-4,4 ′ described in JP-A-2006-28111. -Reaction product of diol-2,6-dimethylphenol polycondensate and chloromethylstyrene.
Such a thermosetting oligophenylene ether (A) can be produced by a known method. Commercial products can also be used. For example, OPE-2st 2200 (manufactured by Mitsubishi Gas Chemical Company) can be suitably used.
When the number average molecular weight of the thermosetting oligophenylene ether (A) exceeds 5,000, it is difficult to dissolve in a volatile solvent. On the other hand, if the number average molecular weight is less than 500, the crosslink density becomes too high, which adversely affects the elastic modulus and flexibility of the cured product. Therefore, the number average molecular weight of the thermosetting oligophenylene ether (A) is 500 to 5,000, and preferably 1,000 to 3,000.
The block copolymer (B) is a block copolymer composed of a hard segment block part mainly composed of vinyl aromatic hydrocarbon and a soft segment block part mainly composed of conjugated diene.
Examples of the block copolymer (B) include a styrene-butadiene-styrene block copolymer, a styrene-isoprene-styrene block copolymer, and a styrene-ethylene / butadiene-styrene block copolymer.
The block copolymer (B) can be produced by a known method. Commercial products can also be used. For example, TR2003 (manufactured by JSR) can be suitably used.
Content of the block copolymer (B) in the said thermosetting resin composition is 50-250 weight part with respect to 100 weight part of thermosetting oligophenylene ether (A), and is 65-200 weight part. It is preferable that it is, and it is more preferable that it is 80-150. When the content of the block copolymer (B) is within this range, the film forming ability and the compatibility with the thermosetting oligophenylene ether (A) are excellent.
Examples of the volatile solvent used in the oligophenylene ether resin composition include aromatic solvents such as toluene and xylene; ketone solvents such as methyl ethyl ketone and methyl isobutyl ketone, and these are used alone. Or two or more of them may be used in combination.
The content of the volatile solvent is not particularly limited as long as the viscosity of the composition is appropriately adjusted so as to be in the above range, but is preferably used so that the resin component is 15 to 45% by weight. It is more preferable to use it so that it may become 35 weight%. When the ratio of the resin component in the composition is within this range, the fibrous base material can be easily impregnated, and bubbles can be reduced. At such a low concentration, in a conventional vertical impregnation apparatus, in order to obtain a desired resin adhesion amount, a large amount of varnish adhesion amount must be obtained, and the impregnated resin droops when proceeding in the vertical direction. In addition to non-uniform vertical stripes and terrible resin spots, there is a phenomenon that the solvent remains in the coating film and only the surface is dried, and a uniform uncured state is not obtained.
The above-mentioned oligophenylene ether resin composition is a range that does not impair the effects of the present invention, such as an inorganic filler, a tackifier, a flame retardant, a defoaming agent, a flow regulator, a film forming aid, a dispersion aid, etc. An additive may be contained.
The oligophenylene ether resin composition may contain a curing catalyst, but can be cured only by heating.
The manufacturing method of the said oligophenylene ether resin composition is not specifically limited, A well-known manufacturing method is employable. For example, the components described above can be produced by sufficiently mixing with a stirrer.

<ADFLEMA>
As the insulating resin, for example, ADFLEMA (trade name, manufactured by NAMICS Co., Ltd.) is preferably used. ADFLEMA is a resin composed of oligophenylene ether, which is a kind of OPE resin, and a styrene-butadiene elastomer. The ADFLEMA product is an uncured film, but when it is thermally cured, the relative permittivity ε = 2.0 to 3.0 and the dielectric loss tangent tan δ = 0.001 to 0.005 are both small and excellent in high frequency characteristics. Moreover, it is possible to form a thin film having a thickness of about 2 to 90 μm. Further, since it contains about 70% of a volatile solvent, the film thickness can be reduced by, for example, 70% by coating and heating or drying, and a process for cueing conductive bumps by reducing the film thickness is included. It is suitable for manufacturing the multilayer wiring board of the present invention.

<Fiber base material contained in insulating resin>
The insulating resin used for the member for a multilayer wiring board of the present invention preferably does not contain a fiber substrate. Since the fiber base material is not included in the state of the insulating resin compounding solution, the viscosity of the compounding solution can be reduced, the covering property around the conductive bumps and the substrate surface is high, and the head of the conductive bumps is used in the film reduction process. The amount of the mixed liquid residue in the part can be reduced. On the other hand, when a fiber base material such as glass fiber chop is blended in the insulating resin compounding liquid, it is extremely difficult to make a uniform dispersed slurry. In addition, it is inevitable that the fiber chop is bridged to the top of the bump, and in addition, the introduction of a glass fiber substrate having inferior dielectric properties is incompatible with the effect obtained by the present invention.

<Insulating filler>
The insulating filler used in the member for the multilayer wiring board according to the present invention has high electrical insulation, does not undergo deformation with respect to the laminated heat press, has a strength capable of maintaining the interlayer insulation of the multilayer wiring board, and is used as a solvent. It is preferable to use a material that is uniformly dispersed. For example, it is preferable to use one or more materials selected from silica, silicon carbide, alumina, aluminum nitride, zirconia beads, glass beads, and acrylic beads.
The insulating filler is preferably powdered or particulate. The average particle diameter of the insulating filler is preferably 20% or more and 100% or less of the height of the conductive bump, and preferably 50% or less of the bottom diameter of the conductive bump.

(Wiring material)
In order to form the wiring of the multilayer wiring board, the conductive foil may be etched to form a conductive pattern, or a conductive paste may be printed.
As the resin composition constituting the conductive paste, for example, a thermosetting resin such as a phenol resin, an epoxy resin, or a melamine resin is preferably used. The thermosetting resin is fluid and easy to mold, and can be heated and cured in a later step to give mechanical strength.
As a solvent for dissolving or dispersing the resin composition, for example, an organic solvent is used. Examples of the organic solvent include aromatic solvents such as toluene, xylene, and ketone solvents. Examples of the ketone solvent include methyl ethyl ketone and methyl isobutyl ketone. As the conductive particles dispersed in the resin compounding liquid, it is preferable to use any of Ag, Cu, Au, Ni, a mixture of at least two of them, or a compound thereof. For example, the conductive paste is made by dispersing conductive particles (for example, Ag, Cu, Au, Ni, or a mixture of at least two of them) in a resin, and further adding a volatile solvent. Adjust the mixture.
<Thermosetting conductive paste>
Further, a thermosetting conductive paste may be used as the wiring material. Even with heat treatment at a low temperature of 100 to 200 ° C., a sufficiently low resistance wiring can be formed. When a thermosetting conductive paste is used, the thickness of the wiring is preferably in the range of 1 to 20 μm.
<Conductive paste containing fine silver particles>
Moreover, you may use the electrically conductive paste disclosed by patent document 3 as a material of an electrically conductive paste. The material disclosed in Patent Document 3 is a reaction in which a silver salt of a carboxylic acid and an aliphatic amine are mixed in the presence or absence of an organic solvent, and a reducing agent is added to react at a reaction temperature of 20 to 80 ° C. A conductive paste containing fine silver particles recovered from a product.
Silver fine particles contained in the conductive paste
(a) The average particle size of the primary particles is 40 to 350 nm,
(b) the crystallite diameter is 20 to 70 nm, and
(c) The ratio of the average particle diameter to the crystallite diameter is preferably 1 to 5.
In addition, the silver fine particles contained in the conductive paste are
(a) The average particle diameter of the primary particles is 50 to 80 nm,
(b) the crystallite diameter is 20-50 nm, and
(c) The ratio of the average particle diameter to the crystallite diameter is more preferably 1 to 4.
Such a conductive paste material exhibits sufficiently large conductivity even at a low temperature heat treatment of 200 ° C. or lower. Curable at heat temperature below the low temperature of the organic wiring board, can be formed relatively low conductor resistance (about 10 × 10- ⁵ Ω · cm or less) conductive patterns despite the low temperature cure. Therefore, it is possible to suppress or reduce an increase in wiring delay even if the wiring film thickness is thin and the wiring width is narrowed. Since the particle size is small, clogging is unlikely to occur even when screen printing fine lines. Compared with conductive paste containing other conductive fine particles, for example, conductive paste containing nanoparticles, it is suitable for forming wiring with a film thickness of 1 μm to 10 μm because of its large particle diameter, and also reduces the material cost. It is possible to keep it lower. When the conductive paste disclosed in Patent Document 3 is used, the thickness of the wiring is preferably 5 μm or less.

[Curing degree]
(Hardness of conductive bump)
In the middle of the manufacturing process, the cured state of the conductive bump and the insulating film constituting the multilayer wiring board member can be selected from the following combinations.
(1) Conductive bump: fully cured state, insulating coating: uncured state (2) Conductive bump: state between uncured and fully cured, insulating coating: uncured state The “state during curing” is a state in which the resin has been cured to some extent by an appropriate heat treatment but does not reach complete curing.
In the conventional B ² it technology, the insulating film has a hardened state, generally called a B stage, is softened by heat and inserted into conductive bumps. Since the via is formed by inserting the conductive bump, the conductive bump requires an aspect ratio of a predetermined value or more and a hardness of a predetermined value or more. It was in a cured state.
However, the technique according to the present invention does not insert conductive bumps, forms an insulating film on the conductive bumps, reduces the thickness of the insulating film, and forms an insulating uncured film. In this technique, the conductive bump is bonded to the second conductor layer or the core substrate. Therefore, the hardness of the conductive bumps is not necessary to the degree necessary for the intrusion method, and it is sufficient if it can maintain a certain form of the conductive bumps, and is completely cured or between uncured and completely cured. The state can be set arbitrarily. In addition, the insulating uncured coating is uncured in the present invention. Strictly speaking, at least the surface of the insulating uncured coating is uncured. The hardness of each member can be controlled to an arbitrary hardness by controlling the processing temperature or the processing time in a process such as drying or heating after printing or coating. Optimum conditions such as temperature and time vary depending on the material of the member, etc., but the optimum conditions for each specific material may be obtained in advance through experiments.
Specific examples of the hardness of the conductive bump are shown below.
Conventional conductive bumps need to be completely cured at the stage of the insertion process (temperature conditions are 80 ° C. to 120 ° C.) in order to insert the prepreg. The hardness of the conductive pump required 35-40.
When the conductive bump is brought into a state between uncured and completely cured by the technique of the present invention, for example, a conductive bump made of a material having a glass transition temperature of 110 to 140 ° C. is used, and its hardness is 15 ~ 30.
The effect when the conductive bump is in a state between uncured and completely cured is as follows.
1. Adhesiveness and conductivity with the wiring pattern in contact with the conductive bump are superior to the case where the conductive bump is completely cured. Since the conductive bump is not completely cured, plastic deformation of the conductive bump tends to occur under a predetermined heating condition in the lamination press process. For this reason, the adhesion to the conductive bump and the wiring member contacting the conductive bump is improved, and at the same time, the contact area is increased to reduce the via resistance and improve the reliability of the electrical connection. At the same time, the binder component in the conductive paste forming the conductive bumps is compressed and extruded into the insulating uncured coating. For this reason, the coupling | bonding of the electrically-conductive particle disperse | distributed in the electrically conductive paste and the wiring member which contacts an electroconductive bump becomes strong, and an electroconductive particle is densified. Subsequent contraction has the effect that the conductive particles in the conductive bumps are rearranged to further improve the conductivity.
2. In the laminating press process, it is possible to form a multilayer wiring board with a much lower pressing pressure than in the past. For this reason, the strain applied to the member is reduced, and the reliability of the member is improved.
3. In the manufacturing method of the present invention, an insulating uncured film is formed by reducing the film thickness of the insulating resin compounding solution, and then the conductive bump and the second conductor layer or core substrate are joined. The force to insert is not applied to the conductive bump. Moreover, if the drying / solidification temperature conditions for film reduction are set in a range that does not affect the cured state of the conductive bumps, the shape of the conductive bumps can be maintained stably as it is immediately after printing.
4). When the conductive bump is brought into close contact with the wiring pattern, the plastic deformation of the tip portion of the conductive pump is smoothly performed.
The hardness of the conductive bump was measured with a micro hardness tester MXT50 (Matsuzawa Seiki Co., Ltd.) at a test temperature of 23 ° C., a test load of 25 kgf, and a load holding time of 15 seconds.

(Degree of curing of insulating film)
In the method for producing a multilayer wiring board of the present invention, in the middle step, the insulating coating formed around the conductive bumps is in a state before curing called “uncured”, and “completely cured” or “cured” in the hot press process. It is preferable to control the heating conditions so as to achieve a state called “.”
Regarding the epoxy resin system or the OPE resin system suitable as a material for the insulating coating in the multilayer wiring board member of the present invention, specifically, the materials described in paragraph (0026) or (0027) of the present specification. That is. When the insulating coating is an epoxy resin type, the insulating coating has an intermediate curing degree between “uncured” and “completely cured” when the heating conditions are 130 to 180 ° C. and 10 minutes to 1 hour. When the insulating coating is an oligophenylene ether resin system, the insulating coating has an intermediate curing degree between “uncured” and “completely cured” when the heating conditions are 130 to 200 ° C. and 10 minutes to 1 hour. Become. In this specification, the insulating cured film in this state is referred to as “insulating uncured film”. In the case of heating at a temperature lower or shorter than that condition, the insulating film is in an uncured state, and in the case of heating at a temperature higher or longer than that condition, the insulating film is more nearly completely cured. For example, in the case of an oligophenylene ether resin system, even if the heating is performed at 160 ° C., if the heating time is about 5 minutes, the curing reaction is insufficient, and the insulating coating is maintained in an almost uncured state. .
When the insulating coating is an uncured coating, the adhesion strength between the member formed in contact with the insulating coating, for example, a conductive coating such as a conductive pattern, or an upper or lower insulating coating is Since the resin has a low molecular weight before cross-linking, the mutual contact in a state of thermal fluidity is good, so that wetting with the other party is good, and thus adhesion is strong. Therefore, it has the effect that the wiring is difficult to peel off and the wiring board is strong, and the degree of curing is low, and it is possible to embed irregularities due to the underlying mounting parts without gaps, and the wiring board surface is flat. High effects can be obtained.
On the other hand, since an uncured coating film is inferior in mechanical strength, for example, when a conductive pattern is formed on the coating film by printing, handling may not be easy. In such a case, it is preferable to heat the film on the side on which the conductive pattern is to be formed under appropriate conditions to change the film to a completely cured state, and then laminate an uncured film thereon. By laminating the uncured film and the completely cured film, adhesion and flatness can be improved, and at the same time, workability in the conductive pattern processing step can be improved.
For example, in the epoxy system of the present invention, since heat fluidity is too high depending on the application, it is preferable to press laminate after increasing the fluid viscosity by slightly advancing heat curing in the previous stage (after pre-baking) There is.

[Part shape and size parameters]
(Size parameter definition)
FIGS. 12A to 12C are views for explaining the definition of the size parameter according to the multilayer wiring board member of the present invention.
FIG. 12A is a cross-sectional view of the multilayer wiring board member after the fluid film 222 is formed on the conductive bumps 221 by coating. FIGS. 12B and 12C illustrate the fluid film 222. It is sectional drawing of the multilayer wiring board member after film reduction and forming the insulating uncured film 223. The cueing of the conductive bump is typically such that the head of the conductive bump is completely exposed as shown in FIG. However, in the worst case, an insulating film remains on a part of the head of the conductive bump as shown in FIG.
Here, t 1 is the thickness of the fluid film 222, t 2 is the thickness of the insulating uncured film 223, and h 1 is the thickness of the conductive bump 221. Further, a1 is the bottom diameter (bottom diameter) of the conductive bump, and θ1 is the central angle of the upper cross section of the conductive bump 71. In the worst case shown in FIG. 12C, Sb1 is the bottom area of the bump, and Se1 is the exposed area of the conductive bump 221 at the head of the conductive bump. The ratio of the exposed area to the bottom area of the conductive bump is defined as Se1 / Sb1 × 100 (%).
Although not shown, it is defined that the height of the conductive bump after lamination hot pressing is h2, and the thickness of the insulating layer after lamination hot pressing is t3. t3 is preferably 5 μm or more.

(Conductive bump shape)
The shape of the conductive bump is preferably a shape in which the diameter of the cross section at the tip is smaller than the diameter of the bottom. For example, a conical shape, a substantially truncated cone shape, and a mountain shape are preferable. The upper cross-sectional shape of the conductive bump is preferably a gentle arc having a central angle θ1 of 180 ° or less. Here, the cross-section of the tip of the conductive bump is a horizontal cross-section of the conductive bump when the tip of the conductive bump is arranged at the top, and the upper cross-section of the conductive bump is the vertical direction of the conductive bump. It is a cross section. In the method for manufacturing a multilayer wiring board according to the invention, since the conductive bump does not need to be inserted through the prepreg, it is not necessary to have a pointed tip. By making the tip part a gentle arc, the via cross-sectional area can be increased and the via resistance can be reduced.
When the upper cross section of the conductive bump is an arc having a central angle exceeding 180 °, the leading end of the conductive bump has a concave shape, and the insulating uncured resin remains in the concave portion. This causes problems such as poor connection of vias and increased via resistance. In the multilayer wiring board member of the present invention, since the upper cross section of the conductive bump has a gentle arc shape with a central angle of 180 ° or less, the insulating uncured resin does not remain at the tip of the conductive bump, and the via It is effective for reliable connection and reduction of via resistance. In addition, since the tips of the conductive bumps are not sharp, the via tip does not collapse or break even when batch lamination hot pressing is performed, so it is possible to establish a reliable electrical connection with the upper conductive member. is there.

(Exposed conductive bump)
When the insulating resin compounding liquid is applied and the film is reduced by heating or drying, at the boundary between the insulating uncured film and the conductive bump, as shown in FIG. Insulating material may remain. When the ratio of the exposed area to the bottom area of the conductive bump is expressed as the ratio of the conductive bump not covered with the residue of the insulating material on the upper surface of the conductive bump, when the technique of the present invention is used, The ratio of the exposed area to the bottom area can be 20% or more. The cross-sectional area of the via can be substantially increased, which is effective in reducing the via resistance.

[Multilayer Wiring Board According to Embodiment of the Present Invention and Manufacturing Method Thereof]
A specific example of a method for manufacturing a multilayer wiring board using a wiring board member and a core substrate will be described below with reference to FIGS. In the method for manufacturing a multilayer wiring board according to the present invention, the core substrate in the method for manufacturing a multilayer wiring board substrate described here is replaced with a conductive foil, an insulating substrate, or a multilayer wiring board member.

(First specific example of manufacturing method of multilayer wiring board)
In the first specific example, a method of manufacturing a multilayer wiring board of the sequential lamination type will be described with reference to FIGS. The core substrate shows an example using a printed multilayer wiring board manufactured by a plated through-hole method. First, the multilayer wiring board members 51 and 53 manufactured by the second specific example (FIG. 2) of the manufacturing method of the multilayer wiring board member according to the present invention are aligned on the upper surface and the lower surface of the core substrate 52, respectively ( 4 (a)) Laminate hot pressing is performed to convert the insulating coating of the multilayer wiring board member, which was an insulating uncured coating, into a cured coating (FIG. 4 (b)). Next, a resist pattern 54 is formed on the multilayer wiring board members 51 and 53 by, for example, photolithography (FIG. 4C). Next, the conductive foil 55 is etched by wet etching using the resist pattern 54 as a mask, the resist pattern 54 is removed, and a wiring 56 is formed (FIG. 4D). Next, the multilayer wiring board members 57 and 58 manufactured by the second specific example (FIG. 2) of the manufacturing method of the multilayer wiring board member according to the present invention are aligned on the upper surfaces of the multilayer wiring boards 51 and 53 and the wiring 56. Then (FIG. 4 (e)), a laminated heat press is performed to turn the insulating coating of the multilayer wiring board member, which was an insulating uncured coating, into a cured coating (FIG. 4 (f)). Next, a resist pattern 62 is formed on the multilayer wiring board members 59 and 60 by photolithography (FIG. 4G). Next, the conductive foil 61 is etched by wet etching using the resist pattern 62 as a mask, the resist pattern 62 is removed, wirings 63 are formed, and a multilayer wiring board 66 is completed. (FIG. 4 (h)).
In the manufacturing method of the sequential multilayer composite multilayer wiring board substrate shown in FIG. 4, the multilayer wiring board is formed by using a substrate member produced by using the manufacturing method shown in FIGS. 1 and 3, or by using conductive bumps as a core substrate. Needless to say, a printed multilayer wiring board with interlayer connection can be used.

(Second specific example of manufacturing method of multilayer wiring board)
In the second specific example, a method for manufacturing a multi-layer wiring board of a batch lamination type will be described with reference to FIGS. The core substrate shows an example using a printed multilayer wiring board manufactured with conductive bumps. In general, a core substrate manufactured by a plated through-hole method has a low mounting density, so that a substrate manufactured by a conventional method such as B ² it can also be used. First, a multilayer wiring board member manufactured by the third specific example (FIG. 3) of the manufacturing method of the multilayer wiring board member according to the present invention on the upper surface and the lower surface of the core substrate 75 is previously subjected to, for example, photolithography and etching. The multilayer wiring board members 74, 73, 76, 77 having the wiring pattern formed thereon are aligned with the multilayer wiring board member manufactured by the first specific example (FIG. 1) of the multilayer wiring board member manufacturing method according to the present invention. (FIG. 5 (a)). Next, a laminated hot press is performed to turn the insulating coating of the multilayer wiring board member, which was an insulating uncured coating, into a cured coating (FIG. 5 (b)). Next, a resist pattern 84 is formed on the conductive foil 71 by, for example, photolithography (FIG. 5C), and the conductive foil 71 is etched by wet etching using the resist pattern 84 as a mask. Then, the wiring 83 is formed (FIG. 5D), and the multilayer wiring board 85 is completed.
In the manufacturing method of the multilayer wiring board substrate of the collective lamination method shown in FIG. 5, the multilayer wiring board is formed by using the substrate member produced by using the manufacturing method shown in FIGS. 1 and 2, or by the plated through hole method as the core substrate. It goes without saying that the manufactured printed multilayer wiring board can be used.

(Third specific example and fourth specific example of the method of manufacturing a multilayer wiring board)
In the third specific example and the fourth specific example, a method for manufacturing a multilayer wiring board of the core / core lamination type will be described with reference to FIGS. 6 (a) and 6 (b). The core substrate shows an example using a printed multilayer wiring board manufactured with conductive bumps.
In the third specific example, first, conductive bumps 94 are formed on the upper surface of the core substrate 95, and then an insulating resin compound liquid in which an insulating filler 93 is dispersed is applied on and around the conductive bumps 94. A fluid film is formed, the fluid film is dried, and the solvent is evaporated to form an insulating uncured film 92. Next, the core substrate 91 is aligned (FIG. 6 (a)), laminated heat pressing is performed, and the insulating coating of the multilayer wiring board member, which has been an insulating uncured coating, is used as a cured coating. To complete.
In the fourth specific example, first, conductive bumps 99 are formed on the upper surface of the core substrate 100. On the upper surface of another core substrate 96, an insulating resin compounded liquid in which an insulating filler 98 is dispersed is applied to form a fluid film, and the fluid film is dried to evaporate the solvent, thereby insulating uncured film 97. Form. Next, the core substrate 96 and the conductive bumps 99 are aligned (FIG. 6 (b)), and laminating heat pressing is performed, so that the insulating coating of the multilayer wiring board member, which is an insulating uncured coating, is made into a cured coating. To complete the multilayer wiring board.
Needless to say, a printed multilayer wiring board manufactured by a plated through-hole method can be used as the core substrate in the core / core laminated multilayer board manufacturing method shown in FIG.

[Overcoat and undercoat]
In the process of manufacturing a multilayer wiring board, there are an overcoating process and an undercoating process for arranging the insulating resin layer and the conductive bumps before the lamination hot pressing.
FIGS. 7A and 7B are cross-sectional views of the multilayer wiring board before lamination in the case of undercoating. Undercoating is a method of applying an insulating compounding liquid to the conductive bump processing side. FIG. 7A shows a diagram in which a multilayer wiring board member provided with conductive bumps and an insulating material is aligned so as to face the core substrate 122. In FIG. 7B, conductive foils 124 and 128 are arranged on a multilayer wiring member provided with conductive bumps and an insulating material formed on the core substrate 126.
FIGS. 7C and 7D are cross-sectional views of the multilayer wiring board before lamination in the case of performing overcoating. The top coating is a method of coating an insulating compounding liquid on the side opposite to the conductive bump processing side. In FIG. 7 (c), an insulating resin composition containing an insulating filler and a volatile solvent is formed on the conductor layer or the second core substrate so as to face the first core substrate 131 on which the conductive bumps 130 and 132 are formed. Applying a liquid to form a fluid uncured coating, volatilizing volatile insulation in the previous period, reducing the fluid coating to reduce the fluid coating to an insulating uncured coating, and the first core substrate; The conductor layer of the first core wiring board on which the conductive bumps are formed and the insulating uncured film by the step of laminating and hot pressing the conductor layer or the second core substrate on which the insulating uncured film is formed A method of manufacturing a multilayer wiring board in which electrical connection of a conductor layer formed with a conductor layer or a conductor layer of a second core substrate is formed by the conductive bumps is shown in the drawing. In FIG.7 (d), the process of apply | coating the insulating resin compounding liquid containing an insulating filler and a volatile solvent on the 1st conductor layer arrange | positioned on the 1st core board | substrate, and forming a fluid film, Volatile solvent is volatilized, and the fluid film is reduced to form an insulating uncured film, and a protruding conductive bump group is formed on the second conductor layer or the second core substrate. And the step of laminating and pressing the first core substrate and the insulating layer, the conductive layer of the first core wiring board on which the insulating uncured film is formed and the conductive bumps are formed. A method of manufacturing a multilayer wiring board in which electrical connection of the conductive layer or the conductive layer of the second core substrate is formed by the conductive bumps is shown in the drawing.
In the method for manufacturing a member for a multilayer wiring board shown in FIGS. 1 to 3 and the method for manufacturing a multilayer wiring board shown in FIGS. Needless to say, even when a member for a multilayer wiring board and a multilayer wiring board are manufactured by applying an overcoating, the same excellent effects as those obtained when the undercoating is applied can be obtained.

[Measurement method of via resistance]
The electrical resistance of vias of a multilayer wiring board formed by a technique such as a conductive bump is generally measured using a test pattern called a daisy chain. FIGS. 13A and 13B are a plan view and a cross-sectional view of a test pattern for measuring via resistance. The test pattern includes a first layer wiring 234, a via 235, a second layer wiring 233, and measurement terminals 231 and 232. The first layer wiring 234 is a wiring formed on the lower surface of the insulating coating 236, and the second layer wiring 233 is a wiring formed on the upper surface of the insulating coating 236. A large number of vias 235 are connected in series between the measurement terminal 231 and the measurement terminal 232 via a wiring pattern of the first layer wiring 233 and a wiring pattern of the second layer wiring 234. The via resistance is obtained by applying a predetermined voltage to the measurement terminal 231 and the measurement terminal 232 and measuring the current flowing through the test pattern. Specifically, the wiring resistance is subtracted from the resistance between the terminals and divided by the number of vias to calculate the via resistance per one. In general, both the wiring resistance and the via resistance have extremely low resistance values compared to the resistance that is a normal electronic component.Therefore, to calculate the via resistance with high accuracy, prepare a pattern in which many vias are connected in series. Must be measured. Generally, a pattern in which several tens to several hundreds of vias are arranged in series is used. The wiring resistance can be theoretically calculated from the size of the wiring if there is data on the specific resistance of the wiring material or the sheet resistance of the wiring in advance. Via resistance and wiring resistance can be measured independently by measuring a plurality of patterns having different numbers of vias.

(a) thru | or (d) are process order sectional drawings which show the 1st specific example which concerns on embodiment of the manufacturing method of the multilayer wiring board member of this invention. (a) thru | or (d) are process order sectional drawings which show the 2nd specific example which concerns on embodiment of the manufacturing method of the multilayer wiring board member of this invention. (a) thru | or (f) is process order sectional drawing which shows the 3rd specific example which concerns on embodiment of the manufacturing method of the multilayer wiring board member of this invention. (a) thru | or (i) are process order sectional drawings which show the 1st specific example which concerns on embodiment of the manufacturing method of the multilayer wiring board of this invention. (a) thru | or (d) are process order sectional drawings which show the 2nd specific example which concerns on embodiment of the manufacturing method of the multilayer wiring board of this invention. (a) And (b) is process order sectional drawing which shows the 3rd specific example which concerns on embodiment of the manufacturing method of the multilayer wiring board of this invention. (a) thru | or (d) is sectional drawing explaining the undercoat process and topcoat process which concern on embodiment of the manufacturing method of the multilayer wiring board member of this invention, respectively. (a) thru | or (c) is sectional drawing which compares the manufacturing method of the multilayer wiring board of this invention, and the manufacturing method of the conventional multilayer wiring board. It is a graph which shows the dependence with respect to the filler presence or absence of conduction stability. (a) thru | or (c) are the graphs which show the dependence with respect to the filler diameter of electroconductivity by an electroconductive bump. (d) thru | or (f) is a graph which shows the dependence with respect to the addition amount of the electroconductive filler by an electroconductive bump. (a) And (b) is a graph of the dependence with respect to the quantity of the thermoplastic resin added to the conductive bump in the film thickness (height) and resistance value of a conductive bump, respectively, respectively. (a) thru | or (c) is a figure explaining the definition of the size parameter which concerns on the multilayer wiring board member of this invention. It is the top view and sectional view of a test pattern for via resistance measurement. (a) thru | or (d) are process order sectional drawing and perspective view which show the manufacturing method of the conventional multilayer wiring board. (e) is a horizontal sectional view of the upper portion of the conductive bump of the conventional multilayer wiring board.

  Hereinafter, the present invention will be described in detail using Examples and Comparative Examples. The present invention is not limited to these examples.

[Filler dependence of conduction stability]
In order to investigate the influence of the insulating filler dispersed in the insulating resin on the conduction stability between the layers of the multilayer wiring board, the electrical resistance of the pattern for continuity test formed on the substrate was measured.
FIG. 9 is a graph showing the dependency of the electrical resistance of the daisy chain on the presence or absence of an insulating filler. The graph on the left is for the case without an insulating filler, and the graph on the right is for the case with an insulating filler. Silica (D50 = 10 μmφ) was used as the insulating filler. The applied pressure of the laminated heat press was 50 to 500 kgf / cm ² . The horizontal axis of the graph is the daisy chain connection resistance measurement lead electrode number, which corresponds to the difference in measurement position in the substrate. As shown in the graph, when there is no insulating filler, it can be seen that there is a large variation in interlayer connection resistance in the substrate and the conduction stability is low. On the other hand, when there is an insulating filler, it can be seen that there is little variation in interlayer connection resistance in the substrate, and the conduction stability is high.
As a result of evaluating by changing the mixing ratio of the insulating filler in the insulating resin, it was found that the mixing ratio of the insulating filler is preferably 1 vol% or more and 50 vol% or less. Furthermore, it turned out that 1 vol% or more and 30 vol% or less are preferable. When low connection resistance is taken into consideration, it is more preferable to set it to 1 vol% or more and 20 vol% or less.

FIGS. 10A to 10F are graphs in which the electrical resistance of the conductive bumps is plotted on the vertical axis and the position in the substrate is plotted on the horizontal axis, and FIGS. 10A, 10B, and 10C are plotted. Each corresponds to a diameter of the insulating filler of 0-4 μmφ, 5-20 μmφ, 25-50 μmφ. The amount of the insulating filler added was 10 vol% of the insulating layer material, and the shape of the conductive bump after the lamination press was such that the average bottom diameter was 100 μmφ and the average height was 20 μm.
As can be seen from the figure, when the diameter of the insulating filler is smaller than 20% of the height of the conductive bump, the insulating filler is too small, causing a short circuit between wires or insulation on the conductive bump. The problem that the conductive filler tends to remain occurs, and the conduction stability is lowered. When the diameter of the insulating filler is 20% or more and 100% or less of the height of the conductive bump, problems such as short circuit and open between wirings are less likely to occur, and conduction stability is improved. When the diameter of the insulating filler is larger than 100% of the height of the conductive bump, the insulating filler is too large, so that an open between the conductive bump and the wiring to be connected occurs, and the conduction stability. Becomes lower.
In addition, each of FIGS. 10D, 10E, and 10F corresponds to the addition amount of the insulating filler to the insulating material of 0 vol%, 25-30 vol%, 1-20 vol, and 10-15 vol%. Is. When the addition amount of the insulating filler is 0 vol%, the conductivity varies due to the influence of the substrate warp, and the absolute value of the resistance is as large as 10Ω or more. On the other hand, when the value is 25 vol% or more, both the absolute value and variation of the electric resistance are improved as compared with the case of 0 vol%. Even when 30 vol% is added, the conductivity by the conductive bump is 10Ω or less, which indicates that there is no problem in using the multilayer wiring board (FIG. 10 (d)). On the other hand, when the amount of the insulating filler is 1 to 20 vol%, the warpage tends to be further improved, and the electrical resistance is further significantly reduced in both absolute value and variation. It can be seen that when the amount of the insulating filler is 10-15 vol%, the electric resistance is 100 mΩ or less and the variation is extremely small.

[Conductivity stability depends on height of conductive bump]
The dependence of the conductive stability between two layers of wiring connected by conductive bumps on the shape and size of the conductive bumps was evaluated. An insulating filler having a particle size of D50 and about 10 μmφ was dispersed in the insulating layer. The thickness of the insulating layer was also about 10 μm. The conductive bumps of the evaluated samples were prepared in three types, that is, three types with a bottom diameter of 50 μmφ, 80 μmφ, and 100 μmφ, and two types with a high and low type, for a total of six types. In the samples with the conductive bump bottom surface diameters of 80 μmφ and 100 μmφ, the conductive bump height was stable and higher than the thickness of the insulating layer. Also, in the sample having a conductive bump bottom diameter of 50 μmφ, the conductive bump height was stably higher than the thickness of the insulating layer when the conductive bump height was high. However, the sample with the conductive bump bottom diameter of 50 μmφ and the lower conductive bump height has a large variation in the conductive bump height, and the conductive bump has a high height with respect to the thickness of the insulating layer. Low conductive bumps were mixed.
As a result of evaluating the conduction stability of these samples, a sample with a high bottom surface diameter of 80 μmφ and 100 μmφ and a high conductive bump height, a low sample, and a sample with a bottom surface diameter of 50 μmφ and a high conductive bump height are in good conduction. Stability was obtained. On the other hand, a sample having a bottom diameter of 50 μmφ and a low conductive bump height did not provide good conduction stability.

[Conductivity stability depends on height of conductive bump]
FIGS. 11A and 11B are graphs showing the dependence of the film thickness (height) of the conductive bump and the resistance value on the amount of the thermoplastic resin added to the conductive bump, respectively. 11 (a) and 11 (b), as the addition amount of the thermoplastic resin increases, the film thickness of the conductive bump after lamination hot pressing becomes thinner, spreads in the horizontal direction (XY direction), and the resistance value decreases. It turned out to be stable. However, when considering the line / space of the wiring pattern, the lateral spread of the conductive bumps increases, and there is a risk of short-circuiting in the X and Y directions, particularly in a high-temperature and high-humidity bias test with 85 ° C., 85%, and 50 V applied. Accordingly, it has been found that the amount of the thermoplastic resin added to the conductive bump material is preferably 10 wt% or more and 30 wt% or less.

[Evaluation of bump cueing using epoxy resin]
It is the sample for conductive bump heading evaluation produced using the epoxy resin for the insulating compounding liquid. The sample was prepared and evaluated by applying an insulating resin compound liquid containing an epoxy resin on a support substrate on which conductive bumps were formed and drying, then measuring the change in film thickness and observing the appearance of the conductive bumps. .
(Adjustment of conductive paste)
The conductive paste was prepared by blending a resin component, a conductive component, and a solvent under the following conditions.
Resin component:
Biphenyl liquid epoxy resin: 2 to 10% by weight
Epoxy / phenol: 1-10% by weight
Biphenyl type epoxy resin: 5% by weight or less Additive: 5% by weight or less Conductive component: Ag powder (powder-shaped powder weight: spherical powder weight = 1: 1) was blended in an amount of 80% by weight or more.
Solvent: Methyl ethyl ketone was added to adjust the viscosity.
(Adjustment of insulating resin compounding liquid)
The insulating resin blending solution was prepared by blending a resin component and a solvent under the following conditions.
Resin component (epoxy resin):
(A) YX695BH30 (trade name, manufactured by Japan Epoxy Resin Co., Ltd.): 100 parts by weight (B) Epicure DC808 (trade name, manufactured by Japan Epoxy Resin Co., Ltd.): 154 parts by weight (C) Coronate 2507 (Nippon Polyurethane Industry Co., Ltd.) ) Product name): 312 parts by weight (D) 2E4MZ (Imidazole-based crosslinking catalyst, product name manufactured by Shikoku Kasei Co., Ltd.): 9.6 parts by weight DVB-960 (Product name manufactured by Nippon Steel Chemical Co., Ltd.): 98.6 parts by weight Her Otaku O (trade name, manufactured by NOF Corporation): 9.6 parts by weight
(E) Insulating filler Silica D50 = 10μmφ 10VOL%
Solvent: Methyl ethyl ketone was added to adjust the viscosity.
(Formation of conductive bumps)
On a support substrate made of PET, a conductive paste was applied by screen printing to form a protruding conductive bump. The shape of the conductive bump was such that the bottom diameter was 80 μm to 110 μm and the height was 25 μm to 40 μm.
(Application / drying of insulating resin compound liquid)
An insulating resin compounding solution was applied to the support substrate on which the conductive bumps were formed by the doctor blade method. The coating conditions were a clearance of 50 μm to 100 μm, a coating speed of 1 m / min, and an insulating coating having a thickness of 30 μm to 100 μm was formed. Then, after measuring the thickness of the insulating film, the sample is put into a drying furnace, and the solvent of the coating film is evaporated by drying at 100 ° C. for 3 minutes to reduce the thickness of the insulating uncured film. It was.
After drying the sample, the thickness of the insulating coating was measured, and the cueing state of the conductive bump was observed.
(Measurement of dielectric properties)
Dielectric characteristics of the produced epoxy resin were measured.
The dielectric properties after curing are
Dielectric constant 2.71 / 1GHz, 2.68 / 5GHz
Dissipation factor 0.019 / 1GHz, 0.0098 / 5GHz
Met.

[Evaluation of cueing of conductive bump using OPE resin]
This is a sample for evaluation of cueing of conductive bumps produced by using OPE resin for the insulating coating. The sample was prepared and evaluated by applying an insulating resin compound liquid containing OPE resin on a support substrate on which conductive bumps were formed and drying, then measuring the change in film thickness and observing the appearance of the conductive bumps. .
(Adjustment of conductive paste)
The conductive paste was prepared by blending a resin component, a conductive component, and a solvent under the following conditions.
Resin component:
Biphenyl liquid epoxy resin: 2 to 10% by weight
Epoxy / phenol: 1-10% by weight
Biphenyl type epoxy resin: 5% by weight or less Additive: 5% by weight or less Conductive component: Ag powder (powder-shaped powder weight: spherical powder weight = 1: 1) was blended in an amount of 80% by weight or more.
Solvent: Methyl ethyl ketone was added to adjust the viscosity.
(Adjustment of insulating resin compounding liquid)
The insulating resin blending solution was prepared by blending a resin component and a solvent under the following conditions.
Resin component (OPE resin):
(A) OPE-2st 2200 (trade name, manufactured by Mitsubishi Gas Chemical Co., Inc.): 5 to 40% by weight
(B) TR2003 (trade name, manufactured by JSR Corporation): 5 to 40% by weight
Solvent: Toluene: 20-90% by weight
(C) Insulating filler Silica D50 = 10μmφ 10VOL%
(Formation of conductive bumps)
On a support substrate made of PET, a conductive paste was applied by screen printing to form a protruding conductive bump. The shape of the conductive bump was such that the bottom diameter was 80 μm to 110 μm and the height was 16 μm to 40 μm.
(Application / drying of insulating resin compound liquid)
An insulating resin compounding solution was applied to the support substrate on which the conductive bumps were formed by the doctor blade method. The coating conditions were a clearance of 20 μm to 100 μm, a coating speed of 1 m / min, and an insulating film having a thickness of 20 μm to 100 μm was formed. Then, after measuring the thickness of the insulating coating, the sample was put into a drying furnace, and the coating film solvent was evaporated by drying at 100 ° C. for 3 minutes to reduce the thickness of the insulating coating.
After the sample was dried, the thickness of the insulating coating was measured, and the cueing state of the conductive bump was observed.
(Measurement of dielectric properties)
Dielectric properties of the produced OPE resin were measured.
The dielectric properties after curing are
Dielectric constant 2.40 / 5GHz
Dissipation factor 0.0019 / 5GHz
Met.

  As described above in detail, the present invention relates to a multilayer wiring board corresponding to high-density mounting, and in particular, a high-yield, low-cost multilayer wiring board capable of improving the stability of interlayer connection and a method for manufacturing the same. And contributes greatly in the field of electronics.

1, 11, 21 Conductive foil 2, 12, 22, 42 Conductive bump 3, 13, 23, 26, 43 Flowable coating 5, 15, 27, 45 Insulating uncured coating 4, 14, 24, 44 Insulation Conductive filler 25 Insulating cured coating 41 that does not completely cure Support substrate 51, 53, 57, 58, 59, 60 Multi-layer wiring board member 52 Core substrate 55, 61 Conductive foil 54, 62 Resist pattern 56, 63 Wiring 66 Multi-layer Wiring boards 71, 79 Conductive foils 72, 73, 74, 76, 77, 78 Multilayer wiring board member 75 Core substrate 80 Insulating filler 81, 82 Multilayer wiring board member 83 Wiring 84 Resist pattern 85 Wiring boards 91, 95, 96 , 100 Core substrate 92, 97 Insulating uncured film 93, 98 Insulating filler 94, 99 Conductive bumps 121, 123, 125, 127, 129.133 Multilayer wiring board members 122, 126, 131, 137 Core substrates 124, 128, 134, 140 Conductive foils 130, 132, 135, 139 Conductive bumps 136, 138 Insulating uncured coatings 201, 207, 208, 213, 214 219 Core wiring board 202, 206, 209, 212, 215, 218 Wiring 204, 211, 217 Insulating resin layer 205 Insulating filler 203, 210, 216 Conductive bump 221 Conductive bump 222 Fluid film 223 Insulating Cured coatings 231 and 232 Measuring terminal 233 Second layer wiring 234 First layer wiring 235 Via 236 Insulating coatings 501 and 505 Conductive foil 502 Conductive bumps 503 and 506 Prepreg sheet 508 Broken scrap 507 Conductive bump surface

Claims (6)

A conductive bump group formed between the first conductive layer and the second conductive layer, and an insulating layer including an insulating filler for preventing a short circuit formed around the conductive bump group, The layer is a layer formed using an insulating resin compounding liquid containing an insulating filler, and the average particle size of the insulating filler is 20% or more of the average height of the conductive bump group after the lamination hot pressing, 100% or less, the mixing ratio of the insulating filler in the insulating resin compounding liquid is 1 vol% or more and 30 vol% or less, and the material of the insulating resin compounding liquid contains an oligophenylene ether resin. A multilayer wiring board. A conductive bump group formed between the first conductive layer and the second conductive layer, and an insulating layer including an insulating filler for preventing a short circuit formed around the conductive bump group, The layer is a layer formed of a film generated from an insulating resin compounded liquid containing an insulating filler, and the average particle diameter of the insulating filler is 20% of the average height of the conductive bump group after lamination hot pressing As described above, it is 100% or less, the mixing ratio of the insulating filler in the insulating resin compounding liquid is 1 vol% or more and 30 vol% or less, and the material of the insulating resin compounding liquid contains an oligophenylene ether resin. A multilayer wiring board characterized by The insulating layer is a layer formed by volatilizing the solvent and reducing the film under conditions that do not substantially cause a curing reaction of the resin of the insulating resin mixture containing the insulating filler, and then curing the film. The multilayer wiring board of any one of Claim 1 or 2. The insulating filler is one or a plurality of materials selected from silica, silicon carbide, alumina, aluminum nitride, zirconia beads, glass beads, and acrylic beads. A multilayer wiring board according to claim 1. 5. The height h <b> 2 of the conductive bump group after the laminated hot pressing satisfies h <b> 2 ≧ t <b> 3 with respect to the thickness t <b> 3 of the insulating layer after the laminated hot pressing. The multilayer wiring board according to any one of claims. 6. The resin composition constituting the conductive bump group is made of a material in which a thermoplastic resin is added to a thermosetting resin at a mixing ratio of 10 wt% or more and 30 wt% or less. A multilayer wiring board according to claim 1.

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